| 1 | /*
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| 2 | * TOPPERS/ASP Kernel
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| 3 | * Toyohashi Open Platform for Embedded Real-Time Systems/
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| 4 | * Advanced Standard Profile Kernel
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| 5 | *
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| 6 | * Copyright (C) 2008 by Embedded and Real-Time Systems Laboratory
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| 7 | * Graduate School of Information Science, Nagoya Univ., JAPAN
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| 8 | *
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| 9 | * ãLì ÒÍCȺÌ(1)`(4)Ìðð½·êÉÀèC{\tgEF
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| 10 | * Ai{\tgEFAðüϵ½àÌðÜÞDȺ¯¶jðgpE¡»Eü
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| 11 | * ÏEÄzziȺCpÆÄÔj·é±Æð³Åø·éD
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| 12 | * (1) {\tgEFAð\[XR[hÌ`Åp·éêÉÍCãLÌì
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| 13 | * \¦C±Ìpð¨æѺL̳ÛØKèªC»ÌÜÜÌ`Å\[
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| 14 | * XR[hÉÜÜêÄ¢é±ÆD
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| 15 | * (2) {\tgEFAðCCu`®ÈÇC¼Ì\tgEFAJÉg
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| 16 | * pÅ«é`ÅÄzz·éêÉÍCÄzzɺ¤hL
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| 17 | gip
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| 18 | * Ò}j
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| 19 | AÈÇjÉCãLÌì \¦C±Ìpð¨æѺL
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| 20 | * ̳ÛØKèðfÚ·é±ÆD
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| 21 | * (3) {\tgEFAðC@íÉgÝÞÈÇC¼Ì\tgEFAJÉg
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| 22 | * pÅ«È¢`ÅÄzz·éêÉÍCÌ¢¸ê©Ìðð½·±
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| 23 | * ÆD
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| 24 | * (a) Äzzɺ¤hL
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| 25 | gipÒ}j
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| 26 | AÈÇjÉCãLÌ
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| 27 | * ì \¦C±Ìpð¨æѺL̳ÛØKèðfÚ·é±ÆD
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| 28 | * (b) ÄzzÌ`ÔðCÊÉèßéû@ÉæÁÄCTOPPERSvWFNgÉ
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| 29 | * ñ·é±ÆD
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| 30 | * (4) {\tgEFAÌpÉæè¼ÚIܽÍÔÚIɶ¶é¢©Èé¹
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| 31 | * Q©çàCãLì Ò¨æÑTOPPERSvWFNgðÆÓ·é±ÆD
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| 32 | * ܽC{\tgEFAÌ[UܽÍGh[U©çÌ¢©Èé
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| 33 | * RÉîÿ©çàCãLì Ò¨æÑTOPPERSvWFNgð
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| 34 | * ÆÓ·é±ÆD
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| 35 | *
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| 36 | * {\tgEFAÍC³ÛØÅñ³êÄ¢éàÌÅ éDãLì Ò¨
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| 37 | * æÑTOPPERSvWFNgÍC{\tgEFAÉÖµÄCÁèÌgpÚI
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| 38 | * ÉηéK«àÜßÄC¢©ÈéÛØàsíÈ¢DܽC{\tgEF
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| 39 | * AÌpÉæè¼ÚIܽÍÔÚIɶ¶½¢©Èé¹QÉÖµÄàC»
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| 40 | * ÌÓCðíÈ¢D
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| 41 | *
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| 42 | */
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| 43 |
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| 44 | /*
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| 45 | * vZbT˶W
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| 46 | [iARM-Mpj
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| 47 | */
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| 48 |
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| 49 | #include "kernel_impl.h"
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| 50 | #include "check.h"
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| 51 | #include "task.h"
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| 52 |
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| 53 | /*
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| 54 | * CPUbNtOÀ»Ì½ßÌÏ
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| 55 | */
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| 56 | volatile bool_t lock_flag; /* CPUbNtOÌlðÛ·éÏ */
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| 57 | volatile uint32_t saved_iipm; /* ÝDæx}XNðÛ¶·éÏ */
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| 58 |
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| 59 | /*
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| 60 | * xN^e[u(kernel_cfg.c)
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| 61 | */
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| 62 | extern const FP vector_table[];
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| 63 |
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| 64 | /*
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| 65 | * VXeáOEÝÌiáOÔ 4`15j
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| 66 | * ÝDæxÝèWX^ÖÌANZX̽ßÌzñ
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| 67 | */
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| 68 | static const unsigned int nvic_sys_pri_reg[] = {
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| 69 | 0,
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| 70 | NVIC_SYS_PRI1,
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| 71 | NVIC_SYS_PRI2,
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| 72 | NVIC_SYS_PRI3
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| 73 | };
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| 74 |
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| 75 | /*
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| 76 | * áOÆÝÌÝDæxðZbg
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| 77 | *
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| 78 | * excnoÍARM-MÅèßçêÄ¢é Exception Number ðwèD
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| 79 | */
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| 80 | void
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| 81 | set_exc_int_priority(uint32_t excno, uint32_t iipm){
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| 82 | uint32_t tmp, reg;
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| 83 |
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| 84 | /*
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| 85 | * ÝDæxÝèWX^Ìè
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| 86 | */
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| 87 | if ((EXCNO_MPU <= excno) && (excno <= IRQNO_SYSTICK)) {
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| 88 | /*
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| 89 | * Exception Number 4(Memory Management)©ç
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| 90 | * Exception Number 15(SysTick)ÜÅÌÝDæxÍVXeDæx
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| 91 | * WX^ÉæèÝèD
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| 92 | */
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| 93 | reg = nvic_sys_pri_reg[excno >> 2];
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| 94 | }
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| 95 | else if ((TMIN_INTNO < excno) && (excno <= TMAX_INTNO)){
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| 96 | /*
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| 97 | * IRQÝÈç
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| 98 | */
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| 99 | reg = NVIC_PRI0 + (((excno - (TMIN_INTNO + 1)) >> 2) * 4);
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| 100 | }
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| 101 | else {
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| 102 | return ;
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| 103 | }
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| 104 |
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| 105 | tmp = sil_rew_mem((void *)reg);
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| 106 | tmp &= ~(0xFF << (8 * (excno & 0x03)));
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| 107 | tmp |= iipm << (8 * (excno & 0x03));
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| 108 | sil_wrw_mem((void *)reg, tmp);
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| 109 | }
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| 110 |
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| 111 | /*
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| 112 | * áOÌÂ
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| 113 | *
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| 114 | * Memory Management, Bus Fault, Usage Fault ÍÖ~Eª¨¤
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| 115 | */
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| 116 | void
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| 117 | enable_exc(EXCNO excno)
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| 118 | {
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| 119 | uint32_t tmp;
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| 120 |
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| 121 | switch (excno) {
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| 122 | case EXCNO_MPU:
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| 123 | tmp = sil_rew_mem((void *)NVIC_SYS_HND_CTRL);
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| 124 | tmp |= NVIC_SYS_HND_CTRL_MEM;
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| 125 | sil_wrw_mem((void *)NVIC_SYS_HND_CTRL, tmp);
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| 126 | break;
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| 127 | case EXCNO_BUS:
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| 128 | tmp = sil_rew_mem((void *)NVIC_SYS_HND_CTRL);
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| 129 | tmp |= NVIC_SYS_HND_CTRL_BUS;
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| 130 | sil_wrw_mem((void *)NVIC_SYS_HND_CTRL, tmp);
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| 131 | break;
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| 132 | case EXCNO_USAGE:
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| 133 | tmp = sil_rew_mem((void *)NVIC_SYS_HND_CTRL);
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| 134 | tmp |= NVIC_SYS_HND_CTRL_USAGE;
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| 135 | sil_wrw_mem((void *)NVIC_SYS_HND_CTRL, tmp);
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| 136 | break;
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| 137 | }
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| 138 | }
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| 139 |
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| 140 | /*
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| 141 | * áOÌÖ~
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| 142 | */
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| 143 | void
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| 144 | disable_exc(EXCNO excno)
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| 145 | {
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| 146 | uint32_t tmp;
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| 147 |
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| 148 | switch (excno) {
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| 149 | case EXCNO_MPU:
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| 150 | tmp = sil_rew_mem((void *)NVIC_SYS_HND_CTRL);
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| 151 | tmp &= ~NVIC_SYS_HND_CTRL_MEM;
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| 152 | sil_wrw_mem((void *)NVIC_SYS_HND_CTRL, tmp);
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| 153 | break;
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| 154 | case EXCNO_BUS:
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| 155 | tmp = sil_rew_mem((void *)NVIC_SYS_HND_CTRL);
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| 156 | tmp &= ~NVIC_SYS_HND_CTRL_BUS;
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| 157 | sil_wrw_mem((void *)NVIC_SYS_HND_CTRL, tmp);
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| 158 | break;
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| 159 | case EXCNO_USAGE:
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| 160 | tmp = sil_rew_mem((void *)NVIC_SYS_HND_CTRL);
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| 161 | tmp &= ~NVIC_SYS_HND_CTRL_USAGE;
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| 162 | sil_wrw_mem((void *)NVIC_SYS_HND_CTRL, tmp);
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| 163 | break;
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| 164 | }
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| 165 | }
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| 166 |
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| 167 |
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| 168 | /*
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| 169 | * vZbT˶Ìú»
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| 170 | */
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| 171 | void
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| 172 | core_initialize(void)
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| 173 | {
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| 174 | /*
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| 175 | * CPUbNtOÀ»Ì½ßÌÏÌú»
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| 176 | */
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| 177 | lock_flag = true;
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| 178 | saved_iipm = IIPM_ENAALL;
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| 179 |
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| 180 | /*
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| 181 | * xN^e[uðÝè
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| 182 | */
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| 183 | sil_wrw_mem((void*)NVIC_VECTTBL, (uint32_t)vector_table);
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| 184 |
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| 185 | /*
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| 186 | * SVCnhÌDæxðÝè
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| 187 | */
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| 188 | set_exc_int_priority(EXCNO_HARD, 0);
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| 189 | set_exc_int_priority(EXCNO_MPU, 0);
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| 190 | set_exc_int_priority(EXCNO_BUS, 0);
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| 191 | set_exc_int_priority(EXCNO_USAGE, 0);
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| 192 | set_exc_int_priority(EXCNO_SVCALL, 0);
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| 193 | set_exc_int_priority(EXCNO_DEBUG, 0);
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| 194 | set_exc_int_priority(EXCNO_PENDSV, 0);
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| 195 |
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| 196 | /*
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| 197 | * SVCnhðLøÉ
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| 198 | */
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| 199 | x_enable_int(EXCNO_SVCALL);
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| 200 | }
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| 201 |
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| 202 | /*
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| 203 | * vZbT˶ÌI¹
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| 204 | */
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| 205 | void
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| 206 | core_terminate(void)
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| 207 | {
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| 208 | extern __weak void software_term_hook(void);
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| 209 | void (*volatile fp)(void) = software_term_hook;
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| 210 |
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| 211 | /*
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| 212 | * software_term_hookÖÌ|C^ðCêUvolatilewèÌ éfpÉã
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| 213 | * üµÄ©çg¤ÌÍC0ÆÌärªÅK»Åí³êÈ¢æ¤É·é½
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| 214 | * ßÅ éD
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| 215 | */
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| 216 | if (fp != 0) {
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| 217 | (*fp)();
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| 218 | }
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| 219 | }
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| 220 |
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| 221 | /*
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| 222 | * ÝvC®«ÌÝè
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| 223 | */
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| 224 | void
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| 225 | x_config_int(INTNO intno, ATR intatr, PRI intpri)
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| 226 | {
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| 227 | assert(VALID_INTNO_CFGINT(intno));
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| 228 | assert(TMIN_INTPRI <= intpri && intpri <= TMAX_INTPRI);
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| 229 |
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| 230 | /*
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| 231 | * êUÝðÖ~·é
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| 232 | */
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| 233 | (void)x_disable_int(intno);
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| 234 |
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| 235 | /*
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| 236 | * ÝDæxðZbg
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| 237 | */
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| 238 | set_exc_int_priority(intno, INT_IPM(intpri));
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| 239 |
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| 240 | /*
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| 241 | * Ýv}XNð(KvÈê)
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| 242 | * ¯ÉÝDæxàZbg³êé
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| 243 | */
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| 244 | if ((intatr & TA_ENAINT) != 0U) {
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| 245 | (void) x_enable_int(intno);
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| 246 | }
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| 247 | }
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| 248 |
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| 249 |
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| 250 | #ifndef OMIT_DEFAULT_EXC_HANDLER
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| 251 | /*
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| 252 | * TrapaÈOÌáOÅo^³êĢȢáOª¶·éÆÄÑo³êé
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| 253 | */
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| 254 | void
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| 255 | default_exc_handler(void *p_excinf)
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| 256 | {
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| 257 | uint32_t basepri = *(((uint32_t*)p_excinf) + P_EXCINF_OFFSET_BASEPRI);
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| 258 | uint32_t pc = *(((uint32_t*)p_excinf) + P_EXCINF_OFFSET_PC);
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| 259 | uint32_t xpsr = *(((uint32_t*)p_excinf) + P_EXCINF_OFFSET_XPSR);
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| 260 | uint32_t excno = get_ipsr() & IPSR_ISR_NUMBER;
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| 261 |
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| 262 | syslog(LOG_EMERG, "\nUnregistered Exception occurs.");
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| 263 | syslog(LOG_EMERG, "Excno = %08x PC = %08x XPSR = %08x basepri = %08X, p_excinf = %08X",
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| 264 | excno, pc, xpsr, basepri, p_excinf);
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| 265 |
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| 266 | target_exit();
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| 267 | }
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| 268 | #endif /* OMIT_DEFAULT_EXC_HANDLER */
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| 269 |
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| 270 | #ifndef OMIT_DEFAULT_INT_HANDLER
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| 271 | /*
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| 272 | * ¢o^Ìݪ¶µ½êÉÄÑo³êé
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| 273 | */
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| 274 | void
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| 275 | default_int_handler(void *p_excinf)
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| 276 | {
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| 277 | uint32_t basepri = *(((uint32_t*)p_excinf) + P_EXCINF_OFFSET_BASEPRI);
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| 278 | uint32_t pc = *(((uint32_t*)p_excinf) + P_EXCINF_OFFSET_PC);
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| 279 | uint32_t xpsr = *(((uint32_t*)p_excinf) + P_EXCINF_OFFSET_XPSR);
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| 280 | uint32_t excno = get_ipsr() & IPSR_ISR_NUMBER;
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| 281 |
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| 282 | syslog(LOG_EMERG, "\nUnregistered Interrupt occurs.");
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| 283 | syslog(LOG_EMERG, "Excno = %08x PC = %08x XPSR = %08x basepri = %08X, p_excinf = %08X",
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| 284 | excno, pc, xpsr, basepri, p_excinf);
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| 285 |
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| 286 | target_exit();
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| 287 | }
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| 288 | #endif /* OMIT_DEFAULT_INT_HANDLER */
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