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source: asp3_wo_tecs/trunk/test/test_sysstat1.c@ 302

Last change on this file since 302 was 302, checked in by ertl-honda, 7 years ago
TECSレスのASP3の開発のため以下のtrunkからコピー http://dev.toppers.jp/svn/asp3/branches/WO_TECS-3.C.0
File size: 13.8 KB

Line
1	/*
2	* TOPPERS Software
3	* Toyohashi Open Platform for Embedded Real-Time Systems
4	*
5	* Copyright (C) 2006-2015 by Embedded and Real-Time Systems Laboratory
6	* Graduate School of Information Science, Nagoya Univ., JAPAN
7	*
8	* ä¸è¨èä½æ¨©è
9	ã¯ï¼ä»¥ä¸ã®(1)ã(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
10	* ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
11	* å¤ã»åé
12	å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
13	* (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
14	* æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
15	* ã¹ã³ã¼ãä¸ã«å«ã¾ãã¦ãããã¨ï¼
16	* (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
17	* ç¨ã§ããå½¢ã§åé
18	å¸ããå ´åã«ã¯ï¼åé
19	å¸ã«ä¼´ãããã¥ã¡ã³ãï¼å©ç¨
20	* è
21	ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
22	* ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
23	* (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
24	* ç¨ã§ããªãå½¢ã§åé
25	å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
26	* ã¨ï¼
27	* (a) åé
28	å¸ã«ä¼´ãããã¥ã¡ã³ãï¼å©ç¨è
29	ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
30	* ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
31	* (b) åé
32	å¸ã®å½¢æ
33	ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSããã¸ã§ã¯ãã«
34	* å ±åãããã¨ï¼
35	* (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
36	* å®³ãããï¼ä¸è¨èä½æ¨©è
37	ããã³TOPPERSããã¸ã§ã¯ããå
38	è²¬ãããã¨ï¼
39	* ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
40	* ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
41	ããã³TOPPERSããã¸ã§ã¯ãã
42	* å
43	è²¬ãããã¨ï¼
44	*
45	* æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
46	ã
47	* ãã³TOPPERSããã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
48	* ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
49	* ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
50	* ã®è²¬ä»»ãè² ããªãï¼
51	*
52	* $Id: test_sysstat1.c 310 2015-02-08 13:46:46Z ertl-hiro $
53	*/
54
55	/*
56	* ã·ã¹ãã ç¶æ
57	ã«é¢ãããã¹ã(1)
58	*
59	* ããã¹ãã®ç®çã
60	*
61	* CPUããã¯ç¶æ
62	ã¨CPUããã¯è§£é¤ç¶æ
63	ï¼å²è¾¼ã¿åªå
64	åº¦ãã¹ã¯å
65	¨è§£é¤ç¶æ
66	ã¨ã
67	* ãã§ãªãç¶æ
68	ï¼ãã£ã¹ãããç¦æ¢ç¶æ
69	ã¨ãã£ã¹ãããè¨±å¯ç¶æ
70	ï¼ã¿ã¹ã¯çµ
71	* äºç¦æ¢ç¶æ
72	ã¨ã¿ã¹ã¯çµäºè¨±å¯ç¶æ
73	ã®éã®ç¶æ
74	é·ç§»ããã¹ãããï¼ã¾ãï¼ã¿
75	* ã¹ã¯ã®å®è¡éå§æã¨çµäºæã®ã·ã¹ãã ç¶æ
76	ã®å¤åã«ã¤ãã¦ããã¹ãããï¼
77	*
78	* ããã¹ãé
79	ç®ã
80	*
81	* (A) éå¸¸ç¶æ
82	ï¼CPUããã¯è§£é¤ç¶æ
83	ï¼å²è¾¼ã¿åªå
84	åº¦ãã¹ã¯å
85	¨è§£é¤ç¶æ
86	ï¼ãã£
87	* ã¹ãããè¨±å¯ç¶æ
88	ï¼ã¿ã¹ã¯çµäºè¨±å¯ç¶æ
89	ï¼ããã®ç¶æ
90	é·ç§»ã®ãã¹ã
91	* (A-1) CPUããã¯ç¶æ
92	ã¸ã®é·ç§»
93	* (A-2) å²è¾¼ã¿åªå
94	åº¦ãã¹ã¯å
95	¨è§£é¤ã§ãªãç¶æ
96	ã¸ã®é·ç§»
97	* (A-3) ãã£ã¹ãããç¦æ¢ç¶æ
98	ã¸ã®é·ç§»
99	* (A-4) ã¿ã¹ã¯çµäºç¦æ¢ç¶æ
100	ã¸ã®é·ç§»
101	* (B) CPUããã¯ç¶æ
102	ããã®ç¶æ
103	é·ç§»ã®ãã¹ã
104	* (B-1) CPUããã¯ç¶æ
105	ã¸ã®é·ç§» â¦ ä½ãèµ·ãããªã
106	* (B-2) å²è¾¼ã¿åªå
107	åº¦ãã¹ã¯å
108	¨è§£é¤ã§ãªãç¶æ
109	ã¸ã®é·ç§» â¦ ã¨ã©ã¼ã«
110	* (B-3) ãã£ã¹ãããç¦æ¢ç¶æ
111	ã¸ã®é·ç§» â¦ ã¨ã©ã¼ã«
112	* (B-4) ã¿ã¹ã¯çµäºç¦æ¢ç¶æ
113	ã¸ã®é·ç§» â¦ ã¨ã©ã¼ã«
114	* (B-5) CPUããã¯è§£é¤ç¶æ
115	ã¸ã®é·ç§»
116	* (C) å²è¾¼ã¿åªå
117	åº¦ãã¹ã¯å
118	¨è§£é¤ã§ãªãç¶æ
119	ããã®ç¶æ
120	é·ç§»ã®ãã¹ã
121	* (C-1) CPUããã¯ç¶æ
122	ã¸ã®é·ç§»
123	* (C-2) å²è¾¼ã¿åªå
124	åº¦ãã¹ã¯å
125	¨è§£é¤ã§ãªãç¶æ
126	ã¸ã®é·ç§» â¦ ä½ãèµ·ãããªã
127	* (C-3) ãã£ã¹ãããç¦æ¢ç¶æ
128	ã¸ã®é·ç§»
129	* (C-4) ã¿ã¹ã¯çµäºç¦æ¢ç¶æ
130	ã¸ã®é·ç§»
131	* (C-5) å²è¾¼ã¿åªå
132	åº¦ãã¹ã¯å
133	¨è§£é¤ç¶æ
134	ã¸ã®é·ç§»
135	* (D) ãã£ã¹ãããç¦æ¢ç¶æ
136	ããã®ç¶æ
137	é·ç§»ã®ãã¹ã
138	* (D-1) CPUããã¯ç¶æ
139	ã¸ã®é·ç§»
140	* (D-2) å²è¾¼ã¿åªå
141	åº¦ãã¹ã¯å
142	¨è§£é¤ã§ãªãç¶æ
143	ã¸ã®é·ç§»
144	* (D-3) ãã£ã¹ãããç¦æ¢ç¶æ
145	ã¸ã®é·ç§» â¦ ä½ãèµ·ãããªã
146	* (D-4) ã¿ã¹ã¯çµäºç¦æ¢ç¶æ
147	ã¸ã®é·ç§»
148	* (D-5) ãã£ã¹ãããè¨±å¯ç¶æ
149	ã¸ã®é·ç§»
150	* (E) ã¿ã¹ã¯çµäºç¦æ¢ç¶æ
151	ããã®ç¶æ
152	é·ç§»ã®ãã¹ã
153	* (E-1) CPUããã¯ç¶æ
154	ã¸ã®é·ç§»
155	* (E-2) å²è¾¼ã¿åªå
156	åº¦ãã¹ã¯å
157	¨è§£é¤ã§ãªãç¶æ
158	ã¸ã®é·ç§»
159	* (E-3) ãã£ã¹ãããç¦æ¢ç¶æ
160	ã¸ã®é·ç§»
161	* (E-4) ã¿ã¹ã¯çµäºç¦æ¢ç¶æ
162	ã¸ã®é·ç§» â¦ ä½ãèµ·ãããªã
163	* (E-5) ã¿ã¹ã¯çµäºè¨±å¯ç¶æ
164	ã¸ã®é·ç§»
165	* (F) ã¿ã¹ã¯ã®çµäºã»èµ·åã«ããéå¸¸ç¶æ
166	ã«æ»ããã¨ã®ãã¹ã
167	* (F-1) å¥ã®ã¿ã¹ã¯ã®èµ·å
168	* (F-2) åãã¿ã¹ã¯ã®èµ·å
169	*
170	* ãä½¿ç¨ãªã½ã¼ã¹ã
171	*
172	* TASK1: ä¸åªå
173	åº¦ã¿ã¹ã¯ï¼TA_ACTå±æ§
174	* TASK2: ä¸åªå
175	åº¦ã¿ã¹ã¯
176	*
177	* ããã¹ãã·ã¼ã±ã³ã¹ã
178	*
179	* == TASK1 ==
180	* 1: state(false, false, false, false, false)
181	* ipm(TIPM_ENAALL)
182	* 2: loc_cpu() ... (A-1)
183	* state(false, true, false, true, false)
184	* 3: loc_cpu() ... (B-1)
185	* state(false, true, false, true, false)
186	* 4: chg_ipm(TMAX_INTPRI) -> E_CTX ... (B-2)
187	* dis_dsp() -> E_CTX ... (B-3)
188	* dis_ter() -> E_CTX ... (B-4)
189	* state(false, true, false, true, false)
190	* 5: unl_cpu() ... (B-5)
191	* state(false, false, false, false, false)
192	* ipm(TIPM_ENAALL)
193	* 6: chg_ipm(TMAX_INTPRI) ... (A-2)
194	* state(false, false, false, true, false)
195	* ipm(TMAX_INTPRI)
196	* 7: loc_cpu() ... (C-1)
197	* state(false, true, false, true, false)
198	* chg_ipm(TIPM_ENAALL) -> E_CTX
199	* dis_dsp() -> E_CTX
200	* dis_ter() -> E_CTX
201	* unl_cpu()
202	* state(false, false, false, true, false)
203	* ipm(TMAX_INTPRI)
204	* 8: chg_ipm(TMAX_INTPRI) ... (C-2)
205	* state(false, false, false, true, false)
206	* ipm(TMAX_INTPRI)
207	* 9: dis_dsp() ... (C-3)
208	* state(false, false, true, true, false)
209	* ipm(TMAX_INTPRI)
210	* 10: dis_ter() ... (C-4)
211	* state(false, false, true, true, true)
212	* ipm(TMAX_INTPRI)
213	* 11: chg_ipm(TIPM_ENAALL) ... (C-5)
214	* state(false, false, true, true, true)
215	* ipm(TIPM_ENAALL)
216	* 12: ena_dsp()
217	* state(false, false, false, false, true)
218	* ipm(TIPM_ENAALL)
219	* 13: ena_ter()
220	* state(false, false, false, false, false)
221	* ipm(TIPM_ENAALL)
222	* 14: dis_dsp() ... (A-3)
223	* state(false, false, true, true, false)
224	* ipm(TIPM_ENAALL)
225	* 15: loc_cpu() ... (D-1)
226	* state(false, true, true, true, false)
227	* unl_cpu()
228	* state(false, false, true, true, false)
229	* ipm(TIPM_ENAALL)
230	* 16: chg_ipm(TMAX_INTPRI) ... (D-2)
231	* state(false, false, true, true, false)
232	* ipm(TMAX_INTPRI)
233	* 17: dis_dsp() ... (D-3)
234	* state(false, false, true, true, false)
235	* ipm(TMAX_INTPRI)
236	* 18: dis_ter() ... (D-4)
237	* state(false, false, true, true, true)
238	* ipm(TMAX_INTPRI)
239	* 19: ena_dsp() ... (D-5)
240	* state(false, false, false, true, true)
241	* ipm(TMAX_INTPRI)
242	* 20: chg_ipm(TIPM_ENAALL)
243	* state(false, false, false, false, true)
244	* ipm(TIPM_ENAALL)
245	* 21: ena_ter() ... (E-5)
246	* state(false, false, false, false, false)
247	* ipm(TIPM_ENAALL)
248	* 22: dis_ter() ... (A-4)
249	* state(false, false, false, false, true)
250	* ipm(TIPM_ENAALL)
251	* 23: loc_cpu() ... (E-1)
252	* state(false, true, false, true, true)
253	* unl_cpu()
254	* state(false, false, false, false, true)
255	* ipm(TIPM_ENAALL)
256	* 24: chg_ipm(TMAX_INTPRI) ... (E-2)
257	* state(false, false, false, true, true)
258	* ipm(TMAX_INTPRI)
259	* 25: dis_dsp() ... (E-3)
260	* state(false, false, true, true, true)
261	* ipm(TMAX_INTPRI)
262	* 26: dis_ter() ... (E-4)
263	* state(false, false, true, true, true)
264	* ipm(TMAX_INTPRI)
265	* 27: act_tsk(TASK2)
266	* dis_ter()
267	* loc_cpu()
268	* state(false, true, true, true, true)
269	* ext_tsk()
270	* == TASK2-1ï¼1åç®ï¼==
271	* 28: state(false, false, false, false, false) ... (F-1)
272	* ipm(TIPM_ENAALL)
273	* 29: act_tsk(TASK2)
274	* chg_ipm(TMAX_INTPRI)
275	* dis_dsp()
276	* dis_ter()
277	* loc_cpu()
278	* state(false, true, true, true, true)
279	* ext_tsk()
280	* == TASK2-2ï¼2åç®ï¼==
281	* 30: state(false, false, false, false, false) ... (F-2)
282	* ipm(TIPM_ENAALL)
283	* 31: END
284	*/
285
286	#include <kernel.h>
287	#include <t_syslog.h>
288	#include "syssvc/test_svc.h"
289	#include "kernel_cfg.h"
290	#include "test_sysstat1.h"
291
292	/* DO NOT DELETE THIS LINE -- gentest depends on it. */
293
294	void
295	task1(intptr_t exinf)
296	{
297	ER_UINT ercd;
298
299	test_start(__FILE__);
300
301	check_point(1);
302	check_state(false, false, false, false, false);
303
304	check_ipm(TIPM_ENAALL);
305
306	check_point(2);
307	ercd = loc_cpu();
308	check_ercd(ercd, E_OK);
309
310	check_state(false, true, false, true, false);
311
312	check_point(3);
313	ercd = loc_cpu();
314	check_ercd(ercd, E_OK);
315
316	check_state(false, true, false, true, false);
317
318	check_point(4);
319	ercd = chg_ipm(TMAX_INTPRI);
320	check_ercd(ercd, E_CTX);
321
322	ercd = dis_dsp();
323	check_ercd(ercd, E_CTX);
324
325	ercd = dis_ter();
326	check_ercd(ercd, E_CTX);
327
328	check_state(false, true, false, true, false);
329
330	check_point(5);
331	ercd = unl_cpu();
332	check_ercd(ercd, E_OK);
333
334	check_state(false, false, false, false, false);
335
336	check_ipm(TIPM_ENAALL);
337
338	check_point(6);
339	ercd = chg_ipm(TMAX_INTPRI);
340	check_ercd(ercd, E_OK);
341
342	check_state(false, false, false, true, false);
343
344	check_ipm(TMAX_INTPRI);
345
346	check_point(7);
347	ercd = loc_cpu();
348	check_ercd(ercd, E_OK);
349
350	check_state(false, true, false, true, false);
351
352	ercd = chg_ipm(TIPM_ENAALL);
353	check_ercd(ercd, E_CTX);
354
355	ercd = dis_dsp();
356	check_ercd(ercd, E_CTX);
357
358	ercd = dis_ter();
359	check_ercd(ercd, E_CTX);
360
361	ercd = unl_cpu();
362	check_ercd(ercd, E_OK);
363
364	check_state(false, false, false, true, false);
365
366	check_ipm(TMAX_INTPRI);
367
368	check_point(8);
369	ercd = chg_ipm(TMAX_INTPRI);
370	check_ercd(ercd, E_OK);
371
372	check_state(false, false, false, true, false);
373
374	check_ipm(TMAX_INTPRI);
375
376	check_point(9);
377	ercd = dis_dsp();
378	check_ercd(ercd, E_OK);
379
380	check_state(false, false, true, true, false);
381
382	check_ipm(TMAX_INTPRI);
383
384	check_point(10);
385	ercd = dis_ter();
386	check_ercd(ercd, E_OK);
387
388	check_state(false, false, true, true, true);
389
390	check_ipm(TMAX_INTPRI);
391
392	check_point(11);
393	ercd = chg_ipm(TIPM_ENAALL);
394	check_ercd(ercd, E_OK);
395
396	check_state(false, false, true, true, true);
397
398	check_ipm(TIPM_ENAALL);
399
400	check_point(12);
401	ercd = ena_dsp();
402	check_ercd(ercd, E_OK);
403
404	check_state(false, false, false, false, true);
405
406	check_ipm(TIPM_ENAALL);
407
408	check_point(13);
409	ercd = ena_ter();
410	check_ercd(ercd, E_OK);
411
412	check_state(false, false, false, false, false);
413
414	check_ipm(TIPM_ENAALL);
415
416	check_point(14);
417	ercd = dis_dsp();
418	check_ercd(ercd, E_OK);
419
420	check_state(false, false, true, true, false);
421
422	check_ipm(TIPM_ENAALL);
423
424	check_point(15);
425	ercd = loc_cpu();
426	check_ercd(ercd, E_OK);
427
428	check_state(false, true, true, true, false);
429
430	ercd = unl_cpu();
431	check_ercd(ercd, E_OK);
432
433	check_state(false, false, true, true, false);
434
435	check_ipm(TIPM_ENAALL);
436
437	check_point(16);
438	ercd = chg_ipm(TMAX_INTPRI);
439	check_ercd(ercd, E_OK);
440
441	check_state(false, false, true, true, false);
442
443	check_ipm(TMAX_INTPRI);
444
445	check_point(17);
446	ercd = dis_dsp();
447	check_ercd(ercd, E_OK);
448
449	check_state(false, false, true, true, false);
450
451	check_ipm(TMAX_INTPRI);
452
453	check_point(18);
454	ercd = dis_ter();
455	check_ercd(ercd, E_OK);
456
457	check_state(false, false, true, true, true);
458
459	check_ipm(TMAX_INTPRI);
460
461	check_point(19);
462	ercd = ena_dsp();
463	check_ercd(ercd, E_OK);
464
465	check_state(false, false, false, true, true);
466
467	check_ipm(TMAX_INTPRI);
468
469	check_point(20);
470	ercd = chg_ipm(TIPM_ENAALL);
471	check_ercd(ercd, E_OK);
472
473	check_state(false, false, false, false, true);
474
475	check_ipm(TIPM_ENAALL);
476
477	check_point(21);
478	ercd = ena_ter();
479	check_ercd(ercd, E_OK);
480
481	check_state(false, false, false, false, false);
482
483	check_ipm(TIPM_ENAALL);
484
485	check_point(22);
486	ercd = dis_ter();
487	check_ercd(ercd, E_OK);
488
489	check_state(false, false, false, false, true);
490
491	check_ipm(TIPM_ENAALL);
492
493	check_point(23);
494	ercd = loc_cpu();
495	check_ercd(ercd, E_OK);
496
497	check_state(false, true, false, true, true);
498
499	ercd = unl_cpu();
500	check_ercd(ercd, E_OK);
501
502	check_state(false, false, false, false, true);
503
504	check_ipm(TIPM_ENAALL);
505
506	check_point(24);
507	ercd = chg_ipm(TMAX_INTPRI);
508	check_ercd(ercd, E_OK);
509
510	check_state(false, false, false, true, true);
511
512	check_ipm(TMAX_INTPRI);
513
514	check_point(25);
515	ercd = dis_dsp();
516	check_ercd(ercd, E_OK);
517
518	check_state(false, false, true, true, true);
519
520	check_ipm(TMAX_INTPRI);
521
522	check_point(26);
523	ercd = dis_ter();
524	check_ercd(ercd, E_OK);
525
526	check_state(false, false, true, true, true);
527
528	check_ipm(TMAX_INTPRI);
529
530	check_point(27);
531	ercd = act_tsk(TASK2);
532	check_ercd(ercd, E_OK);
533
534	ercd = dis_ter();
535	check_ercd(ercd, E_OK);
536
537	ercd = loc_cpu();
538	check_ercd(ercd, E_OK);
539
540	check_state(false, true, true, true, true);
541
542	ercd = ext_tsk();
543	check_ercd(ercd, E_OK);
544
545	check_point(0);
546	}
547
548	static uint_t task2_count = 0;
549
550	void
551	task2(intptr_t exinf)
552	{
553	ER_UINT ercd;
554
555	switch (++task2_count) {
556	case 1:
557	check_point(28);
558	check_state(false, false, false, false, false);
559
560	check_ipm(TIPM_ENAALL);
561
562	check_point(29);
563	ercd = act_tsk(TASK2);
564	check_ercd(ercd, E_OK);
565
566	ercd = chg_ipm(TMAX_INTPRI);
567	check_ercd(ercd, E_OK);
568
569	ercd = dis_dsp();
570	check_ercd(ercd, E_OK);
571
572	ercd = dis_ter();
573	check_ercd(ercd, E_OK);
574
575	ercd = loc_cpu();
576	check_ercd(ercd, E_OK);
577
578	check_state(false, true, true, true, true);
579
580	ercd = ext_tsk();
581	check_ercd(ercd, E_OK);
582
583	check_point(0);
584
585	case 2:
586	check_point(30);
587	check_state(false, false, false, false, false);
588
589	check_ipm(TIPM_ENAALL);
590
591	check_finish(31);
592	check_point(0);
593
594	default:
595	check_point(0);
596	}
597	check_point(0);
598	}

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