[303] | 1 | /**
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| 2 | ******************************************************************************
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| 3 | * @file system_stm32f4xx.c
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| 4 | * @author MCD Application Team
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| 5 | * @version V1.2.1
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| 6 | * @date 09-October-2015
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| 7 | * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
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| 8 | *
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| 9 | * This file provides two functions and one global variable to be called from
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| 10 | * user application:
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| 11 | * - SystemInit(): This function is called at startup just after reset and
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| 12 | * before branch to main program. This call is made inside
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| 13 | * the "startup_stm32f4xx.s" file.
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| 14 | *
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| 15 | * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
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| 16 | * by the user application to setup the SysTick
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| 17 | * timer or configure other parameters.
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| 18 | *
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| 19 | * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
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| 20 | * be called whenever the core clock is changed
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| 21 | * during program execution.
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| 22 | *
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| 23 | *
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| 24 | ******************************************************************************
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| 25 | * @attention
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| 26 | *
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| 27 | * <h2><center>© COPYRIGHT 2014 STMicroelectronics</center></h2>
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| 28 | *
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| 29 | * Redistribution and use in source and binary forms, with or without modification,
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| 30 | * are permitted provided that the following conditions are met:
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| 31 | * 1. Redistributions of source code must retain the above copyright notice,
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| 32 | * this list of conditions and the following disclaimer.
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| 33 | * 2. Redistributions in binary form must reproduce the above copyright notice,
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| 34 | * this list of conditions and the following disclaimer in the documentation
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| 35 | * and/or other materials provided with the distribution.
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| 36 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
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| 37 | * may be used to endorse or promote products derived from this software
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| 38 | * without specific prior written permission.
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| 39 | *
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| 40 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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| 41 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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| 42 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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| 43 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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| 44 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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| 45 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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| 46 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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| 47 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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| 48 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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| 49 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 50 | *
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| 51 | ******************************************************************************
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| 52 | */
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| 53 |
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| 54 | /** @addtogroup CMSIS
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| 55 | * @{
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| 56 | */
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| 57 |
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| 58 | /** @addtogroup stm32f4xx_system
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| 59 | * @{
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| 60 | */
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| 61 |
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| 62 | /** @addtogroup STM32F4xx_System_Private_Includes
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| 63 | * @{
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| 64 | */
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| 65 |
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| 66 | #include "stm32f4xx.h"
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| 67 |
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| 68 | #if !defined (HSE_VALUE)
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| 69 | #define HSE_VALUE ((uint32_t)8000000) /*!< Default value of the External oscillator in Hz */
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| 70 | #endif /* HSE_VALUE */
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| 71 |
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| 72 | #if !defined (HSI_VALUE)
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| 73 | #define HSI_VALUE ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
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| 74 | #endif /* HSI_VALUE */
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| 75 |
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| 76 | /**
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| 77 | * @}
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| 78 | */
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| 79 |
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| 80 | /** @addtogroup STM32F4xx_System_Private_TypesDefinitions
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| 81 | * @{
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| 82 | */
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| 83 |
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| 84 | /**
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| 85 | * @}
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| 86 | */
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| 87 |
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| 88 | /** @addtogroup STM32F4xx_System_Private_Defines
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| 89 | * @{
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| 90 | */
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| 91 |
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| 92 | /************************* Miscellaneous Configuration ************************/
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| 93 |
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| 94 | /*!< Uncomment the following line if you need to relocate your vector Table in
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| 95 | Internal SRAM. */
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| 96 | /* #define VECT_TAB_SRAM */
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| 97 | #define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
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| 98 | This value must be a multiple of 0x200. */
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| 99 | /******************************************************************************/
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| 100 |
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| 101 | /**
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| 102 | * @}
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| 103 | */
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| 104 |
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| 105 | /** @addtogroup STM32F4xx_System_Private_Macros
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| 106 | * @{
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| 107 | */
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| 108 |
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| 109 | /**
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| 110 | * @}
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| 111 | */
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| 112 |
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| 113 | /** @addtogroup STM32F4xx_System_Private_Variables
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| 114 | * @{
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| 115 | */
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| 116 | /* This variable is updated in three ways:
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| 117 | 1) by calling CMSIS function SystemCoreClockUpdate()
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| 118 | 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
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| 119 | 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
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| 120 | Note: If you use this function to configure the system clock; then there
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| 121 | is no need to call the 2 first functions listed above, since SystemCoreClock
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| 122 | variable is updated automatically.
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| 123 | */
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| 124 | uint32_t SystemCoreClock = 16000000;
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| 125 | __I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
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| 126 |
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| 127 | /**
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| 128 | * @}
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| 129 | */
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| 130 |
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| 131 | /** @addtogroup STM32F4xx_System_Private_FunctionPrototypes
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| 132 | * @{
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| 133 | */
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| 134 |
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| 135 | /**
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| 136 | * @}
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| 137 | */
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| 138 |
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| 139 | /** @addtogroup STM32F4xx_System_Private_Functions
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| 140 | * @{
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| 141 | */
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| 142 |
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| 143 | /**
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| 144 | * @brief Setup the microcontroller system
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| 145 | * Initialize the FPU setting, vector table location and External memory
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| 146 | * configuration.
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| 147 | * @param None
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| 148 | * @retval None
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| 149 | */
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| 150 | void SystemInit(void)
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| 151 | {
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| 152 | /* FPU settings ------------------------------------------------------------*/
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| 153 | #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
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| 154 | // SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
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| 155 | #endif
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| 156 | /* Reset the RCC clock configuration to the default reset state ------------*/
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| 157 | /* Set HSION bit */
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| 158 | RCC->CR |= (uint32_t)0x00000001;
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| 159 |
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| 160 | /* Reset CFGR register */
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| 161 | RCC->CFGR = 0x00000000;
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| 162 |
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| 163 | /* Reset HSEON, CSSON and PLLON bits */
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| 164 | RCC->CR &= (uint32_t)0xFEF6FFFF;
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| 165 |
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| 166 | /* Reset PLLCFGR register */
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| 167 | RCC->PLLCFGR = 0x24003010;
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| 168 |
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| 169 | /* Reset HSEBYP bit */
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| 170 | RCC->CR &= (uint32_t)0xFFFBFFFF;
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| 171 |
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| 172 | /* Disable all interrupts */
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| 173 | RCC->CIR = 0x00000000;
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| 174 |
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| 175 | /* Configure the Vector Table location add offset address ------------------*/
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| 176 | #ifdef VECT_TAB_SRAM
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| 177 | SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
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| 178 | #else
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| 179 | SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
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| 180 | #endif
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| 181 | }
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| 182 |
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| 183 | /**
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| 184 | * @brief Update SystemCoreClock variable according to Clock Register Values.
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| 185 | * The SystemCoreClock variable contains the core clock (HCLK), it can
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| 186 | * be used by the user application to setup the SysTick timer or configure
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| 187 | * other parameters.
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| 188 | *
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| 189 | * @note Each time the core clock (HCLK) changes, this function must be called
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| 190 | * to update SystemCoreClock variable value. Otherwise, any configuration
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| 191 | * based on this variable will be incorrect.
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| 192 | *
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| 193 | * @note - The system frequency computed by this function is not the real
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| 194 | * frequency in the chip. It is calculated based on the predefined
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| 195 | * constant and the selected clock source:
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| 196 | *
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| 197 | * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
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| 198 | *
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| 199 | * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
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| 200 | *
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| 201 | * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
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| 202 | * or HSI_VALUE(*) multiplied/divided by the PLL factors.
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| 203 | *
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| 204 | * (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
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| 205 | * 16 MHz) but the real value may vary depending on the variations
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| 206 | * in voltage and temperature.
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| 207 | *
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| 208 | * (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (its value
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| 209 | * depends on the application requirements), user has to ensure that HSE_VALUE
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| 210 | * is same as the real frequency of the crystal used. Otherwise, this function
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| 211 | * may have wrong result.
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| 212 | *
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| 213 | * - The result of this function could be not correct when using fractional
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| 214 | * value for HSE crystal.
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| 215 | *
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| 216 | * @param None
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| 217 | * @retval None
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| 218 | */
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| 219 | void SystemCoreClockUpdate(void)
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| 220 | {
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| 221 | uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
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| 222 |
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| 223 | /* Get SYSCLK source -------------------------------------------------------*/
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| 224 | tmp = RCC->CFGR & RCC_CFGR_SWS;
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| 225 |
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| 226 | switch (tmp)
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| 227 | {
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| 228 | case 0x00: /* HSI used as system clock source */
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| 229 | SystemCoreClock = HSI_VALUE;
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| 230 | break;
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| 231 | case 0x04: /* HSE used as system clock source */
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| 232 | SystemCoreClock = HSE_VALUE;
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| 233 | break;
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| 234 | case 0x08: /* PLL used as system clock source */
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| 235 |
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| 236 | /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
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| 237 | SYSCLK = PLL_VCO / PLL_P
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| 238 | */
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| 239 | pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
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| 240 | pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
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| 241 |
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| 242 | if (pllsource != 0)
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| 243 | {
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| 244 | /* HSE used as PLL clock source */
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| 245 | pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
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| 246 | }
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| 247 | else
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| 248 | {
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| 249 | /* HSI used as PLL clock source */
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| 250 | pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
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| 251 | }
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| 252 |
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| 253 | pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
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| 254 | SystemCoreClock = pllvco/pllp;
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| 255 | break;
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| 256 | default:
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| 257 | SystemCoreClock = HSI_VALUE;
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| 258 | break;
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| 259 | }
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| 260 | /* Compute HCLK frequency --------------------------------------------------*/
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| 261 | /* Get HCLK prescaler */
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| 262 | tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
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| 263 | /* HCLK frequency */
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| 264 | SystemCoreClock >>= tmp;
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| 265 | }
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| 266 |
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| 267 | /**
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| 268 | * @}
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| 269 | */
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| 270 |
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| 271 | /**
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| 272 | * @}
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| 273 | */
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| 274 |
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| 275 | /**
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| 276 | * @}
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| 277 | */
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| 278 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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