1 | /**
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2 | ******************************************************************************
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3 | * @file stm32f4xx_ll_sdmmc.c
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4 | * @author MCD Application Team
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5 | * @version V1.4.1
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6 | * @date 09-October-2015
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7 | * @brief SDMMC Low Layer HAL module driver.
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8 | *
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9 | * This file provides firmware functions to manage the following
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10 | * functionalities of the SDMMC peripheral:
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11 | * + Initialization/de-initialization functions
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12 | * + I/O operation functions
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13 | * + Peripheral Control functions
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14 | * + Peripheral State functions
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15 | *
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16 | @verbatim
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17 | ==============================================================================
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18 | ##### SDMMC peripheral features #####
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19 | ==============================================================================
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20 | [..] The SD/SDIO MMC card host interface (SDIO) provides an interface between the APB2
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21 | peripheral bus and MultiMedia cards (MMCs), SD memory cards, SDIO cards and CE-ATA
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22 | devices.
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23 |
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24 | [..] The SDIO features include the following:
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25 | (+) Full compliance with MultiMedia Card System Specification Version 4.2. Card support
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26 | for three different databus modes: 1-bit (default), 4-bit and 8-bit
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27 | (+) Full compatibility with previous versions of MultiMedia Cards (forward compatibility)
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28 | (+) Full compliance with SD Memory Card Specifications Version 2.0
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29 | (+) Full compliance with SD I/O Card Specification Version 2.0: card support for two
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30 | different data bus modes: 1-bit (default) and 4-bit
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31 | (+) Full support of the CE-ATA features (full compliance with CE-ATA digital protocol
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32 | Rev1.1)
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33 | (+) Data transfer up to 48 MHz for the 8 bit mode
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34 | (+) Data and command output enable signals to control external bidirectional drivers.
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35 |
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36 |
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37 | ##### How to use this driver #####
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38 | ==============================================================================
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39 | [..]
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40 | This driver is a considered as a driver of service for external devices drivers
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41 | that interfaces with the SDIO peripheral.
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42 | According to the device used (SD card/ MMC card / SDIO card ...), a set of APIs
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43 | is used in the device's driver to perform SDIO operations and functionalities.
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44 |
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45 | This driver is almost transparent for the final user, it is only used to implement other
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46 | functionalities of the external device.
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47 |
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48 | [..]
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49 | (+) The SDIO clock (SDIOCLK = 48 MHz) is coming from a specific output of PLL
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50 | (PLL48CLK). Before start working with SDIO peripheral make sure that the
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51 | PLL is well configured.
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52 | The SDIO peripheral uses two clock signals:
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53 | (++) SDIO adapter clock (SDIOCLK = 48 MHz)
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54 | (++) APB2 bus clock (PCLK2)
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55 |
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56 | -@@- PCLK2 and SDIO_CK clock frequencies must respect the following condition:
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57 | Frequency(PCLK2) >= (3 / 8 x Frequency(SDIO_CK))
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58 |
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59 | (+) Enable/Disable peripheral clock using RCC peripheral macros related to SDIO
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60 | peripheral.
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61 |
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62 | (+) Enable the Power ON State using the SDIO_PowerState_ON(SDIOx)
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63 | function and disable it using the function SDIO_PowerState_OFF(SDIOx).
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64 |
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65 | (+) Enable/Disable the clock using the __SDIO_ENABLE()/__SDIO_DISABLE() macros.
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66 |
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67 | (+) Enable/Disable the peripheral interrupts using the macros __SDIO_ENABLE_IT(hsdio, IT)
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68 | and __SDIO_DISABLE_IT(hsdio, IT) if you need to use interrupt mode.
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69 |
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70 | (+) When using the DMA mode
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71 | (++) Configure the DMA in the MSP layer of the external device
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72 | (++) Active the needed channel Request
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73 | (++) Enable the DMA using __SDIO_DMA_ENABLE() macro or Disable it using the macro
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74 | __SDIO_DMA_DISABLE().
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75 |
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76 | (+) To control the CPSM (Command Path State Machine) and send
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77 | commands to the card use the SDIO_SendCommand(SDIOx),
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78 | SDIO_GetCommandResponse() and SDIO_GetResponse() functions. First, user has
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79 | to fill the command structure (pointer to SDIO_CmdInitTypeDef) according
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80 | to the selected command to be sent.
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81 | The parameters that should be filled are:
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82 | (++) Command Argument
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83 | (++) Command Index
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84 | (++) Command Response type
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85 | (++) Command Wait
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86 | (++) CPSM Status (Enable or Disable).
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87 |
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88 | -@@- To check if the command is well received, read the SDIO_CMDRESP
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89 | register using the SDIO_GetCommandResponse().
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90 | The SDIO responses registers (SDIO_RESP1 to SDIO_RESP2), use the
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91 | SDIO_GetResponse() function.
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92 |
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93 | (+) To control the DPSM (Data Path State Machine) and send/receive
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94 | data to/from the card use the SDIO_DataConfig(), SDIO_GetDataCounter(),
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95 | SDIO_ReadFIFO(), DIO_WriteFIFO() and SDIO_GetFIFOCount() functions.
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96 |
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97 | *** Read Operations ***
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98 | =======================
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99 | [..]
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100 | (#) First, user has to fill the data structure (pointer to
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101 | SDIO_DataInitTypeDef) according to the selected data type to be received.
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102 | The parameters that should be filled are:
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103 | (++) Data Timeout
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104 | (++) Data Length
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105 | (++) Data Block size
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106 | (++) Data Transfer direction: should be from card (To SDIO)
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107 | (++) Data Transfer mode
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108 | (++) DPSM Status (Enable or Disable)
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109 |
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110 | (#) Configure the SDIO resources to receive the data from the card
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111 | according to selected transfer mode (Refer to Step 8, 9 and 10).
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112 |
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113 | (#) Send the selected Read command (refer to step 11).
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114 |
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115 | (#) Use the SDIO flags/interrupts to check the transfer status.
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116 |
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117 | *** Write Operations ***
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118 | ========================
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119 | [..]
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120 | (#) First, user has to fill the data structure (pointer to
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121 | SDIO_DataInitTypeDef) according to the selected data type to be received.
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122 | The parameters that should be filled are:
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123 | (++) Data Timeout
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124 | (++) Data Length
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125 | (++) Data Block size
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126 | (++) Data Transfer direction: should be to card (To CARD)
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127 | (++) Data Transfer mode
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128 | (++) DPSM Status (Enable or Disable)
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129 |
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130 | (#) Configure the SDIO resources to send the data to the card according to
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131 | selected transfer mode.
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132 |
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133 | (#) Send the selected Write command.
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134 |
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135 | (#) Use the SDIO flags/interrupts to check the transfer status.
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136 |
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137 | @endverbatim
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138 | ******************************************************************************
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139 | * @attention
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140 | *
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141 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
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142 | *
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143 | * Redistribution and use in source and binary forms, with or without modification,
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144 | * are permitted provided that the following conditions are met:
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145 | * 1. Redistributions of source code must retain the above copyright notice,
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146 | * this list of conditions and the following disclaimer.
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147 | * 2. Redistributions in binary form must reproduce the above copyright notice,
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148 | * this list of conditions and the following disclaimer in the documentation
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149 | * and/or other materials provided with the distribution.
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150 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
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151 | * may be used to endorse or promote products derived from this software
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152 | * without specific prior written permission.
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153 | *
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154 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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155 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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156 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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157 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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158 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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159 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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160 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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161 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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162 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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163 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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164 | *
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165 | ******************************************************************************
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166 | */
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167 |
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168 | /* Includes ------------------------------------------------------------------*/
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169 | #include "stm32f4xx_hal.h"
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170 |
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171 | /** @addtogroup STM32F4xx_HAL_Driver
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172 | * @{
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173 | */
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174 |
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175 | /** @defgroup SDMMC_LL SDMMC Low Layer
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176 | * @brief Low layer module for SD and MMC driver
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177 | * @{
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178 | */
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179 |
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180 | #if defined(HAL_SD_MODULE_ENABLED) || defined(HAL_MMC_MODULE_ENABLED)
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181 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
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182 | defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
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183 | defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || \
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184 | defined(STM32F469xx) || defined(STM32F479xx)
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185 | /* Private typedef -----------------------------------------------------------*/
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186 | /* Private define ------------------------------------------------------------*/
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187 | /* Private macro -------------------------------------------------------------*/
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188 | /* Private variables ---------------------------------------------------------*/
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189 | /* Private function prototypes -----------------------------------------------*/
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190 | /* Private functions ---------------------------------------------------------*/
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191 |
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192 | /** @defgroup SDMMC_LL_Exported_Functions SDMMC_LL Exported Functions
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193 | * @{
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194 | */
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195 |
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196 | /** @defgroup HAL_SDMMC_LL_Group1 Initialization/de-initialization functions
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197 | * @brief Initialization and Configuration functions
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198 | *
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199 | @verbatim
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200 | ===============================================================================
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201 | ##### Initialization/de-initialization functions #####
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202 | ===============================================================================
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203 | [..] This section provides functions allowing to:
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204 |
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205 | @endverbatim
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206 | * @{
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207 | */
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208 |
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209 | /**
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210 | * @brief Initializes the SDIO according to the specified
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211 | * parameters in the SDIO_InitTypeDef and create the associated handle.
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212 | * @param SDIOx: Pointer to SDIO register base
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213 | * @param Init: SDIO initialization structure
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214 | * @retval HAL status
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215 | */
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216 | HAL_StatusTypeDef SDIO_Init(SDIO_TypeDef *SDIOx, SDIO_InitTypeDef Init)
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217 | {
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218 | uint32_t tmpreg = 0;
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219 |
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220 | /* Check the parameters */
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221 | assert_param(IS_SDIO_ALL_INSTANCE(SDIOx));
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222 | assert_param(IS_SDIO_CLOCK_EDGE(Init.ClockEdge));
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223 | assert_param(IS_SDIO_CLOCK_BYPASS(Init.ClockBypass));
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224 | assert_param(IS_SDIO_CLOCK_POWER_SAVE(Init.ClockPowerSave));
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225 | assert_param(IS_SDIO_BUS_WIDE(Init.BusWide));
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226 | assert_param(IS_SDIO_HARDWARE_FLOW_CONTROL(Init.HardwareFlowControl));
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227 | assert_param(IS_SDIO_CLKDIV(Init.ClockDiv));
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228 |
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229 | /* Set SDIO configuration parameters */
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230 | tmpreg |= (Init.ClockEdge |\
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231 | Init.ClockBypass |\
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232 | Init.ClockPowerSave |\
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233 | Init.BusWide |\
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234 | Init.HardwareFlowControl |\
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235 | Init.ClockDiv
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236 | );
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237 |
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238 | /* Write to SDIO CLKCR */
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239 | MODIFY_REG(SDIOx->CLKCR, CLKCR_CLEAR_MASK, tmpreg);
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240 |
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241 | return HAL_OK;
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242 | }
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243 |
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244 | /**
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245 | * @}
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246 | */
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247 |
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248 | /** @defgroup HAL_SDMMC_LL_Group2 I/O operation functions
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249 | * @brief Data transfers functions
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250 | *
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251 | @verbatim
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252 | ===============================================================================
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253 | ##### I/O operation functions #####
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254 | ===============================================================================
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255 | [..]
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256 | This subsection provides a set of functions allowing to manage the SDIO data
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257 | transfers.
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258 |
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259 | @endverbatim
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260 | * @{
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261 | */
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262 |
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263 | /**
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264 | * @brief Read data (word) from Rx FIFO in blocking mode (polling)
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265 | * @param SDIOx: Pointer to SDIO register base
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266 | * @retval HAL status
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267 | */
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268 | uint32_t SDIO_ReadFIFO(SDIO_TypeDef *SDIOx)
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269 | {
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270 | /* Read data from Rx FIFO */
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271 | return (SDIOx->FIFO);
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272 | }
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273 |
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274 | /**
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275 | * @brief Write data (word) to Tx FIFO in blocking mode (polling)
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276 | * @param SDIOx: Pointer to SDIO register base
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277 | * @param pWriteData: pointer to data to write
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278 | * @retval HAL status
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279 | */
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280 | HAL_StatusTypeDef SDIO_WriteFIFO(SDIO_TypeDef *SDIOx, uint32_t *pWriteData)
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281 | {
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282 | /* Write data to FIFO */
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283 | SDIOx->FIFO = *pWriteData;
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284 |
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285 | return HAL_OK;
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286 | }
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287 |
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288 | /**
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289 | * @}
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290 | */
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291 |
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292 | /** @defgroup HAL_SDMMC_LL_Group3 Peripheral Control functions
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293 | * @brief management functions
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294 | *
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295 | @verbatim
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296 | ===============================================================================
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297 | ##### Peripheral Control functions #####
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298 | ===============================================================================
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299 | [..]
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300 | This subsection provides a set of functions allowing to control the SDIO data
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301 | transfers.
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302 |
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303 | @endverbatim
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304 | * @{
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305 | */
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306 |
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307 | /**
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308 | * @brief Set SDIO Power state to ON.
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309 | * @param SDIOx: Pointer to SDIO register base
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310 | * @retval HAL status
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311 | */
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312 | HAL_StatusTypeDef SDIO_PowerState_ON(SDIO_TypeDef *SDIOx)
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313 | {
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314 | /* Set power state to ON */
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315 | SDIOx->POWER = SDIO_POWER_PWRCTRL;
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316 |
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317 | return HAL_OK;
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318 | }
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319 |
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320 | /**
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321 | * @brief Set SDIO Power state to OFF.
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322 | * @param SDIOx: Pointer to SDIO register base
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323 | * @retval HAL status
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324 | */
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325 | HAL_StatusTypeDef SDIO_PowerState_OFF(SDIO_TypeDef *SDIOx)
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326 | {
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327 | /* Set power state to OFF */
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328 | SDIOx->POWER = (uint32_t)0x00000000;
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329 |
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330 | return HAL_OK;
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331 | }
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332 |
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333 | /**
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334 | * @brief Get SDIO Power state.
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335 | * @param SDIOx: Pointer to SDIO register base
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336 | * @retval Power status of the controller. The returned value can be one of the
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337 | * following values:
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338 | * - 0x00: Power OFF
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339 | * - 0x02: Power UP
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340 | * - 0x03: Power ON
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341 | */
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342 | uint32_t SDIO_GetPowerState(SDIO_TypeDef *SDIOx)
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343 | {
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344 | return (SDIOx->POWER & SDIO_POWER_PWRCTRL);
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345 | }
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346 |
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347 | /**
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348 | * @brief Configure the SDIO command path according to the specified parameters in
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349 | * SDIO_CmdInitTypeDef structure and send the command
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350 | * @param SDIOx: Pointer to SDIO register base
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351 | * @param SDIO_CmdInitStruct: pointer to a SDIO_CmdInitTypeDef structure that contains
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352 | * the configuration information for the SDIO command
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353 | * @retval HAL status
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354 | */
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355 | HAL_StatusTypeDef SDIO_SendCommand(SDIO_TypeDef *SDIOx, SDIO_CmdInitTypeDef *SDIO_CmdInitStruct)
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356 | {
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357 | uint32_t tmpreg = 0;
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358 |
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359 | /* Check the parameters */
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360 | assert_param(IS_SDIO_CMD_INDEX(SDIO_CmdInitStruct->CmdIndex));
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361 | assert_param(IS_SDIO_RESPONSE(SDIO_CmdInitStruct->Response));
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362 | assert_param(IS_SDIO_WAIT(SDIO_CmdInitStruct->WaitForInterrupt));
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363 | assert_param(IS_SDIO_CPSM(SDIO_CmdInitStruct->CPSM));
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364 |
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365 | /* Set the SDIO Argument value */
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366 | SDIOx->ARG = SDIO_CmdInitStruct->Argument;
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367 |
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368 | /* Set SDIO command parameters */
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369 | tmpreg |= (uint32_t)(SDIO_CmdInitStruct->CmdIndex |\
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370 | SDIO_CmdInitStruct->Response |\
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371 | SDIO_CmdInitStruct->WaitForInterrupt |\
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372 | SDIO_CmdInitStruct->CPSM);
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373 |
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374 | /* Write to SDIO CMD register */
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375 | MODIFY_REG(SDIOx->CMD, CMD_CLEAR_MASK, tmpreg);
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376 |
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377 | return HAL_OK;
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378 | }
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379 |
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380 | /**
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381 | * @brief Return the command index of last command for which response received
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382 | * @param SDIOx: Pointer to SDIO register base
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383 | * @retval Command index of the last command response received
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384 | */
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385 | uint8_t SDIO_GetCommandResponse(SDIO_TypeDef *SDIOx)
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386 | {
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387 | return (uint8_t)(SDIOx->RESPCMD);
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388 | }
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389 |
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390 |
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391 | /**
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392 | * @brief Return the response received from the card for the last command
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393 | * @param SDIO_RESP: Specifies the SDIO response register.
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394 | * This parameter can be one of the following values:
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395 | * @arg SDIO_RESP1: Response Register 1
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396 | * @arg SDIO_RESP2: Response Register 2
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397 | * @arg SDIO_RESP3: Response Register 3
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398 | * @arg SDIO_RESP4: Response Register 4
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399 | * @retval The Corresponding response register value
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400 | */
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401 | uint32_t SDIO_GetResponse(uint32_t SDIO_RESP)
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402 | {
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403 | __IO uint32_t tmp = 0;
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404 |
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405 | /* Check the parameters */
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406 | assert_param(IS_SDIO_RESP(SDIO_RESP));
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407 |
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408 | /* Get the response */
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409 | tmp = SDIO_RESP_ADDR + SDIO_RESP;
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410 |
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411 | return (*(__IO uint32_t *) tmp);
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412 | }
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413 |
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414 | /**
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415 | * @brief Configure the SDIO data path according to the specified
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416 | * parameters in the SDIO_DataInitTypeDef.
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417 | * @param SDIOx: Pointer to SDIO register base
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418 | * @param SDIO_DataInitStruct : pointer to a SDIO_DataInitTypeDef structure
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419 | * that contains the configuration information for the SDIO command.
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420 | * @retval HAL status
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421 | */
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422 | HAL_StatusTypeDef SDIO_DataConfig(SDIO_TypeDef *SDIOx, SDIO_DataInitTypeDef* SDIO_DataInitStruct)
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423 | {
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424 | uint32_t tmpreg = 0;
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425 |
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426 | /* Check the parameters */
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427 | assert_param(IS_SDIO_DATA_LENGTH(SDIO_DataInitStruct->DataLength));
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428 | assert_param(IS_SDIO_BLOCK_SIZE(SDIO_DataInitStruct->DataBlockSize));
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429 | assert_param(IS_SDIO_TRANSFER_DIR(SDIO_DataInitStruct->TransferDir));
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430 | assert_param(IS_SDIO_TRANSFER_MODE(SDIO_DataInitStruct->TransferMode));
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431 | assert_param(IS_SDIO_DPSM(SDIO_DataInitStruct->DPSM));
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432 |
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433 | /* Set the SDIO Data Timeout value */
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434 | SDIOx->DTIMER = SDIO_DataInitStruct->DataTimeOut;
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435 |
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436 | /* Set the SDIO DataLength value */
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437 | SDIOx->DLEN = SDIO_DataInitStruct->DataLength;
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438 |
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439 | /* Set the SDIO data configuration parameters */
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440 | tmpreg |= (uint32_t)(SDIO_DataInitStruct->DataBlockSize |\
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441 | SDIO_DataInitStruct->TransferDir |\
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442 | SDIO_DataInitStruct->TransferMode |\
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443 | SDIO_DataInitStruct->DPSM);
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444 |
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445 | /* Write to SDIO DCTRL */
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446 | MODIFY_REG(SDIOx->DCTRL, DCTRL_CLEAR_MASK, tmpreg);
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447 |
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448 | return HAL_OK;
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449 |
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450 | }
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451 |
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452 | /**
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453 | * @brief Returns number of remaining data bytes to be transferred.
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454 | * @param SDIOx: Pointer to SDIO register base
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455 | * @retval Number of remaining data bytes to be transferred
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456 | */
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457 | uint32_t SDIO_GetDataCounter(SDIO_TypeDef *SDIOx)
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458 | {
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459 | return (SDIOx->DCOUNT);
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460 | }
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461 |
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462 | /**
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463 | * @brief Get the FIFO data
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464 | * @param SDIOx: Pointer to SDIO register base
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465 | * @retval Data received
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466 | */
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467 | uint32_t SDIO_GetFIFOCount(SDIO_TypeDef *SDIOx)
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468 | {
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469 | return (SDIOx->FIFO);
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470 | }
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471 |
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472 |
|
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473 | /**
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474 | * @brief Sets one of the two options of inserting read wait interval.
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475 | * @param SDIO_ReadWaitMode: SD I/O Read Wait operation mode.
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476 | * This parameter can be:
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477 | * @arg SDIO_READ_WAIT_MODE_CLK: Read Wait control by stopping SDIOCLK
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478 | * @arg SDIO_READ_WAIT_MODE_DATA2: Read Wait control using SDIO_DATA2
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479 | * @retval None
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480 | */
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481 | HAL_StatusTypeDef SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode)
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482 | {
|
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483 | /* Check the parameters */
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484 | assert_param(IS_SDIO_READWAIT_MODE(SDIO_ReadWaitMode));
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485 |
|
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486 | *(__IO uint32_t *)DCTRL_RWMOD_BB = SDIO_ReadWaitMode;
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487 |
|
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488 | return HAL_OK;
|
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489 | }
|
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490 |
|
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491 | /**
|
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492 | * @}
|
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493 | */
|
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494 |
|
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495 | /**
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496 | * @}
|
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497 | */
|
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498 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||
|
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499 | STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx */
|
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500 | #endif /* (HAL_SD_MODULE_ENABLED) || (HAL_MMC_MODULE_ENABLED) */
|
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501 | /**
|
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502 | * @}
|
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503 | */
|
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504 |
|
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505 | /**
|
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506 | * @}
|
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507 | */
|
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508 |
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509 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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