[303] | 1 | /**
|
---|
| 2 | ******************************************************************************
|
---|
| 3 | * @file stm32f4xx_ll_sdmmc.c
|
---|
| 4 | * @author MCD Application Team
|
---|
| 5 | * @version V1.4.1
|
---|
| 6 | * @date 09-October-2015
|
---|
| 7 | * @brief SDMMC Low Layer HAL module driver.
|
---|
| 8 | *
|
---|
| 9 | * This file provides firmware functions to manage the following
|
---|
| 10 | * functionalities of the SDMMC peripheral:
|
---|
| 11 | * + Initialization/de-initialization functions
|
---|
| 12 | * + I/O operation functions
|
---|
| 13 | * + Peripheral Control functions
|
---|
| 14 | * + Peripheral State functions
|
---|
| 15 | *
|
---|
| 16 | @verbatim
|
---|
| 17 | ==============================================================================
|
---|
| 18 | ##### SDMMC peripheral features #####
|
---|
| 19 | ==============================================================================
|
---|
| 20 | [..] The SD/SDIO MMC card host interface (SDIO) provides an interface between the APB2
|
---|
| 21 | peripheral bus and MultiMedia cards (MMCs), SD memory cards, SDIO cards and CE-ATA
|
---|
| 22 | devices.
|
---|
| 23 |
|
---|
| 24 | [..] The SDIO features include the following:
|
---|
| 25 | (+) Full compliance with MultiMedia Card System Specification Version 4.2. Card support
|
---|
| 26 | for three different databus modes: 1-bit (default), 4-bit and 8-bit
|
---|
| 27 | (+) Full compatibility with previous versions of MultiMedia Cards (forward compatibility)
|
---|
| 28 | (+) Full compliance with SD Memory Card Specifications Version 2.0
|
---|
| 29 | (+) Full compliance with SD I/O Card Specification Version 2.0: card support for two
|
---|
| 30 | different data bus modes: 1-bit (default) and 4-bit
|
---|
| 31 | (+) Full support of the CE-ATA features (full compliance with CE-ATA digital protocol
|
---|
| 32 | Rev1.1)
|
---|
| 33 | (+) Data transfer up to 48 MHz for the 8 bit mode
|
---|
| 34 | (+) Data and command output enable signals to control external bidirectional drivers.
|
---|
| 35 |
|
---|
| 36 |
|
---|
| 37 | ##### How to use this driver #####
|
---|
| 38 | ==============================================================================
|
---|
| 39 | [..]
|
---|
| 40 | This driver is a considered as a driver of service for external devices drivers
|
---|
| 41 | that interfaces with the SDIO peripheral.
|
---|
| 42 | According to the device used (SD card/ MMC card / SDIO card ...), a set of APIs
|
---|
| 43 | is used in the device's driver to perform SDIO operations and functionalities.
|
---|
| 44 |
|
---|
| 45 | This driver is almost transparent for the final user, it is only used to implement other
|
---|
| 46 | functionalities of the external device.
|
---|
| 47 |
|
---|
| 48 | [..]
|
---|
| 49 | (+) The SDIO clock (SDIOCLK = 48 MHz) is coming from a specific output of PLL
|
---|
| 50 | (PLL48CLK). Before start working with SDIO peripheral make sure that the
|
---|
| 51 | PLL is well configured.
|
---|
| 52 | The SDIO peripheral uses two clock signals:
|
---|
| 53 | (++) SDIO adapter clock (SDIOCLK = 48 MHz)
|
---|
| 54 | (++) APB2 bus clock (PCLK2)
|
---|
| 55 |
|
---|
| 56 | -@@- PCLK2 and SDIO_CK clock frequencies must respect the following condition:
|
---|
| 57 | Frequency(PCLK2) >= (3 / 8 x Frequency(SDIO_CK))
|
---|
| 58 |
|
---|
| 59 | (+) Enable/Disable peripheral clock using RCC peripheral macros related to SDIO
|
---|
| 60 | peripheral.
|
---|
| 61 |
|
---|
| 62 | (+) Enable the Power ON State using the SDIO_PowerState_ON(SDIOx)
|
---|
| 63 | function and disable it using the function SDIO_PowerState_OFF(SDIOx).
|
---|
| 64 |
|
---|
| 65 | (+) Enable/Disable the clock using the __SDIO_ENABLE()/__SDIO_DISABLE() macros.
|
---|
| 66 |
|
---|
| 67 | (+) Enable/Disable the peripheral interrupts using the macros __SDIO_ENABLE_IT(hsdio, IT)
|
---|
| 68 | and __SDIO_DISABLE_IT(hsdio, IT) if you need to use interrupt mode.
|
---|
| 69 |
|
---|
| 70 | (+) When using the DMA mode
|
---|
| 71 | (++) Configure the DMA in the MSP layer of the external device
|
---|
| 72 | (++) Active the needed channel Request
|
---|
| 73 | (++) Enable the DMA using __SDIO_DMA_ENABLE() macro or Disable it using the macro
|
---|
| 74 | __SDIO_DMA_DISABLE().
|
---|
| 75 |
|
---|
| 76 | (+) To control the CPSM (Command Path State Machine) and send
|
---|
| 77 | commands to the card use the SDIO_SendCommand(SDIOx),
|
---|
| 78 | SDIO_GetCommandResponse() and SDIO_GetResponse() functions. First, user has
|
---|
| 79 | to fill the command structure (pointer to SDIO_CmdInitTypeDef) according
|
---|
| 80 | to the selected command to be sent.
|
---|
| 81 | The parameters that should be filled are:
|
---|
| 82 | (++) Command Argument
|
---|
| 83 | (++) Command Index
|
---|
| 84 | (++) Command Response type
|
---|
| 85 | (++) Command Wait
|
---|
| 86 | (++) CPSM Status (Enable or Disable).
|
---|
| 87 |
|
---|
| 88 | -@@- To check if the command is well received, read the SDIO_CMDRESP
|
---|
| 89 | register using the SDIO_GetCommandResponse().
|
---|
| 90 | The SDIO responses registers (SDIO_RESP1 to SDIO_RESP2), use the
|
---|
| 91 | SDIO_GetResponse() function.
|
---|
| 92 |
|
---|
| 93 | (+) To control the DPSM (Data Path State Machine) and send/receive
|
---|
| 94 | data to/from the card use the SDIO_DataConfig(), SDIO_GetDataCounter(),
|
---|
| 95 | SDIO_ReadFIFO(), DIO_WriteFIFO() and SDIO_GetFIFOCount() functions.
|
---|
| 96 |
|
---|
| 97 | *** Read Operations ***
|
---|
| 98 | =======================
|
---|
| 99 | [..]
|
---|
| 100 | (#) First, user has to fill the data structure (pointer to
|
---|
| 101 | SDIO_DataInitTypeDef) according to the selected data type to be received.
|
---|
| 102 | The parameters that should be filled are:
|
---|
| 103 | (++) Data Timeout
|
---|
| 104 | (++) Data Length
|
---|
| 105 | (++) Data Block size
|
---|
| 106 | (++) Data Transfer direction: should be from card (To SDIO)
|
---|
| 107 | (++) Data Transfer mode
|
---|
| 108 | (++) DPSM Status (Enable or Disable)
|
---|
| 109 |
|
---|
| 110 | (#) Configure the SDIO resources to receive the data from the card
|
---|
| 111 | according to selected transfer mode (Refer to Step 8, 9 and 10).
|
---|
| 112 |
|
---|
| 113 | (#) Send the selected Read command (refer to step 11).
|
---|
| 114 |
|
---|
| 115 | (#) Use the SDIO flags/interrupts to check the transfer status.
|
---|
| 116 |
|
---|
| 117 | *** Write Operations ***
|
---|
| 118 | ========================
|
---|
| 119 | [..]
|
---|
| 120 | (#) First, user has to fill the data structure (pointer to
|
---|
| 121 | SDIO_DataInitTypeDef) according to the selected data type to be received.
|
---|
| 122 | The parameters that should be filled are:
|
---|
| 123 | (++) Data Timeout
|
---|
| 124 | (++) Data Length
|
---|
| 125 | (++) Data Block size
|
---|
| 126 | (++) Data Transfer direction: should be to card (To CARD)
|
---|
| 127 | (++) Data Transfer mode
|
---|
| 128 | (++) DPSM Status (Enable or Disable)
|
---|
| 129 |
|
---|
| 130 | (#) Configure the SDIO resources to send the data to the card according to
|
---|
| 131 | selected transfer mode.
|
---|
| 132 |
|
---|
| 133 | (#) Send the selected Write command.
|
---|
| 134 |
|
---|
| 135 | (#) Use the SDIO flags/interrupts to check the transfer status.
|
---|
| 136 |
|
---|
| 137 | @endverbatim
|
---|
| 138 | ******************************************************************************
|
---|
| 139 | * @attention
|
---|
| 140 | *
|
---|
| 141 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
|
---|
| 142 | *
|
---|
| 143 | * Redistribution and use in source and binary forms, with or without modification,
|
---|
| 144 | * are permitted provided that the following conditions are met:
|
---|
| 145 | * 1. Redistributions of source code must retain the above copyright notice,
|
---|
| 146 | * this list of conditions and the following disclaimer.
|
---|
| 147 | * 2. Redistributions in binary form must reproduce the above copyright notice,
|
---|
| 148 | * this list of conditions and the following disclaimer in the documentation
|
---|
| 149 | * and/or other materials provided with the distribution.
|
---|
| 150 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
|
---|
| 151 | * may be used to endorse or promote products derived from this software
|
---|
| 152 | * without specific prior written permission.
|
---|
| 153 | *
|
---|
| 154 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
|
---|
| 155 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
---|
| 156 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
---|
| 157 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
|
---|
| 158 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
---|
| 159 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
---|
| 160 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
|
---|
| 161 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
---|
| 162 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
---|
| 163 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
---|
| 164 | *
|
---|
| 165 | ******************************************************************************
|
---|
| 166 | */
|
---|
| 167 |
|
---|
| 168 | /* Includes ------------------------------------------------------------------*/
|
---|
| 169 | #include "stm32f4xx_hal.h"
|
---|
| 170 |
|
---|
| 171 | /** @addtogroup STM32F4xx_HAL_Driver
|
---|
| 172 | * @{
|
---|
| 173 | */
|
---|
| 174 |
|
---|
| 175 | /** @defgroup SDMMC_LL SDMMC Low Layer
|
---|
| 176 | * @brief Low layer module for SD and MMC driver
|
---|
| 177 | * @{
|
---|
| 178 | */
|
---|
| 179 |
|
---|
| 180 | #if defined(HAL_SD_MODULE_ENABLED) || defined(HAL_MMC_MODULE_ENABLED)
|
---|
| 181 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
|
---|
| 182 | defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
|
---|
| 183 | defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || \
|
---|
| 184 | defined(STM32F469xx) || defined(STM32F479xx)
|
---|
| 185 | /* Private typedef -----------------------------------------------------------*/
|
---|
| 186 | /* Private define ------------------------------------------------------------*/
|
---|
| 187 | /* Private macro -------------------------------------------------------------*/
|
---|
| 188 | /* Private variables ---------------------------------------------------------*/
|
---|
| 189 | /* Private function prototypes -----------------------------------------------*/
|
---|
| 190 | /* Private functions ---------------------------------------------------------*/
|
---|
| 191 |
|
---|
| 192 | /** @defgroup SDMMC_LL_Exported_Functions SDMMC_LL Exported Functions
|
---|
| 193 | * @{
|
---|
| 194 | */
|
---|
| 195 |
|
---|
| 196 | /** @defgroup HAL_SDMMC_LL_Group1 Initialization/de-initialization functions
|
---|
| 197 | * @brief Initialization and Configuration functions
|
---|
| 198 | *
|
---|
| 199 | @verbatim
|
---|
| 200 | ===============================================================================
|
---|
| 201 | ##### Initialization/de-initialization functions #####
|
---|
| 202 | ===============================================================================
|
---|
| 203 | [..] This section provides functions allowing to:
|
---|
| 204 |
|
---|
| 205 | @endverbatim
|
---|
| 206 | * @{
|
---|
| 207 | */
|
---|
| 208 |
|
---|
| 209 | /**
|
---|
| 210 | * @brief Initializes the SDIO according to the specified
|
---|
| 211 | * parameters in the SDIO_InitTypeDef and create the associated handle.
|
---|
| 212 | * @param SDIOx: Pointer to SDIO register base
|
---|
| 213 | * @param Init: SDIO initialization structure
|
---|
| 214 | * @retval HAL status
|
---|
| 215 | */
|
---|
| 216 | HAL_StatusTypeDef SDIO_Init(SDIO_TypeDef *SDIOx, SDIO_InitTypeDef Init)
|
---|
| 217 | {
|
---|
| 218 | uint32_t tmpreg = 0;
|
---|
| 219 |
|
---|
| 220 | /* Check the parameters */
|
---|
| 221 | assert_param(IS_SDIO_ALL_INSTANCE(SDIOx));
|
---|
| 222 | assert_param(IS_SDIO_CLOCK_EDGE(Init.ClockEdge));
|
---|
| 223 | assert_param(IS_SDIO_CLOCK_BYPASS(Init.ClockBypass));
|
---|
| 224 | assert_param(IS_SDIO_CLOCK_POWER_SAVE(Init.ClockPowerSave));
|
---|
| 225 | assert_param(IS_SDIO_BUS_WIDE(Init.BusWide));
|
---|
| 226 | assert_param(IS_SDIO_HARDWARE_FLOW_CONTROL(Init.HardwareFlowControl));
|
---|
| 227 | assert_param(IS_SDIO_CLKDIV(Init.ClockDiv));
|
---|
| 228 |
|
---|
| 229 | /* Set SDIO configuration parameters */
|
---|
| 230 | tmpreg |= (Init.ClockEdge |\
|
---|
| 231 | Init.ClockBypass |\
|
---|
| 232 | Init.ClockPowerSave |\
|
---|
| 233 | Init.BusWide |\
|
---|
| 234 | Init.HardwareFlowControl |\
|
---|
| 235 | Init.ClockDiv
|
---|
| 236 | );
|
---|
| 237 |
|
---|
| 238 | /* Write to SDIO CLKCR */
|
---|
| 239 | MODIFY_REG(SDIOx->CLKCR, CLKCR_CLEAR_MASK, tmpreg);
|
---|
| 240 |
|
---|
| 241 | return HAL_OK;
|
---|
| 242 | }
|
---|
| 243 |
|
---|
| 244 | /**
|
---|
| 245 | * @}
|
---|
| 246 | */
|
---|
| 247 |
|
---|
| 248 | /** @defgroup HAL_SDMMC_LL_Group2 I/O operation functions
|
---|
| 249 | * @brief Data transfers functions
|
---|
| 250 | *
|
---|
| 251 | @verbatim
|
---|
| 252 | ===============================================================================
|
---|
| 253 | ##### I/O operation functions #####
|
---|
| 254 | ===============================================================================
|
---|
| 255 | [..]
|
---|
| 256 | This subsection provides a set of functions allowing to manage the SDIO data
|
---|
| 257 | transfers.
|
---|
| 258 |
|
---|
| 259 | @endverbatim
|
---|
| 260 | * @{
|
---|
| 261 | */
|
---|
| 262 |
|
---|
| 263 | /**
|
---|
| 264 | * @brief Read data (word) from Rx FIFO in blocking mode (polling)
|
---|
| 265 | * @param SDIOx: Pointer to SDIO register base
|
---|
| 266 | * @retval HAL status
|
---|
| 267 | */
|
---|
| 268 | uint32_t SDIO_ReadFIFO(SDIO_TypeDef *SDIOx)
|
---|
| 269 | {
|
---|
| 270 | /* Read data from Rx FIFO */
|
---|
| 271 | return (SDIOx->FIFO);
|
---|
| 272 | }
|
---|
| 273 |
|
---|
| 274 | /**
|
---|
| 275 | * @brief Write data (word) to Tx FIFO in blocking mode (polling)
|
---|
| 276 | * @param SDIOx: Pointer to SDIO register base
|
---|
| 277 | * @param pWriteData: pointer to data to write
|
---|
| 278 | * @retval HAL status
|
---|
| 279 | */
|
---|
| 280 | HAL_StatusTypeDef SDIO_WriteFIFO(SDIO_TypeDef *SDIOx, uint32_t *pWriteData)
|
---|
| 281 | {
|
---|
| 282 | /* Write data to FIFO */
|
---|
| 283 | SDIOx->FIFO = *pWriteData;
|
---|
| 284 |
|
---|
| 285 | return HAL_OK;
|
---|
| 286 | }
|
---|
| 287 |
|
---|
| 288 | /**
|
---|
| 289 | * @}
|
---|
| 290 | */
|
---|
| 291 |
|
---|
| 292 | /** @defgroup HAL_SDMMC_LL_Group3 Peripheral Control functions
|
---|
| 293 | * @brief management functions
|
---|
| 294 | *
|
---|
| 295 | @verbatim
|
---|
| 296 | ===============================================================================
|
---|
| 297 | ##### Peripheral Control functions #####
|
---|
| 298 | ===============================================================================
|
---|
| 299 | [..]
|
---|
| 300 | This subsection provides a set of functions allowing to control the SDIO data
|
---|
| 301 | transfers.
|
---|
| 302 |
|
---|
| 303 | @endverbatim
|
---|
| 304 | * @{
|
---|
| 305 | */
|
---|
| 306 |
|
---|
| 307 | /**
|
---|
| 308 | * @brief Set SDIO Power state to ON.
|
---|
| 309 | * @param SDIOx: Pointer to SDIO register base
|
---|
| 310 | * @retval HAL status
|
---|
| 311 | */
|
---|
| 312 | HAL_StatusTypeDef SDIO_PowerState_ON(SDIO_TypeDef *SDIOx)
|
---|
| 313 | {
|
---|
| 314 | /* Set power state to ON */
|
---|
| 315 | SDIOx->POWER = SDIO_POWER_PWRCTRL;
|
---|
| 316 |
|
---|
| 317 | return HAL_OK;
|
---|
| 318 | }
|
---|
| 319 |
|
---|
| 320 | /**
|
---|
| 321 | * @brief Set SDIO Power state to OFF.
|
---|
| 322 | * @param SDIOx: Pointer to SDIO register base
|
---|
| 323 | * @retval HAL status
|
---|
| 324 | */
|
---|
| 325 | HAL_StatusTypeDef SDIO_PowerState_OFF(SDIO_TypeDef *SDIOx)
|
---|
| 326 | {
|
---|
| 327 | /* Set power state to OFF */
|
---|
| 328 | SDIOx->POWER = (uint32_t)0x00000000;
|
---|
| 329 |
|
---|
| 330 | return HAL_OK;
|
---|
| 331 | }
|
---|
| 332 |
|
---|
| 333 | /**
|
---|
| 334 | * @brief Get SDIO Power state.
|
---|
| 335 | * @param SDIOx: Pointer to SDIO register base
|
---|
| 336 | * @retval Power status of the controller. The returned value can be one of the
|
---|
| 337 | * following values:
|
---|
| 338 | * - 0x00: Power OFF
|
---|
| 339 | * - 0x02: Power UP
|
---|
| 340 | * - 0x03: Power ON
|
---|
| 341 | */
|
---|
| 342 | uint32_t SDIO_GetPowerState(SDIO_TypeDef *SDIOx)
|
---|
| 343 | {
|
---|
| 344 | return (SDIOx->POWER & SDIO_POWER_PWRCTRL);
|
---|
| 345 | }
|
---|
| 346 |
|
---|
| 347 | /**
|
---|
| 348 | * @brief Configure the SDIO command path according to the specified parameters in
|
---|
| 349 | * SDIO_CmdInitTypeDef structure and send the command
|
---|
| 350 | * @param SDIOx: Pointer to SDIO register base
|
---|
| 351 | * @param SDIO_CmdInitStruct: pointer to a SDIO_CmdInitTypeDef structure that contains
|
---|
| 352 | * the configuration information for the SDIO command
|
---|
| 353 | * @retval HAL status
|
---|
| 354 | */
|
---|
| 355 | HAL_StatusTypeDef SDIO_SendCommand(SDIO_TypeDef *SDIOx, SDIO_CmdInitTypeDef *SDIO_CmdInitStruct)
|
---|
| 356 | {
|
---|
| 357 | uint32_t tmpreg = 0;
|
---|
| 358 |
|
---|
| 359 | /* Check the parameters */
|
---|
| 360 | assert_param(IS_SDIO_CMD_INDEX(SDIO_CmdInitStruct->CmdIndex));
|
---|
| 361 | assert_param(IS_SDIO_RESPONSE(SDIO_CmdInitStruct->Response));
|
---|
| 362 | assert_param(IS_SDIO_WAIT(SDIO_CmdInitStruct->WaitForInterrupt));
|
---|
| 363 | assert_param(IS_SDIO_CPSM(SDIO_CmdInitStruct->CPSM));
|
---|
| 364 |
|
---|
| 365 | /* Set the SDIO Argument value */
|
---|
| 366 | SDIOx->ARG = SDIO_CmdInitStruct->Argument;
|
---|
| 367 |
|
---|
| 368 | /* Set SDIO command parameters */
|
---|
| 369 | tmpreg |= (uint32_t)(SDIO_CmdInitStruct->CmdIndex |\
|
---|
| 370 | SDIO_CmdInitStruct->Response |\
|
---|
| 371 | SDIO_CmdInitStruct->WaitForInterrupt |\
|
---|
| 372 | SDIO_CmdInitStruct->CPSM);
|
---|
| 373 |
|
---|
| 374 | /* Write to SDIO CMD register */
|
---|
| 375 | MODIFY_REG(SDIOx->CMD, CMD_CLEAR_MASK, tmpreg);
|
---|
| 376 |
|
---|
| 377 | return HAL_OK;
|
---|
| 378 | }
|
---|
| 379 |
|
---|
| 380 | /**
|
---|
| 381 | * @brief Return the command index of last command for which response received
|
---|
| 382 | * @param SDIOx: Pointer to SDIO register base
|
---|
| 383 | * @retval Command index of the last command response received
|
---|
| 384 | */
|
---|
| 385 | uint8_t SDIO_GetCommandResponse(SDIO_TypeDef *SDIOx)
|
---|
| 386 | {
|
---|
| 387 | return (uint8_t)(SDIOx->RESPCMD);
|
---|
| 388 | }
|
---|
| 389 |
|
---|
| 390 |
|
---|
| 391 | /**
|
---|
| 392 | * @brief Return the response received from the card for the last command
|
---|
| 393 | * @param SDIO_RESP: Specifies the SDIO response register.
|
---|
| 394 | * This parameter can be one of the following values:
|
---|
| 395 | * @arg SDIO_RESP1: Response Register 1
|
---|
| 396 | * @arg SDIO_RESP2: Response Register 2
|
---|
| 397 | * @arg SDIO_RESP3: Response Register 3
|
---|
| 398 | * @arg SDIO_RESP4: Response Register 4
|
---|
| 399 | * @retval The Corresponding response register value
|
---|
| 400 | */
|
---|
| 401 | uint32_t SDIO_GetResponse(uint32_t SDIO_RESP)
|
---|
| 402 | {
|
---|
| 403 | __IO uint32_t tmp = 0;
|
---|
| 404 |
|
---|
| 405 | /* Check the parameters */
|
---|
| 406 | assert_param(IS_SDIO_RESP(SDIO_RESP));
|
---|
| 407 |
|
---|
| 408 | /* Get the response */
|
---|
| 409 | tmp = SDIO_RESP_ADDR + SDIO_RESP;
|
---|
| 410 |
|
---|
| 411 | return (*(__IO uint32_t *) tmp);
|
---|
| 412 | }
|
---|
| 413 |
|
---|
| 414 | /**
|
---|
| 415 | * @brief Configure the SDIO data path according to the specified
|
---|
| 416 | * parameters in the SDIO_DataInitTypeDef.
|
---|
| 417 | * @param SDIOx: Pointer to SDIO register base
|
---|
| 418 | * @param SDIO_DataInitStruct : pointer to a SDIO_DataInitTypeDef structure
|
---|
| 419 | * that contains the configuration information for the SDIO command.
|
---|
| 420 | * @retval HAL status
|
---|
| 421 | */
|
---|
| 422 | HAL_StatusTypeDef SDIO_DataConfig(SDIO_TypeDef *SDIOx, SDIO_DataInitTypeDef* SDIO_DataInitStruct)
|
---|
| 423 | {
|
---|
| 424 | uint32_t tmpreg = 0;
|
---|
| 425 |
|
---|
| 426 | /* Check the parameters */
|
---|
| 427 | assert_param(IS_SDIO_DATA_LENGTH(SDIO_DataInitStruct->DataLength));
|
---|
| 428 | assert_param(IS_SDIO_BLOCK_SIZE(SDIO_DataInitStruct->DataBlockSize));
|
---|
| 429 | assert_param(IS_SDIO_TRANSFER_DIR(SDIO_DataInitStruct->TransferDir));
|
---|
| 430 | assert_param(IS_SDIO_TRANSFER_MODE(SDIO_DataInitStruct->TransferMode));
|
---|
| 431 | assert_param(IS_SDIO_DPSM(SDIO_DataInitStruct->DPSM));
|
---|
| 432 |
|
---|
| 433 | /* Set the SDIO Data Timeout value */
|
---|
| 434 | SDIOx->DTIMER = SDIO_DataInitStruct->DataTimeOut;
|
---|
| 435 |
|
---|
| 436 | /* Set the SDIO DataLength value */
|
---|
| 437 | SDIOx->DLEN = SDIO_DataInitStruct->DataLength;
|
---|
| 438 |
|
---|
| 439 | /* Set the SDIO data configuration parameters */
|
---|
| 440 | tmpreg |= (uint32_t)(SDIO_DataInitStruct->DataBlockSize |\
|
---|
| 441 | SDIO_DataInitStruct->TransferDir |\
|
---|
| 442 | SDIO_DataInitStruct->TransferMode |\
|
---|
| 443 | SDIO_DataInitStruct->DPSM);
|
---|
| 444 |
|
---|
| 445 | /* Write to SDIO DCTRL */
|
---|
| 446 | MODIFY_REG(SDIOx->DCTRL, DCTRL_CLEAR_MASK, tmpreg);
|
---|
| 447 |
|
---|
| 448 | return HAL_OK;
|
---|
| 449 |
|
---|
| 450 | }
|
---|
| 451 |
|
---|
| 452 | /**
|
---|
| 453 | * @brief Returns number of remaining data bytes to be transferred.
|
---|
| 454 | * @param SDIOx: Pointer to SDIO register base
|
---|
| 455 | * @retval Number of remaining data bytes to be transferred
|
---|
| 456 | */
|
---|
| 457 | uint32_t SDIO_GetDataCounter(SDIO_TypeDef *SDIOx)
|
---|
| 458 | {
|
---|
| 459 | return (SDIOx->DCOUNT);
|
---|
| 460 | }
|
---|
| 461 |
|
---|
| 462 | /**
|
---|
| 463 | * @brief Get the FIFO data
|
---|
| 464 | * @param SDIOx: Pointer to SDIO register base
|
---|
| 465 | * @retval Data received
|
---|
| 466 | */
|
---|
| 467 | uint32_t SDIO_GetFIFOCount(SDIO_TypeDef *SDIOx)
|
---|
| 468 | {
|
---|
| 469 | return (SDIOx->FIFO);
|
---|
| 470 | }
|
---|
| 471 |
|
---|
| 472 |
|
---|
| 473 | /**
|
---|
| 474 | * @brief Sets one of the two options of inserting read wait interval.
|
---|
| 475 | * @param SDIO_ReadWaitMode: SD I/O Read Wait operation mode.
|
---|
| 476 | * This parameter can be:
|
---|
| 477 | * @arg SDIO_READ_WAIT_MODE_CLK: Read Wait control by stopping SDIOCLK
|
---|
| 478 | * @arg SDIO_READ_WAIT_MODE_DATA2: Read Wait control using SDIO_DATA2
|
---|
| 479 | * @retval None
|
---|
| 480 | */
|
---|
| 481 | HAL_StatusTypeDef SDIO_SetSDIOReadWaitMode(uint32_t SDIO_ReadWaitMode)
|
---|
| 482 | {
|
---|
| 483 | /* Check the parameters */
|
---|
| 484 | assert_param(IS_SDIO_READWAIT_MODE(SDIO_ReadWaitMode));
|
---|
| 485 |
|
---|
| 486 | *(__IO uint32_t *)DCTRL_RWMOD_BB = SDIO_ReadWaitMode;
|
---|
| 487 |
|
---|
| 488 | return HAL_OK;
|
---|
| 489 | }
|
---|
| 490 |
|
---|
| 491 | /**
|
---|
| 492 | * @}
|
---|
| 493 | */
|
---|
| 494 |
|
---|
| 495 | /**
|
---|
| 496 | * @}
|
---|
| 497 | */
|
---|
| 498 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||
|
---|
| 499 | STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx */
|
---|
| 500 | #endif /* (HAL_SD_MODULE_ENABLED) || (HAL_MMC_MODULE_ENABLED) */
|
---|
| 501 | /**
|
---|
| 502 | * @}
|
---|
| 503 | */
|
---|
| 504 |
|
---|
| 505 | /**
|
---|
| 506 | * @}
|
---|
| 507 | */
|
---|
| 508 |
|
---|
| 509 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
|
---|