source: asp3_wo_tecs/trunk/arch/arm_m_gcc/stm32f4xx_stm32cube/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spdifrx.c@ 303

Last change on this file since 303 was 303, checked in by ertl-honda, 7 years ago

nucleo_f401re依存部の追加
File size: 39.6 KB
Line 
1/**
2 ******************************************************************************
3 * @file stm32f4xx_hal_spdifrx.c
4 * @author MCD Application Team
5 * @version V1.4.1
6 * @date 09-October-2015
7 * @brief This file provides firmware functions to manage the following
8 * functionalities of the SPDIFRX audio interface:
9 * + Initialization and Configuration
10 * + Data transfers functions
11 * + DMA transfers management
12 * + Interrupts and flags management
13 @verbatim
14 ===============================================================================
15 ##### How to use this driver #####
16 ===============================================================================
17 [..]
18 The SPDIFRX HAL driver can be used as follow:
19
20 (#) Declare SPDIFRX_HandleTypeDef handle structure.
21 (#) Initialize the SPDIFRX low level resources by implement the HAL_SPDIFRX_MspInit() API:
22 (##) Enable the SPDIFRX interface clock.
23 (##) SPDIFRX pins configuration:
24 (+++) Enable the clock for the SPDIFRX GPIOs.
25 (+++) Configure these SPDIFRX pins as alternate function pull-up.
26 (##) NVIC configuration if you need to use interrupt process (HAL_SPDIFRX_ReceiveControlFlow_IT() and HAL_SPDIFRX_ReceiveDataFlow_IT() API's).
27 (+++) Configure the SPDIFRX interrupt priority.
28 (+++) Enable the NVIC SPDIFRX IRQ handle.
29 (##) DMA Configuration if you need to use DMA process (HAL_SPDIFRX_ReceiveDataFlow_DMA() and HAL_SPDIFRX_ReceiveControlFlow_DMA() API's).
30 (+++) Declare a DMA handle structure for the reception of the Data Flow channel.
31 (+++) Declare a DMA handle structure for the reception of the Control Flow channel.
32 (+++) Enable the DMAx interface clock.
33 (+++) Configure the declared DMA handle structure CtrlRx/DataRx with the required parameters.
34 (+++) Configure the DMA Channel.
35 (+++) Associate the initialized DMA handle to the SPDIFRX DMA CtrlRx/DataRx handle.
36 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the
37 DMA CtrlRx/DataRx channel.
38
39 (#) Program the input selection, re-tries number, wait for activity, channel status selection, data format, stereo mode and masking of user bits
40 using HAL_SPDIFRX_Init() function.
41
42 -@- The specific SPDIFRX interrupts (RXNE/CSRNE and Error Interrupts) will be managed using the macros
43 __SPDIFRX_ENABLE_IT() and __SPDIFRX_DISABLE_IT() inside the receive process.
44 -@- Make sure that ck_spdif clock is configured.
45
46 (#) Three operation modes are available within this driver :
47
48 *** Polling mode for reception operation (for debug purpose) ***
49 ================================================================
50 [..]
51 (+) Receive data flow in blocking mode using HAL_SPDIFRX_ReceiveDataFlow()
52 (+) Receive control flow of data in blocking mode using HAL_SPDIFRX_ReceiveControlFlow()
53
54 *** Interrupt mode for reception operation ***
55 =========================================
56 [..]
57 (+) Receive an amount of data (Data Flow) in non blocking mode using HAL_SPDIFRX_ReceiveDataFlow_IT()
58 (+) Receive an amount of data (Control Flow) in non blocking mode using HAL_SPDIFRX_ReceiveControlFlow_IT()
59 (+) At reception end of half transfer HAL_SPDIFRX_RxHalfCpltCallback is executed and user can
60 add his own code by customization of function pointer HAL_SPDIFRX_RxHalfCpltCallback
61 (+) At reception end of transfer HAL_SPDIFRX_RxCpltCallback is executed and user can
62 add his own code by customization of function pointer HAL_SPDIFRX_RxCpltCallback
63 (+) In case of transfer Error, HAL_SPDIFRX_ErrorCallback() function is executed and user can
64 add his own code by customization of function pointer HAL_SPDIFRX_ErrorCallback
65
66 *** DMA mode for reception operation ***
67 ========================================
68 [..]
69 (+) Receive an amount of data (Data Flow) in non blocking mode (DMA) using HAL_SPDIFRX_ReceiveDataFlow_DMA()
70 (+) Receive an amount of data (Control Flow) in non blocking mode (DMA) using HAL_SPDIFRX_ReceiveControlFlow_DMA()
71 (+) At reception end of half transfer HAL_SPDIFRX_RxHalfCpltCallback is executed and user can
72 add his own code by customization of function pointer HAL_SPDIFRX_RxHalfCpltCallback
73 (+) At reception end of transfer HAL_SPDIFRX_RxCpltCallback is executed and user can
74 add his own code by customization of function pointer HAL_SPDIFRX_RxCpltCallback
75 (+) In case of transfer Error, HAL_SPDIFRX_ErrorCallback() function is executed and user can
76 add his own code by customization of function pointer HAL_SPDIFRX_ErrorCallback
77 (+) Stop the DMA Transfer using HAL_SPDIFRX_DMAStop()
78
79 *** SPDIFRX HAL driver macros list ***
80 =============================================
81 [..]
82 Below the list of most used macros in USART HAL driver.
83 (+) __HAL_SPDIFRX_IDLE: Disable the specified SPDIFRX peripheral (IDEL State)
84 (+) __HAL_SPDIFRX_SYNC: Enable the synchronization state of the specified SPDIFRX peripheral (SYNC State)
85 (+) __HAL_SPDIFRX_RCV: Enable the receive state of the specified SPDIFRX peripheral (RCV State)
86 (+) __HAL_SPDIFRX_ENABLE_IT : Enable the specified SPDIFRX interrupts
87 (+) __HAL_SPDIFRX_DISABLE_IT : Disable the specified SPDIFRX interrupts
88 (+) __HAL_SPDIFRX_GET_FLAG: Check whether the specified SPDIFRX flag is set or not.
89
90 [..]
91 (@) You can refer to the SPDIFRX HAL driver header file for more useful macros
92
93 @endverbatim
94 ******************************************************************************
95 * @attention
96 *
97 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
98 *
99 * Redistribution and use in source and binary forms, with or without modification,
100 * are permitted provided that the following conditions are met:
101 * 1. Redistributions of source code must retain the above copyright notice,
102 * this list of conditions and the following disclaimer.
103 * 2. Redistributions in binary form must reproduce the above copyright notice,
104 * this list of conditions and the following disclaimer in the documentation
105 * and/or other materials provided with the distribution.
106 * 3. Neither the name of STMicroelectronics nor the names of its contributors
107 * may be used to endorse or promote products derived from this software
108 * without specific prior written permission.
109 *
110 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
111 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
112 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
113 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
114 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
115 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
116 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
117 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
118 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
119 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
120 *
121 ******************************************************************************
122 */
123
124/* Includes ------------------------------------------------------------------*/
125#include "stm32f4xx_hal.h"
126
127/** @addtogroup STM32F4xx_HAL_Driver
128 * @{
129 */
130/** @defgroup SPDIFRX SPDIFRX
131 * @brief SPDIFRX HAL module driver
132 * @{
133 */
134
135#ifdef HAL_SPDIFRX_MODULE_ENABLED
136
137#if defined(STM32F446xx)
138
139/* Private typedef -----------------------------------------------------------*/
140/* Private define ------------------------------------------------------------*/
141#define SPDIFRX_TIMEOUT_VALUE 0xFFFF
142
143/* Private macro -------------------------------------------------------------*/
144/* Private variables ---------------------------------------------------------*/
145/* Private function prototypes -----------------------------------------------*/
146/** @addtogroup SPDIFRX_Private_Functions
147 * @{
148 */
149static void SPDIFRX_DMARxCplt(DMA_HandleTypeDef *hdma);
150static void SPDIFRX_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
151static void SPDIFRX_DMACxCplt(DMA_HandleTypeDef *hdma);
152static void SPDIFRX_DMACxHalfCplt(DMA_HandleTypeDef *hdma);
153static void SPDIFRX_DMAError(DMA_HandleTypeDef *hdma);
154static void SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif);
155static void SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif);
156static HAL_StatusTypeDef SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef *hspdif, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
157/**
158 * @}
159 */
160/* Exported functions ---------------------------------------------------------*/
161
162/** @defgroup SPDIFRX_Exported_Functions SPDIFRX Exported Functions
163 * @{
164 */
165
166/** @defgroup SPDIFRX_Exported_Functions_Group1 Initialization and de-initialization functions
167 * @brief Initialization and Configuration functions
168 *
169 @verbatim
170 ===============================================================================
171 ##### Initialization and de-initialization functions #####
172 ===============================================================================
173 [..] This subsection provides a set of functions allowing to initialize and
174 de-initialize the SPDIFRX peripheral:
175
176 (+) User must Implement HAL_SPDIFRX_MspInit() function in which he configures
177 all related peripherals resources (CLOCK, GPIO, DMA, IT and NVIC ).
178
179 (+) Call the function HAL_SPDIFRX_Init() to configure the SPDIFRX peripheral with
180 the selected configuration:
181 (++) Input Selection (IN0, IN1,...)
182 (++) Maximum allowed re-tries during synchronization phase
183 (++) Wait for activity on SPDIF selected input
184 (++) Channel status selection (from channel A or B)
185 (++) Data format (LSB, MSB, ...)
186 (++) Stereo mode
187 (++) User bits masking (PT,C,U,V,...)
188
189 (+) Call the function HAL_SPDIFRX_DeInit() to restore the default configuration
190 of the selected SPDIFRXx peripheral.
191 @endverbatim
192 * @{
193 */
194
195/**
196 * @brief Initializes the SPDIFRX according to the specified parameters
197 * in the SPDIFRX_InitTypeDef and create the associated handle.
198 * @param hspdif: SPDIFRX handle
199 * @retval HAL status
200 */
201HAL_StatusTypeDef HAL_SPDIFRX_Init(SPDIFRX_HandleTypeDef *hspdif)
202{
203 uint32_t tmpreg = 0;
204
205 /* Check the SPDIFRX handle allocation */
206 if(hspdif == NULL)
207 {
208 return HAL_ERROR;
209 }
210
211 /* Check the SPDIFRX parameters */
212 assert_param(IS_STEREO_MODE(hspdif->Init.StereoMode));
213 assert_param(IS_SPDIFRX_INPUT_SELECT(hspdif->Init.InputSelection));
214 assert_param(IS_SPDIFRX_MAX_RETRIES(hspdif->Init.Retries));
215 assert_param(IS_SPDIFRX_WAIT_FOR_ACTIVITY(hspdif->Init.WaitForActivity));
216 assert_param(IS_SPDIFRX_CHANNEL(hspdif->Init.ChannelSelection));
217 assert_param(IS_SPDIFRX_DATA_FORMAT(hspdif->Init.DataFormat));
218 assert_param(IS_PREAMBLE_TYPE_MASK(hspdif->Init.PreambleTypeMask));
219 assert_param(IS_CHANNEL_STATUS_MASK(hspdif->Init.ChannelStatusMask));
220 assert_param(IS_VALIDITY_MASK(hspdif->Init.ValidityBitMask));
221 assert_param(IS_PARITY_ERROR_MASK(hspdif->Init.ParityErrorMask));
222
223 if(hspdif->State == HAL_SPDIFRX_STATE_RESET)
224 {
225 /* Allocate lock resource and initialize it */
226 hspdif->Lock = HAL_UNLOCKED;
227 /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */
228 HAL_SPDIFRX_MspInit(hspdif);
229 }
230
231 /* SPDIFRX peripheral state is BUSY*/
232 hspdif->State = HAL_SPDIFRX_STATE_BUSY;
233
234 /* Disable SPDIFRX interface (IDLE State) */
235 __HAL_SPDIFRX_IDLE(hspdif);
236
237 /* Reset the old SPDIFRX CR configuration */
238 tmpreg = hspdif->Instance->CR;
239
240 tmpreg &= ~((uint16_t) SPDIFRX_CR_RXSTEO | SPDIFRX_CR_DRFMT | SPDIFRX_CR_PMSK |
241 SPDIFRX_CR_VMSK | SPDIFRX_CR_CUMSK | SPDIFRX_CR_PTMSK |
242 SPDIFRX_CR_CHSEL | SPDIFRX_CR_NBTR | SPDIFRX_CR_WFA |
243 SPDIFRX_CR_INSEL);
244
245 /* Sets the new configuration of the SPDIFRX peripheral */
246 tmpreg |= ((uint16_t) hspdif->Init.StereoMode |
247 hspdif->Init.InputSelection |
248 hspdif->Init.Retries |
249 hspdif->Init.WaitForActivity |
250 hspdif->Init.ChannelSelection |
251 hspdif->Init.DataFormat |
252 hspdif->Init.PreambleTypeMask |
253 hspdif->Init.ChannelStatusMask |
254 hspdif->Init.ValidityBitMask |
255 hspdif->Init.ParityErrorMask);
256
257 hspdif->Instance->CR = tmpreg;
258
259 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
260
261 /* SPDIFRX peripheral state is READY*/
262 hspdif->State = HAL_SPDIFRX_STATE_READY;
263
264 return HAL_OK;
265}
266
267/**
268 * @brief DeInitializes the SPDIFRX peripheral
269 * @param hspdif: SPDIFRX handle
270 * @retval HAL status
271 */
272HAL_StatusTypeDef HAL_SPDIFRX_DeInit(SPDIFRX_HandleTypeDef *hspdif)
273{
274 /* Check the SPDIFRX handle allocation */
275 if(hspdif == NULL)
276 {
277 return HAL_ERROR;
278 }
279
280 /* Check the parameters */
281 assert_param(IS_SPDIFRX_ALL_INSTANCE(hspdif->Instance));
282
283 hspdif->State = HAL_SPDIFRX_STATE_BUSY;
284
285 /* Disable SPDIFRX interface (IDLE state) */
286 __HAL_SPDIFRX_IDLE(hspdif);
287
288 /* DeInit the low level hardware: GPIO, CLOCK, NVIC... */
289 HAL_SPDIFRX_MspDeInit(hspdif);
290
291 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
292
293 /* SPDIFRX peripheral state is RESET*/
294 hspdif->State = HAL_SPDIFRX_STATE_RESET;
295
296 /* Release Lock */
297 __HAL_UNLOCK(hspdif);
298
299 return HAL_OK;
300}
301
302/**
303 * @brief SPDIFRX MSP Init
304 * @param hspdif: SPDIFRX handle
305 * @retval None
306 */
307__weak void HAL_SPDIFRX_MspInit(SPDIFRX_HandleTypeDef *hspdif)
308{
309 /* NOTE : This function Should not be modified, when the callback is needed,
310 the HAL_SPDIFRX_MspInit could be implemented in the user file
311 */
312}
313
314/**
315 * @brief SPDIFRX MSP DeInit
316 * @param hspdif: SPDIFRX handle
317 * @retval None
318 */
319__weak void HAL_SPDIFRX_MspDeInit(SPDIFRX_HandleTypeDef *hspdif)
320{
321 /* NOTE : This function Should not be modified, when the callback is needed,
322 the HAL_SPDIFRX_MspDeInit could be implemented in the user file
323 */
324}
325
326/**
327 * @brief Sets the SPDIFRX dtat format according to the specified parameters
328 * in the SPDIFRX_InitTypeDef.
329 * @param hspdif: SPDIFRX handle
330 * @param sDataFormat: SPDIFRX data format
331 * @retval HAL status
332 */
333HAL_StatusTypeDef HAL_SPDIFRX_SetDataFormat(SPDIFRX_HandleTypeDef *hspdif, SPDIFRX_SetDataFormatTypeDef sDataFormat)
334{
335 uint32_t tmpreg = 0;
336
337 /* Check the SPDIFRX handle allocation */
338 if(hspdif == NULL)
339 {
340 return HAL_ERROR;
341 }
342
343 /* Check the SPDIFRX parameters */
344 assert_param(IS_STEREO_MODE(sDataFormat.StereoMode));
345 assert_param(IS_SPDIFRX_DATA_FORMAT(sDataFormat.DataFormat));
346 assert_param(IS_PREAMBLE_TYPE_MASK(sDataFormat.PreambleTypeMask));
347 assert_param(IS_CHANNEL_STATUS_MASK(sDataFormat.ChannelStatusMask));
348 assert_param(IS_VALIDITY_MASK(sDataFormat.ValidityBitMask));
349 assert_param(IS_PARITY_ERROR_MASK(sDataFormat.ParityErrorMask));
350
351 /* Reset the old SPDIFRX CR configuration */
352 tmpreg = hspdif->Instance->CR;
353
354 if(((tmpreg & SPDIFRX_STATE_RCV) == SPDIFRX_STATE_RCV) &&
355 (((tmpreg & SPDIFRX_CR_DRFMT) != sDataFormat.DataFormat) ||
356 ((tmpreg & SPDIFRX_CR_RXSTEO) != sDataFormat.StereoMode)))
357 {
358 return HAL_ERROR;
359 }
360
361 tmpreg &= ~((uint16_t) SPDIFRX_CR_RXSTEO | SPDIFRX_CR_DRFMT | SPDIFRX_CR_PMSK |
362 SPDIFRX_CR_VMSK | SPDIFRX_CR_CUMSK | SPDIFRX_CR_PTMSK);
363
364 /* Sets the new configuration of the SPDIFRX peripheral */
365 tmpreg |= ((uint16_t) sDataFormat.StereoMode |
366 sDataFormat.DataFormat |
367 sDataFormat.PreambleTypeMask |
368 sDataFormat.ChannelStatusMask |
369 sDataFormat.ValidityBitMask |
370 sDataFormat.ParityErrorMask);
371
372 hspdif->Instance->CR = tmpreg;
373
374 return HAL_OK;
375}
376
377/**
378 * @}
379 */
380
381/** @defgroup SPDIFRX_Exported_Functions_Group2 IO operation functions
382 * @brief Data transfers functions
383 *
384@verbatim
385===============================================================================
386##### IO operation functions #####
387===============================================================================
388 [..]
389 This subsection provides a set of functions allowing to manage the SPDIFRX data
390 transfers.
391
392 (#) There is two mode of transfer:
393 (++) Blocking mode : The communication is performed in the polling mode.
394 The status of all data processing is returned by the same function
395 after finishing transfer.
396 (++) No-Blocking mode : The communication is performed using Interrupts
397 or DMA. These functions return the status of the transfer start-up.
398 The end of the data processing will be indicated through the
399 dedicated SPDIFRX IRQ when using Interrupt mode or the DMA IRQ when
400 using DMA mode.
401
402 (#) Blocking mode functions are :
403 (++) HAL_SPDIFRX_ReceiveDataFlow()
404 (++) HAL_SPDIFRX_ReceiveControlFlow()
405 (+@) Do not use blocking mode to receive both control and data flow at the same time.
406
407 (#) No-Blocking mode functions with Interrupt are :
408 (++) HAL_SPDIFRX_ReceiveControlFlow_IT()
409 (++) HAL_SPDIFRX_ReceiveDataFlow_IT()
410
411 (#) No-Blocking mode functions with DMA are :
412 (++) HAL_SPDIFRX_ReceiveControlFlow_DMA()
413 (++) HAL_SPDIFRX_ReceiveDataFlow_DMA()
414
415 (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode:
416 (++) HAL_SPDIFRX_RxCpltCallback()
417 (++) HAL_SPDIFRX_ErrorCallback()
418
419@endverbatim
420 * @{
421 */
422
423/**
424 * @brief Receives an amount of data (Data Flow) in blocking mode.
425 * @param hspdif: pointer to SPDIFRX_HandleTypeDef structure that contains
426 * the configuration information for SPDIFRX module.
427 * @param pData: Pointer to data buffer
428 * @param Size: Amount of data to be received
429 * @param Timeout: Timeout duration
430 * @retval HAL status
431 */
432HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout)
433{
434
435 if((pData == NULL ) || (Size == 0))
436 {
437 return HAL_ERROR;
438 }
439
440 if(hspdif->State == HAL_SPDIFRX_STATE_READY)
441 {
442 /* Process Locked */
443 __HAL_LOCK(hspdif);
444
445 hspdif->State = HAL_SPDIFRX_STATE_BUSY;
446
447 /* Start synchronisation */
448 __HAL_SPDIFRX_SYNC(hspdif);
449
450 /* Wait until SYNCD flag is set */
451 if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, Timeout) != HAL_OK)
452 {
453 return HAL_TIMEOUT;
454 }
455
456 /* Start reception */
457 __HAL_SPDIFRX_RCV(hspdif);
458
459 /* Receive data flow */
460 while(Size > 0)
461 {
462 /* Wait until RXNE flag is set */
463 if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_RXNE, RESET, Timeout) != HAL_OK)
464 {
465 return HAL_TIMEOUT;
466 }
467
468 (*pData++) = hspdif->Instance->DR;
469 Size--;
470 }
471
472 /* SPDIFRX ready */
473 hspdif->State = HAL_SPDIFRX_STATE_READY;
474
475 /* Process Unlocked */
476 __HAL_UNLOCK(hspdif);
477
478 return HAL_OK;
479 }
480 else
481 {
482 return HAL_BUSY;
483 }
484}
485
486/**
487 * @brief Receives an amount of data (Control Flow) in blocking mode.
488 * @param hspdif: pointer to a SPDIFRX_HandleTypeDef structure that contains
489 * the configuration information for SPDIFRX module.
490 * @param pData: Pointer to data buffer
491 * @param Size: Amount of data to be received
492 * @param Timeout: Timeout duration
493 * @retval HAL status
494 */
495HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size, uint32_t Timeout)
496{
497
498 if((pData == NULL ) || (Size == 0))
499 {
500 return HAL_ERROR;
501 }
502
503 if(hspdif->State == HAL_SPDIFRX_STATE_READY)
504 {
505 /* Process Locked */
506 __HAL_LOCK(hspdif);
507
508 hspdif->State = HAL_SPDIFRX_STATE_BUSY;
509
510 /* Start synchronization */
511 __HAL_SPDIFRX_SYNC(hspdif);
512
513 /* Wait until SYNCD flag is set */
514 if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, Timeout) != HAL_OK)
515 {
516 return HAL_TIMEOUT;
517 }
518
519 /* Start reception */
520 __HAL_SPDIFRX_RCV(hspdif);
521
522 /* Receive control flow */
523 while(Size > 0)
524 {
525 /* Wait until CSRNE flag is set */
526 if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_CSRNE, RESET, Timeout) != HAL_OK)
527 {
528 return HAL_TIMEOUT;
529 }
530
531 (*pData++) = hspdif->Instance->CSR;
532 Size--;
533 }
534
535 /* SPDIFRX ready */
536 hspdif->State = HAL_SPDIFRX_STATE_READY;
537
538 /* Process Unlocked */
539 __HAL_UNLOCK(hspdif);
540
541 return HAL_OK;
542 }
543 else
544 {
545 return HAL_BUSY;
546 }
547}
548/**
549 * @brief Receive an amount of data (Data Flow) in non-blocking mode with Interrupt
550 * @param hspdif: SPDIFRX handle
551 * @param pData: a 32-bit pointer to the Receive data buffer.
552 * @param Size: number of data sample to be received .
553 * @retval HAL status
554 */
555HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
556{
557 if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_CX))
558 {
559 if((pData == NULL) || (Size == 0))
560 {
561 return HAL_ERROR;
562 }
563
564 /* Process Locked */
565 __HAL_LOCK(hspdif);
566
567 hspdif->pRxBuffPtr = pData;
568 hspdif->RxXferSize = Size;
569 hspdif->RxXferCount = Size;
570
571 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
572
573 /* Check if a receive process is ongoing or not */
574 hspdif->State = HAL_SPDIFRX_STATE_BUSY_RX;
575
576
577 /* Enable the SPDIFRX PE Error Interrupt */
578 __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
579
580 /* Enable the SPDIFRX OVR Error Interrupt */
581 __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
582
583 /* Process Unlocked */
584 __HAL_UNLOCK(hspdif);
585
586 /* Enable the SPDIFRX RXNE interrupt */
587 __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_RXNE);
588
589 if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC || (SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00)
590 {
591 /* Start synchronization */
592 __HAL_SPDIFRX_SYNC(hspdif);
593
594 /* Wait until SYNCD flag is set */
595 if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, SPDIFRX_TIMEOUT_VALUE) != HAL_OK)
596 {
597 return HAL_TIMEOUT;
598 }
599
600 /* Start reception */
601 __HAL_SPDIFRX_RCV(hspdif);
602 }
603
604 return HAL_OK;
605 }
606 else
607 {
608 return HAL_BUSY;
609 }
610}
611
612/**
613 * @brief Receive an amount of data (Control Flow) with Interrupt
614 * @param hspdif: SPDIFRX handle
615 * @param pData: a 32-bit pointer to the Receive data buffer.
616 * @param Size: number of data sample (Control Flow) to be received :
617 * @retval HAL status
618 */
619HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
620{
621 if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_RX))
622 {
623 if((pData == NULL ) || (Size == 0))
624 {
625 return HAL_ERROR;
626 }
627
628 /* Process Locked */
629 __HAL_LOCK(hspdif);
630
631 hspdif->pCsBuffPtr = pData;
632 hspdif->CsXferSize = Size;
633 hspdif->CsXferCount = Size;
634
635 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
636
637 /* Check if a receive process is ongoing or not */
638 hspdif->State = HAL_SPDIFRX_STATE_BUSY_CX;
639
640
641 /* Enable the SPDIFRX PE Error Interrupt */
642 __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
643
644 /* Enable the SPDIFRX OVR Error Interrupt */
645 __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
646
647 /* Process Unlocked */
648 __HAL_UNLOCK(hspdif);
649
650 /* Enable the SPDIFRX CSRNE interrupt */
651 __HAL_SPDIFRX_ENABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
652
653 if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC || (SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00)
654 {
655 /* Start synchronization */
656 __HAL_SPDIFRX_SYNC(hspdif);
657
658 /* Wait until SYNCD flag is set */
659 if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, SPDIFRX_TIMEOUT_VALUE) != HAL_OK)
660 {
661 return HAL_TIMEOUT;
662 }
663
664 /* Start reception */
665 __HAL_SPDIFRX_RCV(hspdif);
666 }
667
668 return HAL_OK;
669 }
670 else
671 {
672 return HAL_BUSY;
673 }
674}
675
676/**
677 * @brief Receive an amount of data (Data Flow) mode with DMA
678 * @param hspdif: SPDIFRX handle
679 * @param pData: a 32-bit pointer to the Receive data buffer.
680 * @param Size: number of data sample to be received :
681 * @retval HAL status
682 */
683HAL_StatusTypeDef HAL_SPDIFRX_ReceiveDataFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
684{
685
686 if((pData == NULL) || (Size == 0))
687 {
688 return HAL_ERROR;
689 }
690
691 if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_CX))
692 {
693 hspdif->pRxBuffPtr = pData;
694 hspdif->RxXferSize = Size;
695 hspdif->RxXferCount = Size;
696
697 /* Process Locked */
698 __HAL_LOCK(hspdif);
699
700 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
701 hspdif->State = HAL_SPDIFRX_STATE_BUSY_RX;
702
703 /* Set the SPDIFRX Rx DMA Half transfer complete callback */
704 hspdif->hdmaDrRx->XferHalfCpltCallback = SPDIFRX_DMARxHalfCplt;
705
706 /* Set the SPDIFRX Rx DMA transfer complete callback */
707 hspdif->hdmaDrRx->XferCpltCallback = SPDIFRX_DMARxCplt;
708
709 /* Set the DMA error callback */
710 hspdif->hdmaDrRx->XferErrorCallback = SPDIFRX_DMAError;
711
712 /* Enable the DMA request */
713 HAL_DMA_Start_IT(hspdif->hdmaDrRx, (uint32_t)&hspdif->Instance->DR, (uint32_t)hspdif->pRxBuffPtr, Size);
714
715 /* Enable RXDMAEN bit in SPDIFRX CR register for data flow reception*/
716 hspdif->Instance->CR |= SPDIFRX_CR_RXDMAEN;
717
718 if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC || (SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00)
719 {
720 /* Start synchronization */
721 __HAL_SPDIFRX_SYNC(hspdif);
722
723 /* Wait until SYNCD flag is set */
724 if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, SPDIFRX_TIMEOUT_VALUE) != HAL_OK)
725 {
726 return HAL_TIMEOUT;
727 }
728
729 /* Start reception */
730 __HAL_SPDIFRX_RCV(hspdif);
731 }
732
733 /* Process Unlocked */
734 __HAL_UNLOCK(hspdif);
735
736 return HAL_OK;
737 }
738 else
739 {
740 return HAL_BUSY;
741 }
742}
743
744/**
745 * @brief Receive an amount of data (Control Flow) with DMA
746 * @param hspdif: SPDIFRX handle
747 * @param pData: a 32-bit pointer to the Receive data buffer.
748 * @param Size: number of data (Control Flow) sample to be received :
749 * @retval HAL status
750 */
751HAL_StatusTypeDef HAL_SPDIFRX_ReceiveControlFlow_DMA(SPDIFRX_HandleTypeDef *hspdif, uint32_t *pData, uint16_t Size)
752{
753 if((pData == NULL) || (Size == 0))
754 {
755 return HAL_ERROR;
756 }
757
758 if((hspdif->State == HAL_SPDIFRX_STATE_READY) || (hspdif->State == HAL_SPDIFRX_STATE_BUSY_RX))
759 {
760 hspdif->pCsBuffPtr = pData;
761 hspdif->CsXferSize = Size;
762 hspdif->CsXferCount = Size;
763
764 /* Process Locked */
765 __HAL_LOCK(hspdif);
766
767 hspdif->ErrorCode = HAL_SPDIFRX_ERROR_NONE;
768 hspdif->State = HAL_SPDIFRX_STATE_BUSY_CX;
769
770 /* Set the SPDIFRX Rx DMA Half transfer complete callback */
771 hspdif->hdmaCsRx->XferHalfCpltCallback = SPDIFRX_DMACxHalfCplt;
772
773 /* Set the SPDIFRX Rx DMA transfer complete callback */
774 hspdif->hdmaCsRx->XferCpltCallback = SPDIFRX_DMACxCplt;
775
776 /* Set the DMA error callback */
777 hspdif->hdmaCsRx->XferErrorCallback = SPDIFRX_DMAError;
778
779 /* Enable the DMA request */
780 HAL_DMA_Start_IT(hspdif->hdmaCsRx, (uint32_t)&hspdif->Instance->CSR, (uint32_t)hspdif->pCsBuffPtr, Size);
781
782 /* Enable CBDMAEN bit in SPDIFRX CR register for control flow reception*/
783 hspdif->Instance->CR |= SPDIFRX_CR_CBDMAEN;
784
785 if ((SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != SPDIFRX_STATE_SYNC || (SPDIFRX->CR & SPDIFRX_CR_SPDIFEN) != 0x00)
786 {
787 /* Start synchronization */
788 __HAL_SPDIFRX_SYNC(hspdif);
789
790 /* Wait until SYNCD flag is set */
791 if(SPDIFRX_WaitOnFlagUntilTimeout(hspdif, SPDIFRX_FLAG_SYNCD, RESET, SPDIFRX_TIMEOUT_VALUE) != HAL_OK)
792 {
793 return HAL_TIMEOUT;
794 }
795
796 /* Start reception */
797 __HAL_SPDIFRX_RCV(hspdif);
798 }
799
800 /* Process Unlocked */
801 __HAL_UNLOCK(hspdif);
802
803 return HAL_OK;
804 }
805 else
806 {
807 return HAL_BUSY;
808 }
809}
810
811/**
812 * @brief stop the audio stream receive from the Media.
813 * @param hspdif: SPDIFRX handle
814 * @retval None
815 */
816HAL_StatusTypeDef HAL_SPDIFRX_DMAStop(SPDIFRX_HandleTypeDef *hspdif)
817{
818 /* Process Locked */
819 __HAL_LOCK(hspdif);
820
821 /* Disable the SPDIFRX DMA requests */
822 hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_RXDMAEN);
823 hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_CBDMAEN);
824
825 /* Disable the SPDIFRX DMA channel */
826 __HAL_DMA_DISABLE(hspdif->hdmaDrRx);
827 __HAL_DMA_DISABLE(hspdif->hdmaCsRx);
828
829 /* Disable SPDIFRX peripheral */
830 __HAL_SPDIFRX_IDLE(hspdif);
831
832 hspdif->State = HAL_SPDIFRX_STATE_READY;
833
834 /* Process Unlocked */
835 __HAL_UNLOCK(hspdif);
836
837 return HAL_OK;
838}
839
840/**
841 * @brief This function handles SPDIFRX interrupt request.
842 * @param hspdif: SPDIFRX handle
843 * @retval HAL status
844 */
845void HAL_SPDIFRX_IRQHandler(SPDIFRX_HandleTypeDef *hspdif)
846{
847 /* SPDIFRX in mode Data Flow Reception ------------------------------------------------*/
848 if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_RXNE) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_RXNE) != RESET))
849 {
850 __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_RXNE);
851 SPDIFRX_ReceiveDataFlow_IT(hspdif);
852 }
853
854 /* SPDIFRX in mode Control Flow Reception ------------------------------------------------*/
855 if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_CSRNE) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_CSRNE) != RESET))
856 {
857 __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_IT_CSRNE);
858 SPDIFRX_ReceiveControlFlow_IT(hspdif);
859 }
860
861 /* SPDIFRX Overrun error interrupt occurred ---------------------------------*/
862 if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_OVR) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_OVRIE) != RESET))
863 {
864 __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_FLAG_OVR);
865
866 /* Change the SPDIFRX error code */
867 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_OVR;
868
869 /* the transfer is not stopped */
870 HAL_SPDIFRX_ErrorCallback(hspdif);
871 }
872
873 /* SPDIFRX Parity error interrupt occurred ---------------------------------*/
874 if((__HAL_SPDIFRX_GET_FLAG(hspdif, SPDIFRX_FLAG_PERR) != RESET) && (__HAL_SPDIFRX_GET_IT_SOURCE(hspdif, SPDIFRX_IT_PERRIE) != RESET))
875 {
876 __HAL_SPDIFRX_CLEAR_IT(hspdif, SPDIFRX_FLAG_PERR);
877
878 /* Change the SPDIFRX error code */
879 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_PE;
880
881 /* the transfer is not stopped */
882 HAL_SPDIFRX_ErrorCallback(hspdif);
883 }
884
885}
886
887/**
888 * @brief Rx Transfer (Data flow) half completed callbacks
889 * @param hspdif: SPDIFRX handle
890 * @retval None
891 */
892__weak void HAL_SPDIFRX_RxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
893{
894 /* NOTE : This function Should not be modified, when the callback is needed,
895 the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
896 */
897}
898
899/**
900 * @brief Rx Transfer (Data flow) completed callbacks
901 * @param hspdif: SPDIFRX handle
902 * @retval None
903 */
904__weak void HAL_SPDIFRX_RxCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
905{
906 /* NOTE : This function Should not be modified, when the callback is needed,
907 the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
908 */
909}
910
911/**
912 * @brief Rx (Control flow) Transfer half completed callbacks
913 * @param hspdif: SPDIFRX handle
914 * @retval None
915 */
916__weak void HAL_SPDIFRX_CxHalfCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
917{
918 /* NOTE : This function Should not be modified, when the callback is needed,
919 the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
920 */
921}
922
923/**
924 * @brief Rx Transfer (Control flow) completed callbacks
925 * @param hspdif: SPDIFRX handle
926 * @retval None
927 */
928__weak void HAL_SPDIFRX_CxCpltCallback(SPDIFRX_HandleTypeDef *hspdif)
929{
930 /* NOTE : This function Should not be modified, when the callback is needed,
931 the HAL_SPDIFRX_RxCpltCallback could be implemented in the user file
932 */
933}
934
935/**
936 * @brief SPDIFRX error callbacks
937 * @param hspdif: SPDIFRX handle
938 * @retval None
939 */
940__weak void HAL_SPDIFRX_ErrorCallback(SPDIFRX_HandleTypeDef *hspdif)
941{
942 /* NOTE : This function Should not be modified, when the callback is needed,
943 the HAL_SPDIFRX_ErrorCallback could be implemented in the user file
944 */
945}
946
947/**
948 * @}
949 */
950
951/** @defgroup SPDIFRX_Exported_Functions_Group3 Peripheral State and Errors functions
952 * @brief Peripheral State functions
953 *
954@verbatim
955===============================================================================
956##### Peripheral State and Errors functions #####
957===============================================================================
958[..]
959This subsection permit to get in run-time the status of the peripheral
960and the data flow.
961
962@endverbatim
963 * @{
964 */
965
966/**
967 * @brief Return the SPDIFRX state
968 * @param hspdif : SPDIFRX handle
969 * @retval HAL state
970 */
971HAL_SPDIFRX_StateTypeDef HAL_SPDIFRX_GetState(SPDIFRX_HandleTypeDef *hspdif)
972{
973 return hspdif->State;
974}
975
976/**
977 * @brief Return the SPDIFRX error code
978 * @param hspdif : SPDIFRX handle
979 * @retval SPDIFRX Error Code
980 */
981uint32_t HAL_SPDIFRX_GetError(SPDIFRX_HandleTypeDef *hspdif)
982{
983 return hspdif->ErrorCode;
984}
985
986/**
987 * @}
988 */
989
990/**
991 * @brief DMA SPDIFRX receive process (Data flow) complete callback
992 * @param hdma : DMA handle
993 * @retval None
994 */
995static void SPDIFRX_DMARxCplt(DMA_HandleTypeDef *hdma)
996{
997 SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
998
999 /* Disable Rx DMA Request */
1000 hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_RXDMAEN);
1001 hspdif->RxXferCount = 0;
1002
1003 hspdif->State = HAL_SPDIFRX_STATE_READY;
1004 HAL_SPDIFRX_RxCpltCallback(hspdif);
1005}
1006
1007/**
1008 * @brief DMA SPDIFRX receive process (Data flow) half complete callback
1009 * @param hdma : DMA handle
1010 * @retval None
1011 */
1012static void SPDIFRX_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
1013{
1014 SPDIFRX_HandleTypeDef* hspdif = (SPDIFRX_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
1015
1016 HAL_SPDIFRX_RxHalfCpltCallback(hspdif);
1017}
1018
1019
1020/**
1021 * @brief DMA SPDIFRX receive process (Control flow) complete callback
1022 * @param hdma : DMA handle
1023 * @retval None
1024 */
1025static void SPDIFRX_DMACxCplt(DMA_HandleTypeDef *hdma)
1026{
1027 SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
1028
1029 /* Disable Cb DMA Request */
1030 hspdif->Instance->CR &= (uint16_t)(~SPDIFRX_CR_CBDMAEN);
1031 hspdif->CsXferCount = 0;
1032
1033 hspdif->State = HAL_SPDIFRX_STATE_READY;
1034 HAL_SPDIFRX_CxCpltCallback(hspdif);
1035}
1036
1037/**
1038 * @brief DMA SPDIFRX receive process (Control flow) half complete callback
1039 * @param hdma : DMA handle
1040 * @retval None
1041 */
1042static void SPDIFRX_DMACxHalfCplt(DMA_HandleTypeDef *hdma)
1043{
1044 SPDIFRX_HandleTypeDef* hspdif = (SPDIFRX_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
1045
1046 HAL_SPDIFRX_CxHalfCpltCallback(hspdif);
1047}
1048
1049/**
1050 * @brief DMA SPDIFRX communication error callback
1051 * @param hdma : DMA handle
1052 * @retval None
1053 */
1054static void SPDIFRX_DMAError(DMA_HandleTypeDef *hdma)
1055{
1056 SPDIFRX_HandleTypeDef* hspdif = ( SPDIFRX_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
1057
1058 /* Disable Rx and Cb DMA Request */
1059 hspdif->Instance->CR &= (uint16_t)(~(SPDIFRX_CR_RXDMAEN | SPDIFRX_CR_CBDMAEN));
1060 hspdif->RxXferCount = 0;
1061
1062 hspdif->State= HAL_SPDIFRX_STATE_READY;
1063
1064 /* Set the error code and execute error callback*/
1065 hspdif->ErrorCode |= HAL_SPDIFRX_ERROR_DMA;
1066 HAL_SPDIFRX_ErrorCallback(hspdif);
1067}
1068
1069
1070/**
1071 * @brief Receive an amount of data (Data Flow) with Interrupt
1072 * @param hspdif: SPDIFRX handle
1073 * @retval None
1074 */
1075static void SPDIFRX_ReceiveDataFlow_IT(SPDIFRX_HandleTypeDef *hspdif)
1076{
1077 /* Receive data */
1078 (*hspdif->pRxBuffPtr++) = hspdif->Instance->DR;
1079 hspdif->RxXferCount--;
1080
1081 if(hspdif->RxXferCount == 0)
1082 {
1083 /* Disable RXNE/PE and OVR interrupts */
1084 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE | SPDIFRX_IT_PERRIE | SPDIFRX_IT_RXNE);
1085
1086 hspdif->State = HAL_SPDIFRX_STATE_READY;
1087
1088 /* Process Unlocked */
1089 __HAL_UNLOCK(hspdif);
1090
1091 HAL_SPDIFRX_RxCpltCallback(hspdif);
1092 }
1093}
1094
1095/**
1096 * @brief Receive an amount of data (Control Flow) with Interrupt
1097 * @param hspdif: SPDIFRX handle
1098 * @retval None
1099 */
1100static void SPDIFRX_ReceiveControlFlow_IT(SPDIFRX_HandleTypeDef *hspdif)
1101{
1102 /* Receive data */
1103 (*hspdif->pCsBuffPtr++) = hspdif->Instance->CSR;
1104 hspdif->CsXferCount--;
1105
1106 if(hspdif->CsXferCount == 0)
1107 {
1108 /* Disable CSRNE interrupt */
1109 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
1110
1111 hspdif->State = HAL_SPDIFRX_STATE_READY;
1112
1113 /* Process Unlocked */
1114 __HAL_UNLOCK(hspdif);
1115
1116 HAL_SPDIFRX_CxCpltCallback(hspdif);
1117 }
1118}
1119
1120/**
1121 * @brief This function handles SPDIFRX Communication Timeout.
1122 * @param hspdif: SPDIFRX handle
1123 * @param Flag: Flag checked
1124 * @param Status: Value of the flag expected
1125 * @param Timeout: Duration of the timeout
1126 * @retval HAL status
1127 */
1128static HAL_StatusTypeDef SPDIFRX_WaitOnFlagUntilTimeout(SPDIFRX_HandleTypeDef *hspdif, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
1129{
1130 uint32_t tickstart = 0;
1131
1132 /* Get tick */
1133 tickstart = HAL_GetTick();
1134
1135 /* Wait until flag is set */
1136 if(Status == RESET)
1137 {
1138 while(__HAL_SPDIFRX_GET_FLAG(hspdif, Flag) == RESET)
1139 {
1140 /* Check for the Timeout */
1141 if(Timeout != HAL_MAX_DELAY)
1142 {
1143 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
1144 {
1145 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
1146 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
1147 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
1148 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
1149 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
1150 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
1151 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
1152 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
1153
1154 hspdif->State= HAL_SPDIFRX_STATE_READY;
1155
1156 /* Process Unlocked */
1157 __HAL_UNLOCK(hspdif);
1158
1159 return HAL_TIMEOUT;
1160 }
1161 }
1162 }
1163 }
1164 else
1165 {
1166 while(__HAL_SPDIFRX_GET_FLAG(hspdif, Flag) != RESET)
1167 {
1168 /* Check for the Timeout */
1169 if(Timeout != HAL_MAX_DELAY)
1170 {
1171 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
1172 {
1173 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
1174 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_RXNE);
1175 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_CSRNE);
1176 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_PERRIE);
1177 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_OVRIE);
1178 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SBLKIE);
1179 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_SYNCDIE);
1180 __HAL_SPDIFRX_DISABLE_IT(hspdif, SPDIFRX_IT_IFEIE);
1181
1182 hspdif->State= HAL_SPDIFRX_STATE_READY;
1183
1184 /* Process Unlocked */
1185 __HAL_UNLOCK(hspdif);
1186
1187 return HAL_TIMEOUT;
1188 }
1189 }
1190 }
1191 }
1192 return HAL_OK;
1193}
1194
1195/**
1196 * @}
1197 */
1198#endif /* STM32F446xx */
1199
1200#endif /* HAL_SPDIFRX_MODULE_ENABLED */
1201/**
1202 * @}
1203 */
1204
1205/**
1206 * @}
1207 */
1208
1209/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
1210
Note: See TracBrowser for help on using the repository browser.