source: asp3_wo_tecs/trunk/arch/arm_m_gcc/stm32f4xx_stm32cube/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c@ 303

Last change on this file since 303 was 303, checked in by ertl-honda, 7 years ago

nucleo_f401re依存部の追加
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1/**
2 ******************************************************************************
3 * @file stm32f4xx_hal_flash_ex.c
4 * @author MCD Application Team
5 * @version V1.4.1
6 * @date 09-October-2015
7 * @brief Extended FLASH HAL module driver.
8 * This file provides firmware functions to manage the following
9 * functionalities of the FLASH extension peripheral:
10 * + Extended programming operations functions
11 *
12 @verbatim
13 ==============================================================================
14 ##### Flash Extension features #####
15 ==============================================================================
16
17 [..] Comparing to other previous devices, the FLASH interface for STM32F427xx/437xx and
18 STM32F429xx/439xx devices contains the following additional features
19
20 (+) Capacity up to 2 Mbyte with dual bank architecture supporting read-while-write
21 capability (RWW)
22 (+) Dual bank memory organization
23 (+) PCROP protection for all banks
24
25 ##### How to use this driver #####
26 ==============================================================================
27 [..] This driver provides functions to configure and program the FLASH memory
28 of all STM32F427xx/437xx, STM32F429xx/439xx, STM32F469xx/479xx and STM32F446xx
29 devices. It includes
30 (#) FLASH Memory Erase functions:
31 (++) Lock and Unlock the FLASH interface using HAL_FLASH_Unlock() and
32 HAL_FLASH_Lock() functions
33 (++) Erase function: Erase sector, erase all sectors
34 (++) There are two modes of erase :
35 (+++) Polling Mode using HAL_FLASHEx_Erase()
36 (+++) Interrupt Mode using HAL_FLASHEx_Erase_IT()
37
38 (#) Option Bytes Programming functions: Use HAL_FLASHEx_OBProgram() to :
39 (++) Set/Reset the write protection
40 (++) Set the Read protection Level
41 (++) Set the BOR level
42 (++) Program the user Option Bytes
43 (#) Advanced Option Bytes Programming functions: Use HAL_FLASHEx_AdvOBProgram() to :
44 (++) Extended space (bank 2) erase function
45 (++) Full FLASH space (2 Mo) erase (bank 1 and bank 2)
46 (++) Dual Boot activation
47 (++) Write protection configuration for bank 2
48 (++) PCROP protection configuration and control for both banks
49
50 @endverbatim
51 ******************************************************************************
52 * @attention
53 *
54 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
55 *
56 * Redistribution and use in source and binary forms, with or without modification,
57 * are permitted provided that the following conditions are met:
58 * 1. Redistributions of source code must retain the above copyright notice,
59 * this list of conditions and the following disclaimer.
60 * 2. Redistributions in binary form must reproduce the above copyright notice,
61 * this list of conditions and the following disclaimer in the documentation
62 * and/or other materials provided with the distribution.
63 * 3. Neither the name of STMicroelectronics nor the names of its contributors
64 * may be used to endorse or promote products derived from this software
65 * without specific prior written permission.
66 *
67 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
68 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
69 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
70 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
71 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
72 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
73 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
74 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
75 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
76 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
77 *
78 ******************************************************************************
79 */
80
81/* Includes ------------------------------------------------------------------*/
82#include "stm32f4xx_hal.h"
83
84/** @addtogroup STM32F4xx_HAL_Driver
85 * @{
86 */
87
88/** @defgroup FLASHEx FLASHEx
89 * @brief FLASH HAL Extension module driver
90 * @{
91 */
92
93#ifdef HAL_FLASH_MODULE_ENABLED
94
95/* Private typedef -----------------------------------------------------------*/
96/* Private define ------------------------------------------------------------*/
97/** @addtogroup FLASHEx_Private_Constants
98 * @{
99 */
100#define FLASH_TIMEOUT_VALUE ((uint32_t)50000)/* 50 s */
101/**
102 * @}
103 */
104
105/* Private macro -------------------------------------------------------------*/
106/* Private variables ---------------------------------------------------------*/
107/** @addtogroup FLASHEx_Private_Variables
108 * @{
109 */
110extern FLASH_ProcessTypeDef pFlash;
111/**
112 * @}
113 */
114
115/* Private function prototypes -----------------------------------------------*/
116/** @addtogroup FLASHEx_Private_Functions
117 * @{
118 */
119/* Option bytes control */
120static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks);
121void FLASH_FlushCaches(void);
122static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks);
123static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks);
124static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level);
125static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby);
126static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level);
127static uint8_t FLASH_OB_GetUser(void);
128static uint16_t FLASH_OB_GetWRP(void);
129static uint8_t FLASH_OB_GetRDP(void);
130static uint8_t FLASH_OB_GetBOR(void);
131
132#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F411xE) ||\
133 defined(STM32F446xx)
134static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t Sector);
135static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t Sector);
136#endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx */
137
138#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
139static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks);
140static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks);
141static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t BootConfig);
142#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
143
144extern HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout);
145/**
146 * @}
147 */
148
149/* Exported functions --------------------------------------------------------*/
150/** @defgroup FLASHEx_Exported_Functions FLASHEx Exported Functions
151 * @{
152 */
153
154/** @defgroup FLASHEx_Exported_Functions_Group1 Extended IO operation functions
155 * @brief Extended IO operation functions
156 *
157@verbatim
158 ===============================================================================
159 ##### Extended programming operation functions #####
160 ===============================================================================
161 [..]
162 This subsection provides a set of functions allowing to manage the Extension FLASH
163 programming operations.
164
165@endverbatim
166 * @{
167 */
168/**
169 * @brief Perform a mass erase or erase the specified FLASH memory sectors
170 * @param[in] pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that
171 * contains the configuration information for the erasing.
172 *
173 * @param[out] SectorError: pointer to variable that
174 * contains the configuration information on faulty sector in case of error
175 * (0xFFFFFFFF means that all the sectors have been correctly erased)
176 *
177 * @retval HAL Status
178 */
179HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *SectorError)
180{
181 HAL_StatusTypeDef status = HAL_ERROR;
182 uint32_t index = 0;
183
184 /* Process Locked */
185 __HAL_LOCK(&pFlash);
186
187 /* Check the parameters */
188 assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
189
190 /* Wait for last operation to be completed */
191 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
192
193 if(status == HAL_OK)
194 {
195 /*Initialization of SectorError variable*/
196 *SectorError = 0xFFFFFFFF;
197
198 if(pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
199 {
200 /*Mass erase to be done*/
201 FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks);
202
203 /* Wait for last operation to be completed */
204 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
205
206 /* if the erase operation is completed, disable the MER Bit */
207 FLASH->CR &= (~FLASH_MER_BIT);
208 }
209 else
210 {
211 /* Check the parameters */
212 assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector));
213
214 /* Erase by sector by sector to be done*/
215 for(index = pEraseInit->Sector; index < (pEraseInit->NbSectors + pEraseInit->Sector); index++)
216 {
217 FLASH_Erase_Sector(index, (uint8_t) pEraseInit->VoltageRange);
218
219 /* Wait for last operation to be completed */
220 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
221
222 /* If the erase operation is completed, disable the SER and SNB Bits */
223 CLEAR_BIT(FLASH->CR, (FLASH_CR_SER | FLASH_CR_SNB));
224
225 if(status != HAL_OK)
226 {
227 /* In case of error, stop erase procedure and return the faulty sector*/
228 *SectorError = index;
229 break;
230 }
231 }
232 }
233 /* Flush the caches to be sure of the data consistency */
234 FLASH_FlushCaches();
235 }
236
237 /* Process Unlocked */
238 __HAL_UNLOCK(&pFlash);
239
240 return status;
241}
242
243/**
244 * @brief Perform a mass erase or erase the specified FLASH memory sectors with interrupt enabled
245 * @param pEraseInit: pointer to an FLASH_EraseInitTypeDef structure that
246 * contains the configuration information for the erasing.
247 *
248 * @retval HAL Status
249 */
250HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit)
251{
252 HAL_StatusTypeDef status = HAL_OK;
253
254 /* Process Locked */
255 __HAL_LOCK(&pFlash);
256
257 /* Check the parameters */
258 assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
259
260 /* Enable End of FLASH Operation interrupt */
261 __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP);
262
263 /* Enable Error source interrupt */
264 __HAL_FLASH_ENABLE_IT(FLASH_IT_ERR);
265
266 /* Clear pending flags (if any) */
267 __HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR |\
268 FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR| FLASH_FLAG_PGSERR);
269
270 if(pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
271 {
272 /*Mass erase to be done*/
273 pFlash.ProcedureOnGoing = FLASH_PROC_MASSERASE;
274 pFlash.Bank = pEraseInit->Banks;
275 FLASH_MassErase((uint8_t) pEraseInit->VoltageRange, pEraseInit->Banks);
276 }
277 else
278 {
279 /* Erase by sector to be done*/
280
281 /* Check the parameters */
282 assert_param(IS_FLASH_NBSECTORS(pEraseInit->NbSectors + pEraseInit->Sector));
283
284 pFlash.ProcedureOnGoing = FLASH_PROC_SECTERASE;
285 pFlash.NbSectorsToErase = pEraseInit->NbSectors;
286 pFlash.Sector = pEraseInit->Sector;
287 pFlash.VoltageForErase = (uint8_t)pEraseInit->VoltageRange;
288
289 /*Erase 1st sector and wait for IT*/
290 FLASH_Erase_Sector(pEraseInit->Sector, pEraseInit->VoltageRange);
291 }
292
293 return status;
294}
295
296/**
297 * @brief Program option bytes
298 * @param pOBInit: pointer to an FLASH_OBInitStruct structure that
299 * contains the configuration information for the programming.
300 *
301 * @retval HAL Status
302 */
303HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit)
304{
305 HAL_StatusTypeDef status = HAL_ERROR;
306
307 /* Process Locked */
308 __HAL_LOCK(&pFlash);
309
310 /* Check the parameters */
311 assert_param(IS_OPTIONBYTE(pOBInit->OptionType));
312
313 /*Write protection configuration*/
314 if((pOBInit->OptionType & OPTIONBYTE_WRP) == OPTIONBYTE_WRP)
315 {
316 assert_param(IS_WRPSTATE(pOBInit->WRPState));
317 if(pOBInit->WRPState == OB_WRPSTATE_ENABLE)
318 {
319 /*Enable of Write protection on the selected Sector*/
320 status = FLASH_OB_EnableWRP(pOBInit->WRPSector, pOBInit->Banks);
321 }
322 else
323 {
324 /*Disable of Write protection on the selected Sector*/
325 status = FLASH_OB_DisableWRP(pOBInit->WRPSector, pOBInit->Banks);
326 }
327 }
328
329 /*Read protection configuration*/
330 if((pOBInit->OptionType & OPTIONBYTE_RDP) == OPTIONBYTE_RDP)
331 {
332 status = FLASH_OB_RDP_LevelConfig(pOBInit->RDPLevel);
333 }
334
335 /*USER configuration*/
336 if((pOBInit->OptionType & OPTIONBYTE_USER) == OPTIONBYTE_USER)
337 {
338 status = FLASH_OB_UserConfig(pOBInit->USERConfig&OB_IWDG_SW,
339 pOBInit->USERConfig&OB_STOP_NO_RST,
340 pOBInit->USERConfig&OB_STDBY_NO_RST);
341 }
342
343 /*BOR Level configuration*/
344 if((pOBInit->OptionType & OPTIONBYTE_BOR) == OPTIONBYTE_BOR)
345 {
346 status = FLASH_OB_BOR_LevelConfig(pOBInit->BORLevel);
347 }
348
349 /* Process Unlocked */
350 __HAL_UNLOCK(&pFlash);
351
352 return status;
353}
354
355/**
356 * @brief Flush the instruction and data caches
357 * @retval None
358 */
359void FLASH_FlushCaches(void)
360{
361 /* Flush instruction cache */
362 if(READ_BIT(FLASH->ACR, FLASH_ACR_ICEN))
363 {
364 /* Disable instruction cache */
365 __HAL_FLASH_INSTRUCTION_CACHE_DISABLE();
366 /* Reset instruction cache */
367 __HAL_FLASH_INSTRUCTION_CACHE_RESET();
368 /* Enable instruction cache */
369 __HAL_FLASH_INSTRUCTION_CACHE_ENABLE();
370 }
371
372 /* Flush data cache */
373 if(READ_BIT(FLASH->ACR, FLASH_ACR_DCEN))
374 {
375 /* Disable data cache */
376 __HAL_FLASH_DATA_CACHE_DISABLE();
377 /* Reset data cache */
378 __HAL_FLASH_DATA_CACHE_RESET();
379 /* Enable data cache */
380 __HAL_FLASH_DATA_CACHE_ENABLE();
381 }
382}
383
384/**
385 * @brief Get the Option byte configuration
386 * @param pOBInit: pointer to an FLASH_OBInitStruct structure that
387 * contains the configuration information for the programming.
388 *
389 * @retval None
390 */
391void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit)
392{
393 pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_BOR;
394
395 /*Get WRP*/
396 pOBInit->WRPSector = (uint32_t)FLASH_OB_GetWRP();
397
398 /*Get RDP Level*/
399 pOBInit->RDPLevel = (uint32_t)FLASH_OB_GetRDP();
400
401 /*Get USER*/
402 pOBInit->USERConfig = (uint8_t)FLASH_OB_GetUser();
403
404 /*Get BOR Level*/
405 pOBInit->BORLevel = (uint32_t)FLASH_OB_GetBOR();
406}
407
408#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
409 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
410 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx) || defined(STM32F469xx) ||\
411 defined(STM32F479xx)
412/**
413 * @brief Program option bytes
414 * @param pAdvOBInit: pointer to an FLASH_AdvOBProgramInitTypeDef structure that
415 * contains the configuration information for the programming.
416 *
417 * @retval HAL Status
418 */
419HAL_StatusTypeDef HAL_FLASHEx_AdvOBProgram (FLASH_AdvOBProgramInitTypeDef *pAdvOBInit)
420{
421 HAL_StatusTypeDef status = HAL_ERROR;
422
423 /* Check the parameters */
424 assert_param(IS_OBEX(pAdvOBInit->OptionType));
425
426 /*Program PCROP option byte*/
427 if(((pAdvOBInit->OptionType) & OPTIONBYTE_PCROP) == OPTIONBYTE_PCROP)
428 {
429 /* Check the parameters */
430 assert_param(IS_PCROPSTATE(pAdvOBInit->PCROPState));
431 if((pAdvOBInit->PCROPState) == OB_PCROP_STATE_ENABLE)
432 {
433 /*Enable of Write protection on the selected Sector*/
434#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
435 defined(STM32F411xE) || defined(STM32F446xx)
436 status = FLASH_OB_EnablePCROP(pAdvOBInit->Sectors);
437#else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
438 status = FLASH_OB_EnablePCROP(pAdvOBInit->SectorsBank1, pAdvOBInit->SectorsBank2, pAdvOBInit->Banks);
439#endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx */
440 }
441 else
442 {
443 /*Disable of Write protection on the selected Sector*/
444#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
445 defined(STM32F411xE) || defined(STM32F446xx)
446 status = FLASH_OB_DisablePCROP(pAdvOBInit->Sectors);
447#else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
448 status = FLASH_OB_DisablePCROP(pAdvOBInit->SectorsBank1, pAdvOBInit->SectorsBank2, pAdvOBInit->Banks);
449#endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx */
450 }
451 }
452
453#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
454 /*Program BOOT config option byte*/
455 if(((pAdvOBInit->OptionType) & OPTIONBYTE_BOOTCONFIG) == OPTIONBYTE_BOOTCONFIG)
456 {
457 status = FLASH_OB_BootConfig(pAdvOBInit->BootConfig);
458 }
459#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
460
461 return status;
462}
463
464/**
465 * @brief Get the OBEX byte configuration
466 * @param pAdvOBInit: pointer to an FLASH_AdvOBProgramInitTypeDef structure that
467 * contains the configuration information for the programming.
468 *
469 * @retval None
470 */
471void HAL_FLASHEx_AdvOBGetConfig(FLASH_AdvOBProgramInitTypeDef *pAdvOBInit)
472{
473#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
474 defined(STM32F411xE) || defined(STM32F446xx)
475 /*Get Sector*/
476 pAdvOBInit->Sectors = (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
477#else /* STM32F427xx || STM32F437xx || STM32F429xx|| STM32F439xx || STM32F469xx || STM32F479xx */
478 /*Get Sector for Bank1*/
479 pAdvOBInit->SectorsBank1 = (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
480
481 /*Get Sector for Bank2*/
482 pAdvOBInit->SectorsBank2 = (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS));
483
484 /*Get Boot config OB*/
485 pAdvOBInit->BootConfig = *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS;
486#endif /* STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F446xx */
487}
488
489/**
490 * @brief Select the Protection Mode
491 *
492 * @note After PCROP activated Option Byte modification NOT POSSIBLE! excepted
493 * Global Read Out Protection modification (from level1 to level0)
494 * @note Once SPRMOD bit is active unprotection of a protected sector is not possible
495 * @note Read a protected sector will set RDERR Flag and write a protected sector will set WRPERR Flag
496 * @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F401xx/STM32F411xx/STM32F446xx/
497 * STM32F469xx/STM32F479xx devices.
498 *
499 * @retval HAL Status
500 */
501HAL_StatusTypeDef HAL_FLASHEx_OB_SelectPCROP(void)
502{
503 uint8_t optiontmp = 0xFF;
504
505 /* Mask SPRMOD bit */
506 optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F);
507
508 /* Update Option Byte */
509 *(__IO uint8_t *)OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PCROP_SELECTED | optiontmp);
510
511 return HAL_OK;
512}
513
514/**
515 * @brief Deselect the Protection Mode
516 *
517 * @note After PCROP activated Option Byte modification NOT POSSIBLE! excepted
518 * Global Read Out Protection modification (from level1 to level0)
519 * @note Once SPRMOD bit is active unprotection of a protected sector is not possible
520 * @note Read a protected sector will set RDERR Flag and write a protected sector will set WRPERR Flag
521 * @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F401xx/STM32F411xx/STM32F446xx/
522 * STM32F469xx/STM32F479xx devices.
523 *
524 * @retval HAL Status
525 */
526HAL_StatusTypeDef HAL_FLASHEx_OB_DeSelectPCROP(void)
527{
528 uint8_t optiontmp = 0xFF;
529
530 /* Mask SPRMOD bit */
531 optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE3_ADDRESS) & (uint8_t)0x7F);
532
533 /* Update Option Byte */
534 *(__IO uint8_t *)OPTCR_BYTE3_ADDRESS = (uint8_t)(OB_PCROP_DESELECTED | optiontmp);
535
536 return HAL_OK;
537}
538#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F401xC || STM32F401xE || STM32F410xx ||\
539 STM32F411xE || STM32F469xx || STM32F479xx */
540
541#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
542/**
543 * @brief Returns the FLASH Write Protection Option Bytes value for Bank 2
544 * @note This function can be used only for STM32F42xxx/STM32F43xxx/STM32F469xx/STM32F479xx devices.
545 * @retval The FLASH Write Protection Option Bytes value
546 */
547uint16_t HAL_FLASHEx_OB_GetBank2WRP(void)
548{
549 /* Return the FLASH write protection Register value */
550 return (*(__IO uint16_t *)(OPTCR1_BYTE2_ADDRESS));
551}
552#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
553
554/**
555 * @}
556 */
557
558#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F469xx) || defined(STM32F479xx)
559/**
560 * @brief Full erase of FLASH memory sectors
561 * @param VoltageRange: The device voltage range which defines the erase parallelism.
562 * This parameter can be one of the following values:
563 * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
564 * the operation will be done by byte (8-bit)
565 * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
566 * the operation will be done by half word (16-bit)
567 * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
568 * the operation will be done by word (32-bit)
569 * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
570 * the operation will be done by double word (64-bit)
571 *
572 * @param Banks: Banks to be erased
573 * This parameter can be one of the following values:
574 * @arg FLASH_BANK_1: Bank1 to be erased
575 * @arg FLASH_BANK_2: Bank2 to be erased
576 * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
577 *
578 * @retval HAL Status
579 */
580static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks)
581{
582 uint32_t tmp_psize = 0;
583
584 /* Check the parameters */
585 assert_param(IS_VOLTAGERANGE(VoltageRange));
586 assert_param(IS_FLASH_BANK(Banks));
587
588 /* if the previous operation is completed, proceed to erase all sectors */
589 CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
590 FLASH->CR |= tmp_psize;
591 if(Banks == FLASH_BANK_BOTH)
592 {
593 /* bank1 & bank2 will be erased*/
594 FLASH->CR |= FLASH_MER_BIT;
595 }
596 else if(Banks == FLASH_BANK_1)
597 {
598 /*Only bank1 will be erased*/
599 FLASH->CR |= FLASH_CR_MER1;
600 }
601 else
602 {
603 /*Only bank2 will be erased*/
604 FLASH->CR |= FLASH_CR_MER2;
605 }
606 FLASH->CR |= FLASH_CR_STRT;
607}
608
609/**
610 * @brief Erase the specified FLASH memory sector
611 * @param Sector: FLASH sector to erase
612 * The value of this parameter depend on device used within the same series
613 * @param VoltageRange: The device voltage range which defines the erase parallelism.
614 * This parameter can be one of the following values:
615 * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
616 * the operation will be done by byte (8-bit)
617 * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
618 * the operation will be done by half word (16-bit)
619 * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
620 * the operation will be done by word (32-bit)
621 * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
622 * the operation will be done by double word (64-bit)
623 *
624 * @retval None
625 */
626void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
627{
628 uint32_t tmp_psize = 0;
629
630 /* Check the parameters */
631 assert_param(IS_FLASH_SECTOR(Sector));
632 assert_param(IS_VOLTAGERANGE(VoltageRange));
633
634 if(VoltageRange == FLASH_VOLTAGE_RANGE_1)
635 {
636 tmp_psize = FLASH_PSIZE_BYTE;
637 }
638 else if(VoltageRange == FLASH_VOLTAGE_RANGE_2)
639 {
640 tmp_psize = FLASH_PSIZE_HALF_WORD;
641 }
642 else if(VoltageRange == FLASH_VOLTAGE_RANGE_3)
643 {
644 tmp_psize = FLASH_PSIZE_WORD;
645 }
646 else
647 {
648 tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
649 }
650
651 /* Need to add offset of 4 when sector higher than FLASH_SECTOR_11 */
652 if(Sector > FLASH_SECTOR_11)
653 {
654 Sector += 4;
655 }
656 /* If the previous operation is completed, proceed to erase the sector */
657 CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
658 FLASH->CR |= tmp_psize;
659 CLEAR_BIT(FLASH->CR, FLASH_CR_SNB);
660 FLASH->CR |= FLASH_CR_SER | (Sector << POSITION_VAL(FLASH_CR_SNB));
661 FLASH->CR |= FLASH_CR_STRT;
662}
663
664/**
665 * @brief Enable the write protection of the desired bank1 or bank 2 sectors
666 *
667 * @note When the memory read protection level is selected (RDP level = 1),
668 * it is not possible to program or erase the flash sector i if CortexM4
669 * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
670 * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
671 *
672 * @param WRPSector: specifies the sector(s) to be write protected.
673 * This parameter can be one of the following values:
674 * @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_23
675 * @arg OB_WRP_SECTOR_All
676 * @note BANK2 starts from OB_WRP_SECTOR_12
677 *
678 * @param Banks: Enable write protection on all the sectors for the specific bank
679 * This parameter can be one of the following values:
680 * @arg FLASH_BANK_1: WRP on all sectors of bank1
681 * @arg FLASH_BANK_2: WRP on all sectors of bank2
682 * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
683 *
684 * @retval HAL FLASH State
685 */
686static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks)
687{
688 HAL_StatusTypeDef status = HAL_OK;
689
690 /* Check the parameters */
691 assert_param(IS_OB_WRP_SECTOR(WRPSector));
692 assert_param(IS_FLASH_BANK(Banks));
693
694 /* Wait for last operation to be completed */
695 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
696
697 if(status == HAL_OK)
698 {
699 if(((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))) ||
700 (WRPSector < OB_WRP_SECTOR_12))
701 {
702 if(WRPSector == OB_WRP_SECTOR_All)
703 {
704 /*Write protection on all sector of BANK1*/
705 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~(WRPSector>>12));
706 }
707 else
708 {
709 /*Write protection done on sectors of BANK1*/
710 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~WRPSector);
711 }
712 }
713 else
714 {
715 /*Write protection done on sectors of BANK2*/
716 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector>>12));
717 }
718
719 /*Write protection on all sector of BANK2*/
720 if((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH))
721 {
722 /* Wait for last operation to be completed */
723 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
724
725 if(status == HAL_OK)
726 {
727 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~(WRPSector>>12));
728 }
729 }
730
731 }
732 return status;
733}
734
735/**
736 * @brief Disable the write protection of the desired bank1 or bank 2 sectors
737 *
738 * @note When the memory read protection level is selected (RDP level = 1),
739 * it is not possible to program or erase the flash sector i if CortexM4
740 * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
741 * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
742 *
743 * @param WRPSector: specifies the sector(s) to be write protected.
744 * This parameter can be one of the following values:
745 * @arg WRPSector: A value between OB_WRP_SECTOR_0 and OB_WRP_SECTOR_23
746 * @arg OB_WRP_Sector_All
747 * @note BANK2 starts from OB_WRP_SECTOR_12
748 *
749 * @param Banks: Disable write protection on all the sectors for the specific bank
750 * This parameter can be one of the following values:
751 * @arg FLASH_BANK_1: Bank1 to be erased
752 * @arg FLASH_BANK_2: Bank2 to be erased
753 * @arg FLASH_BANK_BOTH: Bank1 and Bank2 to be erased
754 *
755 * @retval HAL Status
756 */
757static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks)
758{
759 HAL_StatusTypeDef status = HAL_OK;
760
761 /* Check the parameters */
762 assert_param(IS_OB_WRP_SECTOR(WRPSector));
763 assert_param(IS_FLASH_BANK(Banks));
764
765 /* Wait for last operation to be completed */
766 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
767
768 if(status == HAL_OK)
769 {
770 if(((WRPSector == OB_WRP_SECTOR_All) && ((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))) ||
771 (WRPSector < OB_WRP_SECTOR_12))
772 {
773 if(WRPSector == OB_WRP_SECTOR_All)
774 {
775 /*Write protection on all sector of BANK1*/
776 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12);
777 }
778 else
779 {
780 /*Write protection done on sectors of BANK1*/
781 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)WRPSector;
782 }
783 }
784 else
785 {
786 /*Write protection done on sectors of BANK2*/
787 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12);
788 }
789
790 /*Write protection on all sector of BANK2*/
791 if((WRPSector == OB_WRP_SECTOR_All) && (Banks == FLASH_BANK_BOTH))
792 {
793 /* Wait for last operation to be completed */
794 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
795
796 if(status == HAL_OK)
797 {
798 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)(WRPSector>>12);
799 }
800 }
801
802 }
803
804 return status;
805}
806
807/**
808 * @brief Configure the Dual Bank Boot.
809 *
810 * @note This function can be used only for STM32F42xxx/43xxx devices.
811 *
812 * @param BootConfig specifies the Dual Bank Boot Option byte.
813 * This parameter can be one of the following values:
814 * @arg OB_Dual_BootEnabled: Dual Bank Boot Enable
815 * @arg OB_Dual_BootDisabled: Dual Bank Boot Disabled
816 * @retval None
817 */
818static HAL_StatusTypeDef FLASH_OB_BootConfig(uint8_t BootConfig)
819{
820 HAL_StatusTypeDef status = HAL_OK;
821
822 /* Check the parameters */
823 assert_param(IS_OB_BOOT(BootConfig));
824
825 /* Wait for last operation to be completed */
826 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
827
828 if(status == HAL_OK)
829 {
830 /* Set Dual Bank Boot */
831 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BFB2);
832 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= BootConfig;
833 }
834
835 return status;
836}
837
838/**
839 * @brief Enable the read/write protection (PCROP) of the desired
840 * sectors of Bank 1 and/or Bank 2.
841 * @note This function can be used only for STM32F42xxx/43xxx devices.
842 * @param SectorBank1 Specifies the sector(s) to be read/write protected or unprotected for bank1.
843 * This parameter can be one of the following values:
844 * @arg OB_PCROP: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_11
845 * @arg OB_PCROP_SECTOR__All
846 * @param SectorBank2 Specifies the sector(s) to be read/write protected or unprotected for bank2.
847 * This parameter can be one of the following values:
848 * @arg OB_PCROP: A value between OB_PCROP_SECTOR_12 and OB_PCROP_SECTOR_23
849 * @arg OB_PCROP_SECTOR__All
850 * @param Banks Enable PCROP protection on all the sectors for the specific bank
851 * This parameter can be one of the following values:
852 * @arg FLASH_BANK_1: WRP on all sectors of bank1
853 * @arg FLASH_BANK_2: WRP on all sectors of bank2
854 * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
855 *
856 * @retval HAL Status
857 */
858static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks)
859{
860 HAL_StatusTypeDef status = HAL_OK;
861
862 assert_param(IS_FLASH_BANK(Banks));
863
864 /* Wait for last operation to be completed */
865 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
866
867 if(status == HAL_OK)
868 {
869 if((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))
870 {
871 assert_param(IS_OB_PCROP(SectorBank1));
872 /*Write protection done on sectors of BANK1*/
873 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)SectorBank1;
874 }
875 else
876 {
877 assert_param(IS_OB_PCROP(SectorBank2));
878 /*Write protection done on sectors of BANK2*/
879 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)SectorBank2;
880 }
881
882 /*Write protection on all sector of BANK2*/
883 if(Banks == FLASH_BANK_BOTH)
884 {
885 assert_param(IS_OB_PCROP(SectorBank2));
886 /* Wait for last operation to be completed */
887 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
888
889 if(status == HAL_OK)
890 {
891 /*Write protection done on sectors of BANK2*/
892 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS |= (uint16_t)SectorBank2;
893 }
894 }
895
896 }
897
898 return status;
899}
900
901
902/**
903 * @brief Disable the read/write protection (PCROP) of the desired
904 * sectors of Bank 1 and/or Bank 2.
905 * @note This function can be used only for STM32F42xxx/43xxx devices.
906 * @param SectorBank1 specifies the sector(s) to be read/write protected or unprotected for bank1.
907 * This parameter can be one of the following values:
908 * @arg OB_PCROP: A value between OB_PCROP_SECTOR_0 and OB_PCROP_SECTOR_11
909 * @arg OB_PCROP_SECTOR__All
910 * @param SectorBank2 Specifies the sector(s) to be read/write protected or unprotected for bank2.
911 * This parameter can be one of the following values:
912 * @arg OB_PCROP: A value between OB_PCROP_SECTOR_12 and OB_PCROP_SECTOR_23
913 * @arg OB_PCROP_SECTOR__All
914 * @param Banks Disable PCROP protection on all the sectors for the specific bank
915 * This parameter can be one of the following values:
916 * @arg FLASH_BANK_1: WRP on all sectors of bank1
917 * @arg FLASH_BANK_2: WRP on all sectors of bank2
918 * @arg FLASH_BANK_BOTH: WRP on all sectors of bank1 & bank2
919 *
920 * @retval HAL Status
921 */
922static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t SectorBank1, uint32_t SectorBank2, uint32_t Banks)
923{
924 HAL_StatusTypeDef status = HAL_OK;
925
926 /* Check the parameters */
927 assert_param(IS_FLASH_BANK(Banks));
928
929 /* Wait for last operation to be completed */
930 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
931
932 if(status == HAL_OK)
933 {
934 if((Banks == FLASH_BANK_1) || (Banks == FLASH_BANK_BOTH))
935 {
936 assert_param(IS_OB_PCROP(SectorBank1));
937 /*Write protection done on sectors of BANK1*/
938 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~SectorBank1);
939 }
940 else
941 {
942 /*Write protection done on sectors of BANK2*/
943 assert_param(IS_OB_PCROP(SectorBank2));
944 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2);
945 }
946
947 /*Write protection on all sector of BANK2*/
948 if(Banks == FLASH_BANK_BOTH)
949 {
950 assert_param(IS_OB_PCROP(SectorBank2));
951 /* Wait for last operation to be completed */
952 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
953
954 if(status == HAL_OK)
955 {
956 /*Write protection done on sectors of BANK2*/
957 *(__IO uint16_t*)OPTCR1_BYTE2_ADDRESS &= (~SectorBank2);
958 }
959 }
960
961 }
962
963 return status;
964
965}
966
967#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F469xx || STM32F479xx */
968
969#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
970 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) ||\
971 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F446xx)
972/**
973 * @brief Mass erase of FLASH memory
974 * @param VoltageRange: The device voltage range which defines the erase parallelism.
975 * This parameter can be one of the following values:
976 * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
977 * the operation will be done by byte (8-bit)
978 * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
979 * the operation will be done by half word (16-bit)
980 * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
981 * the operation will be done by word (32-bit)
982 * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
983 * the operation will be done by double word (64-bit)
984 *
985 * @param Banks: Banks to be erased
986 * This parameter can be one of the following values:
987 * @arg FLASH_BANK_1: Bank1 to be erased
988 *
989 * @retval None
990 */
991static void FLASH_MassErase(uint8_t VoltageRange, uint32_t Banks)
992{
993 uint32_t tmp_psize = 0;
994
995 /* Check the parameters */
996 assert_param(IS_VOLTAGERANGE(VoltageRange));
997 assert_param(IS_FLASH_BANK(Banks));
998
999 /* If the previous operation is completed, proceed to erase all sectors */
1000 CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
1001 FLASH->CR |= tmp_psize;
1002 FLASH->CR |= FLASH_CR_MER;
1003 FLASH->CR |= FLASH_CR_STRT;
1004}
1005
1006/**
1007 * @brief Erase the specified FLASH memory sector
1008 * @param Sector: FLASH sector to erase
1009 * The value of this parameter depend on device used within the same series
1010 * @param VoltageRange: The device voltage range which defines the erase parallelism.
1011 * This parameter can be one of the following values:
1012 * @arg FLASH_VOLTAGE_RANGE_1: when the device voltage range is 1.8V to 2.1V,
1013 * the operation will be done by byte (8-bit)
1014 * @arg FLASH_VOLTAGE_RANGE_2: when the device voltage range is 2.1V to 2.7V,
1015 * the operation will be done by half word (16-bit)
1016 * @arg FLASH_VOLTAGE_RANGE_3: when the device voltage range is 2.7V to 3.6V,
1017 * the operation will be done by word (32-bit)
1018 * @arg FLASH_VOLTAGE_RANGE_4: when the device voltage range is 2.7V to 3.6V + External Vpp,
1019 * the operation will be done by double word (64-bit)
1020 *
1021 * @retval None
1022 */
1023void FLASH_Erase_Sector(uint32_t Sector, uint8_t VoltageRange)
1024{
1025 uint32_t tmp_psize = 0;
1026
1027 /* Check the parameters */
1028 assert_param(IS_FLASH_SECTOR(Sector));
1029 assert_param(IS_VOLTAGERANGE(VoltageRange));
1030
1031 if(VoltageRange == FLASH_VOLTAGE_RANGE_1)
1032 {
1033 tmp_psize = FLASH_PSIZE_BYTE;
1034 }
1035 else if(VoltageRange == FLASH_VOLTAGE_RANGE_2)
1036 {
1037 tmp_psize = FLASH_PSIZE_HALF_WORD;
1038 }
1039 else if(VoltageRange == FLASH_VOLTAGE_RANGE_3)
1040 {
1041 tmp_psize = FLASH_PSIZE_WORD;
1042 }
1043 else
1044 {
1045 tmp_psize = FLASH_PSIZE_DOUBLE_WORD;
1046 }
1047
1048 /* If the previous operation is completed, proceed to erase the sector */
1049 CLEAR_BIT(FLASH->CR, FLASH_CR_PSIZE);
1050 FLASH->CR |= tmp_psize;
1051 CLEAR_BIT(FLASH->CR, FLASH_CR_SNB);
1052 FLASH->CR |= FLASH_CR_SER | (Sector << POSITION_VAL(FLASH_CR_SNB));
1053 FLASH->CR |= FLASH_CR_STRT;
1054}
1055
1056/**
1057 * @brief Enable the write protection of the desired bank 1 sectors
1058 *
1059 * @note When the memory read protection level is selected (RDP level = 1),
1060 * it is not possible to program or erase the flash sector i if CortexM4
1061 * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
1062 * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
1063 *
1064 * @param WRPSector: specifies the sector(s) to be write protected.
1065 * The value of this parameter depend on device used within the same series
1066 *
1067 * @param Banks: Enable write protection on all the sectors for the specific bank
1068 * This parameter can be one of the following values:
1069 * @arg FLASH_BANK_1: WRP on all sectors of bank1
1070 *
1071 * @retval HAL Status
1072 */
1073static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WRPSector, uint32_t Banks)
1074{
1075 HAL_StatusTypeDef status = HAL_OK;
1076
1077 /* Check the parameters */
1078 assert_param(IS_OB_WRP_SECTOR(WRPSector));
1079 assert_param(IS_FLASH_BANK(Banks));
1080
1081 /* Wait for last operation to be completed */
1082 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
1083
1084 if(status == HAL_OK)
1085 {
1086 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~WRPSector);
1087 }
1088
1089 return status;
1090}
1091
1092/**
1093 * @brief Disable the write protection of the desired bank 1 sectors
1094 *
1095 * @note When the memory read protection level is selected (RDP level = 1),
1096 * it is not possible to program or erase the flash sector i if CortexM4
1097 * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
1098 * @note Active value of nWRPi bits is inverted when PCROP mode is active (SPRMOD =1).
1099 *
1100 * @param WRPSector: specifies the sector(s) to be write protected.
1101 * The value of this parameter depend on device used within the same series
1102 *
1103 * @param Banks: Enable write protection on all the sectors for the specific bank
1104 * This parameter can be one of the following values:
1105 * @arg FLASH_BANK_1: WRP on all sectors of bank1
1106 *
1107 * @retval HAL Status
1108 */
1109static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WRPSector, uint32_t Banks)
1110{
1111 HAL_StatusTypeDef status = HAL_OK;
1112
1113 /* Check the parameters */
1114 assert_param(IS_OB_WRP_SECTOR(WRPSector));
1115 assert_param(IS_FLASH_BANK(Banks));
1116
1117 /* Wait for last operation to be completed */
1118 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
1119
1120 if(status == HAL_OK)
1121 {
1122 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)WRPSector;
1123 }
1124
1125 return status;
1126}
1127#endif /* STM32F40xxx || STM32F41xxx || STM32F401xx || STM32F410xx || STM32F411xE || STM32F446xx */
1128
1129#if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) ||\
1130 defined(STM32F411xE) || defined(STM32F446xx)
1131/**
1132 * @brief Enable the read/write protection (PCROP) of the desired sectors.
1133 * @note This function can be used only for STM32F401xx devices.
1134 * @param Sector specifies the sector(s) to be read/write protected or unprotected.
1135 * This parameter can be one of the following values:
1136 * @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector5
1137 * @arg OB_PCROP_Sector_All
1138 * @retval HAL Status
1139 */
1140static HAL_StatusTypeDef FLASH_OB_EnablePCROP(uint32_t Sector)
1141{
1142 HAL_StatusTypeDef status = HAL_OK;
1143
1144 /* Check the parameters */
1145 assert_param(IS_OB_PCROP(Sector));
1146
1147 /* Wait for last operation to be completed */
1148 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
1149
1150 if(status == HAL_OK)
1151 {
1152 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS |= (uint16_t)Sector;
1153 }
1154
1155 return status;
1156}
1157
1158
1159/**
1160 * @brief Disable the read/write protection (PCROP) of the desired sectors.
1161 * @note This function can be used only for STM32F401xx devices.
1162 * @param Sector specifies the sector(s) to be read/write protected or unprotected.
1163 * This parameter can be one of the following values:
1164 * @arg OB_PCROP: A value between OB_PCROP_Sector0 and OB_PCROP_Sector5
1165 * @arg OB_PCROP_Sector_All
1166 * @retval HAL Status
1167 */
1168static HAL_StatusTypeDef FLASH_OB_DisablePCROP(uint32_t Sector)
1169{
1170 HAL_StatusTypeDef status = HAL_OK;
1171
1172 /* Check the parameters */
1173 assert_param(IS_OB_PCROP(Sector));
1174
1175 /* Wait for last operation to be completed */
1176 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
1177
1178 if(status == HAL_OK)
1179 {
1180 *(__IO uint16_t*)OPTCR_BYTE2_ADDRESS &= (~Sector);
1181 }
1182
1183 return status;
1184
1185}
1186#endif /* STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx */
1187
1188/**
1189 * @brief Set the read protection level.
1190 * @param Level: specifies the read protection level.
1191 * This parameter can be one of the following values:
1192 * @arg OB_RDP_LEVEL_0: No protection
1193 * @arg OB_RDP_LEVEL_1: Read protection of the memory
1194 * @arg OB_RDP_LEVEL_2: Full chip protection
1195 *
1196 * @note WARNING: When enabling OB_RDP level 2 it's no more possible to go back to level 1 or 0
1197 *
1198 * @retval HAL Status
1199 */
1200static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t Level)
1201{
1202 HAL_StatusTypeDef status = HAL_OK;
1203
1204 /* Check the parameters */
1205 assert_param(IS_OB_RDP_LEVEL(Level));
1206
1207 /* Wait for last operation to be completed */
1208 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
1209
1210 if(status == HAL_OK)
1211 {
1212 *(__IO uint8_t*)OPTCR_BYTE1_ADDRESS = Level;
1213 }
1214
1215 return status;
1216}
1217
1218/**
1219 * @brief Program the FLASH User Option Byte: IWDG_SW / RST_STOP / RST_STDBY.
1220 * @param Iwdg: Selects the IWDG mode
1221 * This parameter can be one of the following values:
1222 * @arg OB_IWDG_SW: Software IWDG selected
1223 * @arg OB_IWDG_HW: Hardware IWDG selected
1224 * @param Stop: Reset event when entering STOP mode.
1225 * This parameter can be one of the following values:
1226 * @arg OB_STOP_NO_RST: No reset generated when entering in STOP
1227 * @arg OB_STOP_RST: Reset generated when entering in STOP
1228 * @param Stdby: Reset event when entering Standby mode.
1229 * This parameter can be one of the following values:
1230 * @arg OB_STDBY_NO_RST: No reset generated when entering in STANDBY
1231 * @arg OB_STDBY_RST: Reset generated when entering in STANDBY
1232 * @retval HAL Status
1233 */
1234static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t Iwdg, uint8_t Stop, uint8_t Stdby)
1235{
1236 uint8_t optiontmp = 0xFF;
1237 HAL_StatusTypeDef status = HAL_OK;
1238
1239 /* Check the parameters */
1240 assert_param(IS_OB_IWDG_SOURCE(Iwdg));
1241 assert_param(IS_OB_STOP_SOURCE(Stop));
1242 assert_param(IS_OB_STDBY_SOURCE(Stdby));
1243
1244 /* Wait for last operation to be completed */
1245 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
1246
1247 if(status == HAL_OK)
1248 {
1249 /* Mask OPTLOCK, OPTSTRT, BOR_LEV and BFB2 bits */
1250 optiontmp = (uint8_t)((*(__IO uint8_t *)OPTCR_BYTE0_ADDRESS) & (uint8_t)0x1F);
1251
1252 /* Update User Option Byte */
1253 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS = Iwdg | (uint8_t)(Stdby | (uint8_t)(Stop | ((uint8_t)optiontmp)));
1254 }
1255
1256 return status;
1257}
1258
1259/**
1260 * @brief Set the BOR Level.
1261 * @param Level: specifies the Option Bytes BOR Reset Level.
1262 * This parameter can be one of the following values:
1263 * @arg OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
1264 * @arg OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
1265 * @arg OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
1266 * @arg OB_BOR_OFF: Supply voltage ranges from 1.62 to 2.1 V
1267 * @retval HAL Status
1268 */
1269static HAL_StatusTypeDef FLASH_OB_BOR_LevelConfig(uint8_t Level)
1270{
1271 /* Check the parameters */
1272 assert_param(IS_OB_BOR_LEVEL(Level));
1273
1274 /* Set the BOR Level */
1275 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS &= (~FLASH_OPTCR_BOR_LEV);
1276 *(__IO uint8_t *)OPTCR_BYTE0_ADDRESS |= Level;
1277
1278 return HAL_OK;
1279
1280}
1281
1282/**
1283 * @brief Return the FLASH User Option Byte value.
1284 * @retval uint8_t FLASH User Option Bytes values: IWDG_SW(Bit0), RST_STOP(Bit1)
1285 * and RST_STDBY(Bit2).
1286 */
1287static uint8_t FLASH_OB_GetUser(void)
1288{
1289 /* Return the User Option Byte */
1290 return ((uint8_t)(FLASH->OPTCR & 0xE0));
1291}
1292
1293/**
1294 * @brief Return the FLASH Write Protection Option Bytes value.
1295 * @retval uint16_t FLASH Write Protection Option Bytes value
1296 */
1297static uint16_t FLASH_OB_GetWRP(void)
1298{
1299 /* Return the FLASH write protection Register value */
1300 return (*(__IO uint16_t *)(OPTCR_BYTE2_ADDRESS));
1301}
1302
1303/**
1304 * @brief Returns the FLASH Read Protection level.
1305 * @retval FLASH ReadOut Protection Status:
1306 * This parameter can be one of the following values:
1307 * @arg OB_RDP_LEVEL_0: No protection
1308 * @arg OB_RDP_LEVEL_1: Read protection of the memory
1309 * @arg OB_RDP_LEVEL_2: Full chip protection
1310 */
1311static uint8_t FLASH_OB_GetRDP(void)
1312{
1313 uint8_t readstatus = OB_RDP_LEVEL_0;
1314
1315 if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_2))
1316 {
1317 readstatus = OB_RDP_LEVEL_2;
1318 }
1319 else if((*(__IO uint8_t*)(OPTCR_BYTE1_ADDRESS) == (uint8_t)OB_RDP_LEVEL_1))
1320 {
1321 readstatus = OB_RDP_LEVEL_1;
1322 }
1323 else
1324 {
1325 readstatus = OB_RDP_LEVEL_0;
1326 }
1327
1328 return readstatus;
1329}
1330
1331/**
1332 * @brief Returns the FLASH BOR level.
1333 * @retval uint8_t The FLASH BOR level:
1334 * - OB_BOR_LEVEL3: Supply voltage ranges from 2.7 to 3.6 V
1335 * - OB_BOR_LEVEL2: Supply voltage ranges from 2.4 to 2.7 V
1336 * - OB_BOR_LEVEL1: Supply voltage ranges from 2.1 to 2.4 V
1337 * - OB_BOR_OFF : Supply voltage ranges from 1.62 to 2.1 V
1338 */
1339static uint8_t FLASH_OB_GetBOR(void)
1340{
1341 /* Return the FLASH BOR level */
1342 return (uint8_t)(*(__IO uint8_t *)(OPTCR_BYTE0_ADDRESS) & (uint8_t)0x0C);
1343}
1344
1345/**
1346 * @}
1347 */
1348
1349#endif /* HAL_FLASH_MODULE_ENABLED */
1350
1351/**
1352 * @}
1353 */
1354
1355/**
1356 * @}
1357 */
1358
1359/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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