source: asp3_wo_tecs/trunk/arch/arm_m_gcc/stm32f4xx_stm32cube/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cryp.c@ 303

Last change on this file since 303 was 303, checked in by ertl-honda, 7 years ago

nucleo_f401re依存部の追加
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1/**
2 ******************************************************************************
3 * @file stm32f4xx_hal_cryp.c
4 * @author MCD Application Team
5 * @version V1.4.1
6 * @date 09-October-2015
7 * @brief CRYP HAL module driver.
8 * This file provides firmware functions to manage the following
9 * functionalities of the Cryptography (CRYP) peripheral:
10 * + Initialization and de-initialization functions
11 * + AES processing functions
12 * + DES processing functions
13 * + TDES processing functions
14 * + DMA callback functions
15 * + CRYP IRQ handler management
16 * + Peripheral State functions
17 *
18 @verbatim
19 ==============================================================================
20 ##### How to use this driver #####
21 ==============================================================================
22 [..]
23 The CRYP HAL driver can be used as follows:
24
25 (#)Initialize the CRYP low level resources by implementing the HAL_CRYP_MspInit():
26 (##) Enable the CRYP interface clock using __HAL_RCC_CRYP_CLK_ENABLE()
27 (##) In case of using interrupts (e.g. HAL_CRYP_AESECB_Encrypt_IT())
28 (+++) Configure the CRYP interrupt priority using HAL_NVIC_SetPriority()
29 (+++) Enable the CRYP IRQ handler using HAL_NVIC_EnableIRQ()
30 (+++) In CRYP IRQ handler, call HAL_CRYP_IRQHandler()
31 (##) In case of using DMA to control data transfer (e.g. HAL_CRYP_AESECB_Encrypt_DMA())
32 (+++) Enable the DMAx interface clock using __DMAx_CLK_ENABLE()
33 (+++) Configure and enable two DMA streams one for managing data transfer from
34 memory to peripheral (input stream) and another stream for managing data
35 transfer from peripheral to memory (output stream)
36 (+++) Associate the initialized DMA handle to the CRYP DMA handle
37 using __HAL_LINKDMA()
38 (+++) Configure the priority and enable the NVIC for the transfer complete
39 interrupt on the two DMA Streams. The output stream should have higher
40 priority than the input stream HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ()
41
42 (#)Initialize the CRYP HAL using HAL_CRYP_Init(). This function configures mainly:
43 (##) The data type: 1-bit, 8-bit, 16-bit and 32-bit
44 (##) The key size: 128, 192 and 256. This parameter is relevant only for AES
45 (##) The encryption/decryption key. It's size depends on the algorithm
46 used for encryption/decryption
47 (##) The initialization vector (counter). It is not used ECB mode.
48
49 (#)Three processing (encryption/decryption) functions are available:
50 (##) Polling mode: encryption and decryption APIs are blocking functions
51 i.e. they process the data and wait till the processing is finished,
52 e.g. HAL_CRYP_AESCBC_Encrypt()
53 (##) Interrupt mode: encryption and decryption APIs are not blocking functions
54 i.e. they process the data under interrupt,
55 e.g. HAL_CRYP_AESCBC_Encrypt_IT()
56 (##) DMA mode: encryption and decryption APIs are not blocking functions
57 i.e. the data transfer is ensured by DMA,
58 e.g. HAL_CRYP_AESCBC_Encrypt_DMA()
59
60 (#)When the processing function is called at first time after HAL_CRYP_Init()
61 the CRYP peripheral is initialized and processes the buffer in input.
62 At second call, the processing function performs an append of the already
63 processed buffer.
64 When a new data block is to be processed, call HAL_CRYP_Init() then the
65 processing function.
66
67 (#)Call HAL_CRYP_DeInit() to deinitialize the CRYP peripheral.
68
69 @endverbatim
70 ******************************************************************************
71 * @attention
72 *
73 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
74 *
75 * Redistribution and use in source and binary forms, with or without modification,
76 * are permitted provided that the following conditions are met:
77 * 1. Redistributions of source code must retain the above copyright notice,
78 * this list of conditions and the following disclaimer.
79 * 2. Redistributions in binary form must reproduce the above copyright notice,
80 * this list of conditions and the following disclaimer in the documentation
81 * and/or other materials provided with the distribution.
82 * 3. Neither the name of STMicroelectronics nor the names of its contributors
83 * may be used to endorse or promote products derived from this software
84 * without specific prior written permission.
85 *
86 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
87 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
88 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
89 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
90 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
91 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
92 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
93 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
94 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
95 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
96 *
97 ******************************************************************************
98 */
99
100/* Includes ------------------------------------------------------------------*/
101#include "stm32f4xx_hal.h"
102
103/** @addtogroup STM32F4xx_HAL_Driver
104 * @{
105 */
106
107/** @defgroup CRYP CRYP
108 * @brief CRYP HAL module driver.
109 * @{
110 */
111
112#ifdef HAL_CRYP_MODULE_ENABLED
113
114#if defined(STM32F415xx) || defined(STM32F417xx) || defined(STM32F437xx) || defined(STM32F439xx) || defined(STM32F479xx)
115
116/* Private typedef -----------------------------------------------------------*/
117/* Private define ------------------------------------------------------------*/
118/** @addtogroup CRYP_Private_define
119 * @{
120 */
121#define CRYP_TIMEOUT_VALUE 1
122/**
123 * @}
124 */
125
126/* Private macro -------------------------------------------------------------*/
127/* Private variables ---------------------------------------------------------*/
128/* Private function prototypes -----------------------------------------------*/
129/** @addtogroup CRYP_Private_Functions_prototypes
130 * @{
131 */
132static void CRYP_SetInitVector(CRYP_HandleTypeDef *hcryp, uint8_t *InitVector, uint32_t IVSize);
133static void CRYP_SetKey(CRYP_HandleTypeDef *hcryp, uint8_t *Key, uint32_t KeySize);
134static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout);
135static HAL_StatusTypeDef CRYP_ProcessData2Words(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout);
136static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma);
137static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma);
138static void CRYP_DMAError(DMA_HandleTypeDef *hdma);
139static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr);
140static void CRYP_SetTDESECBMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction);
141static void CRYP_SetTDESCBCMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction);
142static void CRYP_SetDESECBMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction);
143static void CRYP_SetDESCBCMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction);
144/**
145 * @}
146 */
147
148
149/* Private functions ---------------------------------------------------------*/
150
151/** @addtogroup CRYP_Private_Functions
152 * @{
153 */
154
155
156/**
157 * @brief DMA CRYP Input Data process complete callback.
158 * @param hdma: DMA handle
159 * @retval None
160 */
161static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma)
162{
163 CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
164
165 /* Disable the DMA transfer for input FIFO request by resetting the DIEN bit
166 in the DMACR register */
167 hcryp->Instance->DMACR &= (uint32_t)(~CRYP_DMACR_DIEN);
168
169 /* Call input data transfer complete callback */
170 HAL_CRYP_InCpltCallback(hcryp);
171}
172
173/**
174 * @brief DMA CRYP Output Data process complete callback.
175 * @param hdma: DMA handle
176 * @retval None
177 */
178static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma)
179{
180 CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
181
182 /* Disable the DMA transfer for output FIFO request by resetting the DOEN bit
183 in the DMACR register */
184 hcryp->Instance->DMACR &= (uint32_t)(~CRYP_DMACR_DOEN);
185
186 /* Disable CRYP */
187 __HAL_CRYP_DISABLE(hcryp);
188
189 /* Change the CRYP state to ready */
190 hcryp->State = HAL_CRYP_STATE_READY;
191
192 /* Call output data transfer complete callback */
193 HAL_CRYP_OutCpltCallback(hcryp);
194}
195
196/**
197 * @brief DMA CRYP communication error callback.
198 * @param hdma: DMA handle
199 * @retval None
200 */
201static void CRYP_DMAError(DMA_HandleTypeDef *hdma)
202{
203 CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
204 hcryp->State= HAL_CRYP_STATE_READY;
205 HAL_CRYP_ErrorCallback(hcryp);
206}
207
208/**
209 * @brief Writes the Key in Key registers.
210 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
211 * the configuration information for CRYP module
212 * @param Key: Pointer to Key buffer
213 * @param KeySize: Size of Key
214 * @retval None
215 */
216static void CRYP_SetKey(CRYP_HandleTypeDef *hcryp, uint8_t *Key, uint32_t KeySize)
217{
218 uint32_t keyaddr = (uint32_t)Key;
219
220 switch(KeySize)
221 {
222 case CRYP_KEYSIZE_256B:
223 /* Key Initialisation */
224 hcryp->Instance->K0LR = __REV(*(uint32_t*)(keyaddr));
225 keyaddr+=4;
226 hcryp->Instance->K0RR = __REV(*(uint32_t*)(keyaddr));
227 keyaddr+=4;
228 hcryp->Instance->K1LR = __REV(*(uint32_t*)(keyaddr));
229 keyaddr+=4;
230 hcryp->Instance->K1RR = __REV(*(uint32_t*)(keyaddr));
231 keyaddr+=4;
232 hcryp->Instance->K2LR = __REV(*(uint32_t*)(keyaddr));
233 keyaddr+=4;
234 hcryp->Instance->K2RR = __REV(*(uint32_t*)(keyaddr));
235 keyaddr+=4;
236 hcryp->Instance->K3LR = __REV(*(uint32_t*)(keyaddr));
237 keyaddr+=4;
238 hcryp->Instance->K3RR = __REV(*(uint32_t*)(keyaddr));
239 break;
240 case CRYP_KEYSIZE_192B:
241 hcryp->Instance->K1LR = __REV(*(uint32_t*)(keyaddr));
242 keyaddr+=4;
243 hcryp->Instance->K1RR = __REV(*(uint32_t*)(keyaddr));
244 keyaddr+=4;
245 hcryp->Instance->K2LR = __REV(*(uint32_t*)(keyaddr));
246 keyaddr+=4;
247 hcryp->Instance->K2RR = __REV(*(uint32_t*)(keyaddr));
248 keyaddr+=4;
249 hcryp->Instance->K3LR = __REV(*(uint32_t*)(keyaddr));
250 keyaddr+=4;
251 hcryp->Instance->K3RR = __REV(*(uint32_t*)(keyaddr));
252 break;
253 case CRYP_KEYSIZE_128B:
254 hcryp->Instance->K2LR = __REV(*(uint32_t*)(keyaddr));
255 keyaddr+=4;
256 hcryp->Instance->K2RR = __REV(*(uint32_t*)(keyaddr));
257 keyaddr+=4;
258 hcryp->Instance->K3LR = __REV(*(uint32_t*)(keyaddr));
259 keyaddr+=4;
260 hcryp->Instance->K3RR = __REV(*(uint32_t*)(keyaddr));
261 break;
262 default:
263 break;
264 }
265}
266
267/**
268 * @brief Writes the InitVector/InitCounter in IV registers.
269 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
270 * the configuration information for CRYP module
271 * @param InitVector: Pointer to InitVector/InitCounter buffer
272 * @param IVSize: Size of the InitVector/InitCounter
273 * @retval None
274 */
275static void CRYP_SetInitVector(CRYP_HandleTypeDef *hcryp, uint8_t *InitVector, uint32_t IVSize)
276{
277 uint32_t ivaddr = (uint32_t)InitVector;
278
279 switch(IVSize)
280 {
281 case CRYP_KEYSIZE_128B:
282 hcryp->Instance->IV0LR = __REV(*(uint32_t*)(ivaddr));
283 ivaddr+=4;
284 hcryp->Instance->IV0RR = __REV(*(uint32_t*)(ivaddr));
285 ivaddr+=4;
286 hcryp->Instance->IV1LR = __REV(*(uint32_t*)(ivaddr));
287 ivaddr+=4;
288 hcryp->Instance->IV1RR = __REV(*(uint32_t*)(ivaddr));
289 break;
290 /* Whatever key size 192 or 256, Init vector is written in IV0LR and IV0RR */
291 case CRYP_KEYSIZE_192B:
292 hcryp->Instance->IV0LR = __REV(*(uint32_t*)(ivaddr));
293 ivaddr+=4;
294 hcryp->Instance->IV0RR = __REV(*(uint32_t*)(ivaddr));
295 break;
296 case CRYP_KEYSIZE_256B:
297 hcryp->Instance->IV0LR = __REV(*(uint32_t*)(ivaddr));
298 ivaddr+=4;
299 hcryp->Instance->IV0RR = __REV(*(uint32_t*)(ivaddr));
300 break;
301 default:
302 break;
303 }
304}
305
306/**
307 * @brief Process Data: Writes Input data in polling mode and read the output data
308 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
309 * the configuration information for CRYP module
310 * @param Input: Pointer to the Input buffer
311 * @param Ilength: Length of the Input buffer, must be a multiple of 16.
312 * @param Output: Pointer to the returned buffer
313 * @param Timeout: Timeout value
314 * * @retval None
315 */
316static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout)
317{
318 uint32_t tickstart = 0;
319
320 uint32_t i = 0;
321 uint32_t inputaddr = (uint32_t)Input;
322 uint32_t outputaddr = (uint32_t)Output;
323
324 for(i=0; (i < Ilength); i+=16)
325 {
326 /* Write the Input block in the IN FIFO */
327 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
328 inputaddr+=4;
329 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
330 inputaddr+=4;
331 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
332 inputaddr+=4;
333 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
334 inputaddr+=4;
335
336 /* Get tick */
337 tickstart = HAL_GetTick();
338
339 while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_OFNE))
340 {
341 /* Check for the Timeout */
342 if(Timeout != HAL_MAX_DELAY)
343 {
344 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
345 {
346 /* Change state */
347 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
348
349 /* Process Unlocked */
350 __HAL_UNLOCK(hcryp);
351
352 return HAL_TIMEOUT;
353 }
354 }
355 }
356 /* Read the Output block from the Output FIFO */
357 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
358 outputaddr+=4;
359 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
360 outputaddr+=4;
361 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
362 outputaddr+=4;
363 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
364 outputaddr+=4;
365 }
366 /* Return function status */
367 return HAL_OK;
368}
369
370/**
371 * @brief Process Data: Write Input data in polling mode.
372 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
373 * the configuration information for CRYP module
374 * @param Input: Pointer to the Input buffer
375 * @param Ilength: Length of the Input buffer, must be a multiple of 8
376 * @param Output: Pointer to the returned buffer
377 * @param Timeout: Specify Timeout value
378 * @retval None
379 */
380static HAL_StatusTypeDef CRYP_ProcessData2Words(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout)
381{
382 uint32_t tickstart = 0;
383
384 uint32_t i = 0;
385 uint32_t inputaddr = (uint32_t)Input;
386 uint32_t outputaddr = (uint32_t)Output;
387
388 for(i=0; (i < Ilength); i+=8)
389 {
390 /* Write the Input block in the IN FIFO */
391 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
392 inputaddr+=4;
393 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
394 inputaddr+=4;
395
396 /* Get tick */
397 tickstart = HAL_GetTick();
398
399 while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_OFNE))
400 {
401 /* Check for the Timeout */
402 if(Timeout != HAL_MAX_DELAY)
403 {
404 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
405 {
406 /* Change state */
407 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
408
409 /* Process Unlocked */
410 __HAL_UNLOCK(hcryp);
411
412 return HAL_TIMEOUT;
413 }
414 }
415 }
416 /* Read the Output block from the Output FIFO */
417 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
418 outputaddr+=4;
419 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
420 outputaddr+=4;
421 }
422 /* Return function status */
423 return HAL_OK;
424}
425
426/**
427 * @brief Set the DMA configuration and start the DMA transfer
428 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
429 * the configuration information for CRYP module
430 * @param inputaddr: address of the Input buffer
431 * @param Size: Size of the Input buffer, must be a multiple of 16.
432 * @param outputaddr: address of the Output buffer
433 * @retval None
434 */
435static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr)
436{
437 /* Set the CRYP DMA transfer complete callback */
438 hcryp->hdmain->XferCpltCallback = CRYP_DMAInCplt;
439 /* Set the DMA error callback */
440 hcryp->hdmain->XferErrorCallback = CRYP_DMAError;
441
442 /* Set the CRYP DMA transfer complete callback */
443 hcryp->hdmaout->XferCpltCallback = CRYP_DMAOutCplt;
444 /* Set the DMA error callback */
445 hcryp->hdmaout->XferErrorCallback = CRYP_DMAError;
446
447 /* Enable CRYP */
448 __HAL_CRYP_ENABLE(hcryp);
449
450 /* Enable the DMA In DMA Stream */
451 HAL_DMA_Start_IT(hcryp->hdmain, inputaddr, (uint32_t)&hcryp->Instance->DR, Size/4);
452
453 /* Enable In DMA request */
454 hcryp->Instance->DMACR = (CRYP_DMACR_DIEN);
455
456 /* Enable the DMA Out DMA Stream */
457 HAL_DMA_Start_IT(hcryp->hdmaout, (uint32_t)&hcryp->Instance->DOUT, outputaddr, Size/4);
458
459 /* Enable Out DMA request */
460 hcryp->Instance->DMACR |= CRYP_DMACR_DOEN;
461
462}
463
464/**
465 * @brief Sets the CRYP peripheral in DES ECB mode.
466 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
467 * the configuration information for CRYP module
468 * @param Direction: Encryption or decryption
469 * @retval None
470 */
471static void CRYP_SetDESECBMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction)
472{
473 /* Check if initialization phase has already been performed */
474 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
475 {
476 /* Set the CRYP peripheral in AES ECB mode */
477 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_DES_ECB | Direction);
478
479 /* Set the key */
480 hcryp->Instance->K1LR = __REV(*(uint32_t*)(hcryp->Init.pKey));
481 hcryp->Instance->K1RR = __REV(*(uint32_t*)(hcryp->Init.pKey+4));
482
483 /* Flush FIFO */
484 __HAL_CRYP_FIFO_FLUSH(hcryp);
485
486 /* Set the phase */
487 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
488 }
489}
490
491/**
492 * @brief Sets the CRYP peripheral in DES CBC mode.
493 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
494 * the configuration information for CRYP module
495 * @param Direction: Encryption or decryption
496 * @retval None
497 */
498static void CRYP_SetDESCBCMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction)
499{
500 /* Check if initialization phase has already been performed */
501 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
502 {
503 /* Set the CRYP peripheral in AES ECB mode */
504 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_DES_CBC | Direction);
505
506 /* Set the key */
507 hcryp->Instance->K1LR = __REV(*(uint32_t*)(hcryp->Init.pKey));
508 hcryp->Instance->K1RR = __REV(*(uint32_t*)(hcryp->Init.pKey+4));
509
510 /* Set the Initialization Vector */
511 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_256B);
512
513 /* Flush FIFO */
514 __HAL_CRYP_FIFO_FLUSH(hcryp);
515
516 /* Set the phase */
517 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
518 }
519}
520
521/**
522 * @brief Sets the CRYP peripheral in TDES ECB mode.
523 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
524 * the configuration information for CRYP module
525 * @param Direction: Encryption or decryption
526 * @retval None
527 */
528static void CRYP_SetTDESECBMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction)
529{
530 /* Check if initialization phase has already been performed */
531 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
532 {
533 /* Set the CRYP peripheral in AES ECB mode */
534 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_TDES_ECB | Direction);
535
536 /* Set the key */
537 CRYP_SetKey(hcryp, hcryp->Init.pKey, CRYP_KEYSIZE_192B);
538
539 /* Flush FIFO */
540 __HAL_CRYP_FIFO_FLUSH(hcryp);
541
542 /* Set the phase */
543 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
544 }
545}
546
547/**
548 * @brief Sets the CRYP peripheral in TDES CBC mode
549 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
550 * the configuration information for CRYP module
551 * @param Direction: Encryption or decryption
552 * @retval None
553 */
554static void CRYP_SetTDESCBCMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction)
555{
556 /* Check if initialization phase has already been performed */
557 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
558 {
559 /* Set the CRYP peripheral in AES CBC mode */
560 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_TDES_CBC | Direction);
561
562 /* Set the key */
563 CRYP_SetKey(hcryp, hcryp->Init.pKey, CRYP_KEYSIZE_192B);
564
565 /* Set the Initialization Vector */
566 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_256B);
567
568 /* Flush FIFO */
569 __HAL_CRYP_FIFO_FLUSH(hcryp);
570
571 /* Set the phase */
572 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
573 }
574}
575
576/**
577 * @}
578 */
579
580 /* Exported functions --------------------------------------------------------*/
581/** @addtogroup CRYP_Exported_Functions
582 * @{
583 */
584
585/** @defgroup CRYP_Exported_Functions_Group1 Initialization and de-initialization functions
586 * @brief Initialization and Configuration functions.
587 *
588@verbatim
589 ==============================================================================
590 ##### Initialization and de-initialization functions #####
591 ==============================================================================
592 [..] This section provides functions allowing to:
593 (+) Initialize the CRYP according to the specified parameters
594 in the CRYP_InitTypeDef and creates the associated handle
595 (+) DeInitialize the CRYP peripheral
596 (+) Initialize the CRYP MSP
597 (+) DeInitialize CRYP MSP
598
599@endverbatim
600 * @{
601 */
602
603/**
604 * @brief Initializes the CRYP according to the specified
605 * parameters in the CRYP_InitTypeDef and creates the associated handle.
606 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
607 * the configuration information for CRYP module
608 * @retval HAL status
609 */
610HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp)
611{
612 /* Check the CRYP handle allocation */
613 if(hcryp == NULL)
614 {
615 return HAL_ERROR;
616 }
617
618 /* Check the parameters */
619 assert_param(IS_CRYP_KEYSIZE(hcryp->Init.KeySize));
620 assert_param(IS_CRYP_DATATYPE(hcryp->Init.DataType));
621
622 if(hcryp->State == HAL_CRYP_STATE_RESET)
623 {
624 /* Allocate lock resource and initialize it */
625 hcryp->Lock = HAL_UNLOCKED;
626 /* Init the low level hardware */
627 HAL_CRYP_MspInit(hcryp);
628 }
629
630 /* Change the CRYP state */
631 hcryp->State = HAL_CRYP_STATE_BUSY;
632
633 /* Set the key size and data type*/
634 CRYP->CR = (uint32_t) (hcryp->Init.KeySize | hcryp->Init.DataType);
635
636 /* Reset CrypInCount and CrypOutCount */
637 hcryp->CrypInCount = 0;
638 hcryp->CrypOutCount = 0;
639
640 /* Change the CRYP state */
641 hcryp->State = HAL_CRYP_STATE_READY;
642
643 /* Set the default CRYP phase */
644 hcryp->Phase = HAL_CRYP_PHASE_READY;
645
646 /* Return function status */
647 return HAL_OK;
648}
649
650/**
651 * @brief DeInitializes the CRYP peripheral.
652 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
653 * the configuration information for CRYP module
654 * @retval HAL status
655 */
656HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp)
657{
658 /* Check the CRYP handle allocation */
659 if(hcryp == NULL)
660 {
661 return HAL_ERROR;
662 }
663
664 /* Change the CRYP state */
665 hcryp->State = HAL_CRYP_STATE_BUSY;
666
667 /* Set the default CRYP phase */
668 hcryp->Phase = HAL_CRYP_PHASE_READY;
669
670 /* Reset CrypInCount and CrypOutCount */
671 hcryp->CrypInCount = 0;
672 hcryp->CrypOutCount = 0;
673
674 /* Disable the CRYP Peripheral Clock */
675 __HAL_CRYP_DISABLE(hcryp);
676
677 /* DeInit the low level hardware: CLOCK, NVIC.*/
678 HAL_CRYP_MspDeInit(hcryp);
679
680 /* Change the CRYP state */
681 hcryp->State = HAL_CRYP_STATE_RESET;
682
683 /* Release Lock */
684 __HAL_UNLOCK(hcryp);
685
686 /* Return function status */
687 return HAL_OK;
688}
689
690/**
691 * @brief Initializes the CRYP MSP.
692 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
693 * the configuration information for CRYP module
694 * @retval None
695 */
696__weak void HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp)
697{
698 /* NOTE : This function Should not be modified, when the callback is needed,
699 the HAL_CRYP_MspInit could be implemented in the user file
700 */
701}
702
703/**
704 * @brief DeInitializes CRYP MSP.
705 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
706 * the configuration information for CRYP module
707 * @retval None
708 */
709__weak void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef *hcryp)
710{
711 /* NOTE : This function Should not be modified, when the callback is needed,
712 the HAL_CRYP_MspDeInit could be implemented in the user file
713 */
714}
715
716/**
717 * @}
718 */
719
720/** @defgroup CRYP_Exported_Functions_Group2 AES processing functions
721 * @brief processing functions.
722 *
723@verbatim
724 ==============================================================================
725 ##### AES processing functions #####
726 ==============================================================================
727 [..] This section provides functions allowing to:
728 (+) Encrypt plaintext using AES-128/192/256 using chaining modes
729 (+) Decrypt cyphertext using AES-128/192/256 using chaining modes
730 [..] Three processing functions are available:
731 (+) Polling mode
732 (+) Interrupt mode
733 (+) DMA mode
734
735@endverbatim
736 * @{
737 */
738
739/**
740 * @brief Initializes the CRYP peripheral in AES ECB encryption mode
741 * then encrypt pPlainData. The cypher data are available in pCypherData
742 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
743 * the configuration information for CRYP module
744 * @param pPlainData: Pointer to the plaintext buffer
745 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
746 * @param pCypherData: Pointer to the cyphertext buffer
747 * @param Timeout: Specify Timeout value
748 * @retval HAL status
749 */
750HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
751{
752 /* Process Locked */
753 __HAL_LOCK(hcryp);
754
755 /* Change the CRYP state */
756 hcryp->State = HAL_CRYP_STATE_BUSY;
757
758 /* Check if initialization phase has already been performed */
759 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
760 {
761 /* Set the key */
762 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
763
764 /* Set the CRYP peripheral in AES ECB mode */
765 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB);
766
767 /* Flush FIFO */
768 __HAL_CRYP_FIFO_FLUSH(hcryp);
769
770 /* Enable CRYP */
771 __HAL_CRYP_ENABLE(hcryp);
772
773 /* Set the phase */
774 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
775 }
776
777 /* Write Plain Data and Get Cypher Data */
778 if(CRYP_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
779 {
780 return HAL_TIMEOUT;
781 }
782
783 /* Change the CRYP state */
784 hcryp->State = HAL_CRYP_STATE_READY;
785
786 /* Process Unlocked */
787 __HAL_UNLOCK(hcryp);
788
789 /* Return function status */
790 return HAL_OK;
791}
792
793/**
794 * @brief Initializes the CRYP peripheral in AES CBC encryption mode
795 * then encrypt pPlainData. The cypher data are available in pCypherData
796 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
797 * the configuration information for CRYP module
798 * @param pPlainData: Pointer to the plaintext buffer
799 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
800 * @param pCypherData: Pointer to the cyphertext buffer
801 * @param Timeout: Specify Timeout value
802 * @retval HAL status
803 */
804HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
805{
806 /* Process Locked */
807 __HAL_LOCK(hcryp);
808
809 /* Change the CRYP state */
810 hcryp->State = HAL_CRYP_STATE_BUSY;
811
812 /* Check if initialization phase has already been performed */
813 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
814 {
815 /* Set the key */
816 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
817
818 /* Set the CRYP peripheral in AES ECB mode */
819 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC);
820
821 /* Set the Initialization Vector */
822 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
823
824 /* Flush FIFO */
825 __HAL_CRYP_FIFO_FLUSH(hcryp);
826
827 /* Enable CRYP */
828 __HAL_CRYP_ENABLE(hcryp);
829
830 /* Set the phase */
831 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
832 }
833
834 /* Write Plain Data and Get Cypher Data */
835 if(CRYP_ProcessData(hcryp,pPlainData, Size, pCypherData, Timeout) != HAL_OK)
836 {
837 return HAL_TIMEOUT;
838 }
839
840 /* Change the CRYP state */
841 hcryp->State = HAL_CRYP_STATE_READY;
842
843 /* Process Unlocked */
844 __HAL_UNLOCK(hcryp);
845
846 /* Return function status */
847 return HAL_OK;
848}
849
850/**
851 * @brief Initializes the CRYP peripheral in AES CTR encryption mode
852 * then encrypt pPlainData. The cypher data are available in pCypherData
853 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
854 * the configuration information for CRYP module
855 * @param pPlainData: Pointer to the plaintext buffer
856 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
857 * @param pCypherData: Pointer to the cyphertext buffer
858 * @param Timeout: Specify Timeout value
859 * @retval HAL status
860 */
861HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
862{
863 /* Process Locked */
864 __HAL_LOCK(hcryp);
865
866 /* Change the CRYP state */
867 hcryp->State = HAL_CRYP_STATE_BUSY;
868
869 /* Check if initialization phase has already been performed */
870 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
871 {
872 /* Set the key */
873 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
874
875 /* Set the CRYP peripheral in AES ECB mode */
876 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR);
877
878 /* Set the Initialization Vector */
879 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
880
881 /* Flush FIFO */
882 __HAL_CRYP_FIFO_FLUSH(hcryp);
883
884 /* Enable CRYP */
885 __HAL_CRYP_ENABLE(hcryp);
886
887 /* Set the phase */
888 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
889 }
890
891 /* Write Plain Data and Get Cypher Data */
892 if(CRYP_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
893 {
894 return HAL_TIMEOUT;
895 }
896
897 /* Change the CRYP state */
898 hcryp->State = HAL_CRYP_STATE_READY;
899
900 /* Process Unlocked */
901 __HAL_UNLOCK(hcryp);
902
903 /* Return function status */
904 return HAL_OK;
905}
906
907
908
909/**
910 * @brief Initializes the CRYP peripheral in AES ECB decryption mode
911 * then decrypted pCypherData. The cypher data are available in pPlainData
912 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
913 * the configuration information for CRYP module
914 * @param pCypherData: Pointer to the cyphertext buffer
915 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
916 * @param pPlainData: Pointer to the plaintext buffer
917 * @param Timeout: Specify Timeout value
918 * @retval HAL status
919 */
920HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
921{
922 uint32_t tickstart = 0;
923
924 /* Process Locked */
925 __HAL_LOCK(hcryp);
926
927 /* Change the CRYP state */
928 hcryp->State = HAL_CRYP_STATE_BUSY;
929
930 /* Check if initialization phase has already been performed */
931 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
932 {
933 /* Set the key */
934 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
935
936 /* Set the CRYP peripheral in AES Key mode */
937 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_KEY | CRYP_CR_ALGODIR);
938
939 /* Enable CRYP */
940 __HAL_CRYP_ENABLE(hcryp);
941
942 /* Get tick */
943 tickstart = HAL_GetTick();
944
945 while(HAL_IS_BIT_SET(hcryp->Instance->SR, CRYP_FLAG_BUSY))
946 {
947 /* Check for the Timeout */
948 if(Timeout != HAL_MAX_DELAY)
949 {
950 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
951 {
952 /* Change state */
953 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
954
955 /* Process Unlocked */
956 __HAL_UNLOCK(hcryp);
957
958 return HAL_TIMEOUT;
959 }
960 }
961 }
962
963 /* Disable CRYP */
964 __HAL_CRYP_DISABLE(hcryp);
965
966 /* Reset the ALGOMODE bits*/
967 CRYP->CR &= (uint32_t)(~CRYP_CR_ALGOMODE);
968
969 /* Set the CRYP peripheral in AES ECB decryption mode */
970 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB | CRYP_CR_ALGODIR);
971 /* Flush FIFO */
972 __HAL_CRYP_FIFO_FLUSH(hcryp);
973
974 /* Enable CRYP */
975 __HAL_CRYP_ENABLE(hcryp);
976
977 /* Set the phase */
978 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
979 }
980
981 /* Write Plain Data and Get Cypher Data */
982 if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
983 {
984 return HAL_TIMEOUT;
985 }
986
987 /* Change the CRYP state */
988 hcryp->State = HAL_CRYP_STATE_READY;
989
990 /* Process Unlocked */
991 __HAL_UNLOCK(hcryp);
992
993 /* Return function status */
994 return HAL_OK;
995}
996
997/**
998 * @brief Initializes the CRYP peripheral in AES ECB decryption mode
999 * then decrypted pCypherData. The cypher data are available in pPlainData
1000 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1001 * the configuration information for CRYP module
1002 * @param pCypherData: Pointer to the cyphertext buffer
1003 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
1004 * @param pPlainData: Pointer to the plaintext buffer
1005 * @param Timeout: Specify Timeout value
1006 * @retval HAL status
1007 */
1008HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
1009{
1010 uint32_t tickstart = 0;
1011
1012 /* Process Locked */
1013 __HAL_LOCK(hcryp);
1014
1015 /* Change the CRYP state */
1016 hcryp->State = HAL_CRYP_STATE_BUSY;
1017
1018 /* Check if initialization phase has already been performed */
1019 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1020 {
1021 /* Set the key */
1022 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1023
1024 /* Set the CRYP peripheral in AES Key mode */
1025 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_KEY | CRYP_CR_ALGODIR);
1026
1027 /* Enable CRYP */
1028 __HAL_CRYP_ENABLE(hcryp);
1029
1030 /* Get tick */
1031 tickstart = HAL_GetTick();
1032
1033 while(HAL_IS_BIT_SET(hcryp->Instance->SR, CRYP_FLAG_BUSY))
1034 {
1035 /* Check for the Timeout */
1036 if(Timeout != HAL_MAX_DELAY)
1037 {
1038 if((Timeout == 0)||((HAL_GetTick() - tickstart ) > Timeout))
1039 {
1040 /* Change state */
1041 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
1042
1043 /* Process Unlocked */
1044 __HAL_UNLOCK(hcryp);
1045
1046 return HAL_TIMEOUT;
1047 }
1048 }
1049 }
1050
1051 /* Reset the ALGOMODE bits*/
1052 CRYP->CR &= (uint32_t)(~CRYP_CR_ALGOMODE);
1053
1054 /* Set the CRYP peripheral in AES CBC decryption mode */
1055 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC | CRYP_CR_ALGODIR);
1056
1057 /* Set the Initialization Vector */
1058 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1059
1060 /* Flush FIFO */
1061 __HAL_CRYP_FIFO_FLUSH(hcryp);
1062
1063 /* Enable CRYP */
1064 __HAL_CRYP_ENABLE(hcryp);
1065
1066 /* Set the phase */
1067 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1068 }
1069
1070 /* Write Plain Data and Get Cypher Data */
1071 if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
1072 {
1073 return HAL_TIMEOUT;
1074 }
1075
1076 /* Change the CRYP state */
1077 hcryp->State = HAL_CRYP_STATE_READY;
1078
1079 /* Process Unlocked */
1080 __HAL_UNLOCK(hcryp);
1081
1082 /* Return function status */
1083 return HAL_OK;
1084}
1085
1086/**
1087 * @brief Initializes the CRYP peripheral in AES CTR decryption mode
1088 * then decrypted pCypherData. The cypher data are available in pPlainData
1089 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1090 * the configuration information for CRYP module
1091 * @param pCypherData: Pointer to the cyphertext buffer
1092 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
1093 * @param pPlainData: Pointer to the plaintext buffer
1094 * @param Timeout: Specify Timeout value
1095 * @retval HAL status
1096 */
1097HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
1098{
1099 /* Process Locked */
1100 __HAL_LOCK(hcryp);
1101
1102 /* Check if initialization phase has already been performed */
1103 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1104 {
1105 /* Change the CRYP state */
1106 hcryp->State = HAL_CRYP_STATE_BUSY;
1107
1108 /* Set the key */
1109 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1110
1111 /* Set the CRYP peripheral in AES CTR mode */
1112 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR | CRYP_CR_ALGODIR);
1113
1114 /* Set the Initialization Vector */
1115 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1116
1117 /* Flush FIFO */
1118 __HAL_CRYP_FIFO_FLUSH(hcryp);
1119
1120 /* Enable CRYP */
1121 __HAL_CRYP_ENABLE(hcryp);
1122
1123 /* Set the phase */
1124 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1125 }
1126
1127 /* Write Plain Data and Get Cypher Data */
1128 if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
1129 {
1130 return HAL_TIMEOUT;
1131 }
1132
1133 /* Change the CRYP state */
1134 hcryp->State = HAL_CRYP_STATE_READY;
1135
1136 /* Process Unlocked */
1137 __HAL_UNLOCK(hcryp);
1138
1139 /* Return function status */
1140 return HAL_OK;
1141}
1142
1143/**
1144 * @brief Initializes the CRYP peripheral in AES ECB encryption mode using Interrupt.
1145 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1146 * the configuration information for CRYP module
1147 * @param pPlainData: Pointer to the plaintext buffer
1148 * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
1149 * @param pCypherData: Pointer to the cyphertext buffer
1150 * @retval HAL status
1151 */
1152HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
1153{
1154 uint32_t inputaddr;
1155 uint32_t outputaddr;
1156
1157 if(hcryp->State == HAL_CRYP_STATE_READY)
1158 {
1159 /* Process Locked */
1160 __HAL_LOCK(hcryp);
1161
1162 hcryp->CrypInCount = Size;
1163 hcryp->pCrypInBuffPtr = pPlainData;
1164 hcryp->pCrypOutBuffPtr = pCypherData;
1165 hcryp->CrypOutCount = Size;
1166
1167 /* Change the CRYP state */
1168 hcryp->State = HAL_CRYP_STATE_BUSY;
1169
1170 /* Check if initialization phase has already been performed */
1171 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1172 {
1173 /* Set the key */
1174 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1175
1176 /* Set the CRYP peripheral in AES ECB mode */
1177 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB);
1178
1179 /* Flush FIFO */
1180 __HAL_CRYP_FIFO_FLUSH(hcryp);
1181
1182 /* Set the phase */
1183 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1184 }
1185
1186 /* Enable Interrupts */
1187 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
1188
1189 /* Enable CRYP */
1190 __HAL_CRYP_ENABLE(hcryp);
1191
1192 /* Return function status */
1193 return HAL_OK;
1194 }
1195 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
1196 {
1197 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
1198 /* Write the Input block in the IN FIFO */
1199 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1200 inputaddr+=4;
1201 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1202 inputaddr+=4;
1203 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1204 inputaddr+=4;
1205 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1206 hcryp->pCrypInBuffPtr += 16;
1207 hcryp->CrypInCount -= 16;
1208 if(hcryp->CrypInCount == 0)
1209 {
1210 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
1211 /* Call the Input data transfer complete callback */
1212 HAL_CRYP_InCpltCallback(hcryp);
1213 }
1214 }
1215 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
1216 {
1217 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
1218 /* Read the Output block from the Output FIFO */
1219 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1220 outputaddr+=4;
1221 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1222 outputaddr+=4;
1223 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1224 outputaddr+=4;
1225 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1226 hcryp->pCrypOutBuffPtr += 16;
1227 hcryp->CrypOutCount -= 16;
1228 if(hcryp->CrypOutCount == 0)
1229 {
1230 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
1231 /* Process Locked */
1232 __HAL_UNLOCK(hcryp);
1233 /* Change the CRYP state */
1234 hcryp->State = HAL_CRYP_STATE_READY;
1235 /* Call Input transfer complete callback */
1236 HAL_CRYP_OutCpltCallback(hcryp);
1237 }
1238 }
1239
1240 /* Return function status */
1241 return HAL_OK;
1242}
1243
1244/**
1245 * @brief Initializes the CRYP peripheral in AES CBC encryption mode using Interrupt.
1246 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1247 * the configuration information for CRYP module
1248 * @param pPlainData: Pointer to the plaintext buffer
1249 * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
1250 * @param pCypherData: Pointer to the cyphertext buffer
1251 * @retval HAL status
1252 */
1253HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
1254{
1255 uint32_t inputaddr;
1256 uint32_t outputaddr;
1257
1258 if(hcryp->State == HAL_CRYP_STATE_READY)
1259 {
1260 /* Process Locked */
1261 __HAL_LOCK(hcryp);
1262
1263 hcryp->CrypInCount = Size;
1264 hcryp->pCrypInBuffPtr = pPlainData;
1265 hcryp->pCrypOutBuffPtr = pCypherData;
1266 hcryp->CrypOutCount = Size;
1267
1268 /* Change the CRYP state */
1269 hcryp->State = HAL_CRYP_STATE_BUSY;
1270
1271 /* Check if initialization phase has already been performed */
1272 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1273 {
1274 /* Set the key */
1275 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1276
1277 /* Set the CRYP peripheral in AES CBC mode */
1278 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC);
1279
1280 /* Set the Initialization Vector */
1281 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1282
1283 /* Flush FIFO */
1284 __HAL_CRYP_FIFO_FLUSH(hcryp);
1285
1286 /* Set the phase */
1287 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1288 }
1289 /* Enable Interrupts */
1290 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
1291
1292 /* Enable CRYP */
1293 __HAL_CRYP_ENABLE(hcryp);
1294
1295 /* Return function status */
1296 return HAL_OK;
1297 }
1298 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
1299 {
1300 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
1301 /* Write the Input block in the IN FIFO */
1302 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1303 inputaddr+=4;
1304 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1305 inputaddr+=4;
1306 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1307 inputaddr+=4;
1308 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1309 hcryp->pCrypInBuffPtr += 16;
1310 hcryp->CrypInCount -= 16;
1311 if(hcryp->CrypInCount == 0)
1312 {
1313 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
1314 /* Call the Input data transfer complete callback */
1315 HAL_CRYP_InCpltCallback(hcryp);
1316 }
1317 }
1318 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
1319 {
1320 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
1321 /* Read the Output block from the Output FIFO */
1322 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1323 outputaddr+=4;
1324 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1325 outputaddr+=4;
1326 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1327 outputaddr+=4;
1328 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1329 hcryp->pCrypOutBuffPtr += 16;
1330 hcryp->CrypOutCount -= 16;
1331 if(hcryp->CrypOutCount == 0)
1332 {
1333 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
1334 /* Process Locked */
1335 __HAL_UNLOCK(hcryp);
1336 /* Change the CRYP state */
1337 hcryp->State = HAL_CRYP_STATE_READY;
1338 /* Call Input transfer complete callback */
1339 HAL_CRYP_OutCpltCallback(hcryp);
1340 }
1341 }
1342
1343 /* Return function status */
1344 return HAL_OK;
1345}
1346
1347/**
1348 * @brief Initializes the CRYP peripheral in AES CTR encryption mode using Interrupt.
1349 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1350 * the configuration information for CRYP module
1351 * @param pPlainData: Pointer to the plaintext buffer
1352 * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
1353 * @param pCypherData: Pointer to the cyphertext buffer
1354 * @retval HAL status
1355 */
1356HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
1357{
1358 uint32_t inputaddr;
1359 uint32_t outputaddr;
1360
1361 if(hcryp->State == HAL_CRYP_STATE_READY)
1362 {
1363 /* Process Locked */
1364 __HAL_LOCK(hcryp);
1365
1366 hcryp->CrypInCount = Size;
1367 hcryp->pCrypInBuffPtr = pPlainData;
1368 hcryp->pCrypOutBuffPtr = pCypherData;
1369 hcryp->CrypOutCount = Size;
1370
1371 /* Change the CRYP state */
1372 hcryp->State = HAL_CRYP_STATE_BUSY;
1373
1374 /* Check if initialization phase has already been performed */
1375 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1376 {
1377 /* Set the key */
1378 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1379
1380 /* Set the CRYP peripheral in AES CTR mode */
1381 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR);
1382
1383 /* Set the Initialization Vector */
1384 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1385
1386 /* Flush FIFO */
1387 __HAL_CRYP_FIFO_FLUSH(hcryp);
1388
1389 /* Set the phase */
1390 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1391 }
1392 /* Enable Interrupts */
1393 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
1394
1395 /* Enable CRYP */
1396 __HAL_CRYP_ENABLE(hcryp);
1397
1398 /* Return function status */
1399 return HAL_OK;
1400 }
1401 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
1402 {
1403 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
1404 /* Write the Input block in the IN FIFO */
1405 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1406 inputaddr+=4;
1407 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1408 inputaddr+=4;
1409 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1410 inputaddr+=4;
1411 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1412 hcryp->pCrypInBuffPtr += 16;
1413 hcryp->CrypInCount -= 16;
1414 if(hcryp->CrypInCount == 0)
1415 {
1416 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
1417 /* Call the Input data transfer complete callback */
1418 HAL_CRYP_InCpltCallback(hcryp);
1419 }
1420 }
1421 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
1422 {
1423 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
1424 /* Read the Output block from the Output FIFO */
1425 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1426 outputaddr+=4;
1427 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1428 outputaddr+=4;
1429 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1430 outputaddr+=4;
1431 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1432 hcryp->pCrypOutBuffPtr += 16;
1433 hcryp->CrypOutCount -= 16;
1434 if(hcryp->CrypOutCount == 0)
1435 {
1436 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
1437 /* Process Unlocked */
1438 __HAL_UNLOCK(hcryp);
1439 /* Change the CRYP state */
1440 hcryp->State = HAL_CRYP_STATE_READY;
1441 /* Call Input transfer complete callback */
1442 HAL_CRYP_OutCpltCallback(hcryp);
1443 }
1444 }
1445
1446 /* Return function status */
1447 return HAL_OK;
1448}
1449
1450
1451/**
1452 * @brief Initializes the CRYP peripheral in AES ECB decryption mode using Interrupt.
1453 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1454 * the configuration information for CRYP module
1455 * @param pCypherData: Pointer to the cyphertext buffer
1456 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
1457 * @param pPlainData: Pointer to the plaintext buffer
1458 * @retval HAL status
1459 */
1460HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
1461{
1462 uint32_t tickstart = 0;
1463
1464 uint32_t inputaddr;
1465 uint32_t outputaddr;
1466
1467 if(hcryp->State == HAL_CRYP_STATE_READY)
1468 {
1469 /* Process Locked */
1470 __HAL_LOCK(hcryp);
1471
1472 hcryp->CrypInCount = Size;
1473 hcryp->pCrypInBuffPtr = pCypherData;
1474 hcryp->pCrypOutBuffPtr = pPlainData;
1475 hcryp->CrypOutCount = Size;
1476
1477 /* Change the CRYP state */
1478 hcryp->State = HAL_CRYP_STATE_BUSY;
1479
1480 /* Check if initialization phase has already been performed */
1481 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1482 {
1483 /* Set the key */
1484 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1485
1486 /* Set the CRYP peripheral in AES Key mode */
1487 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_KEY | CRYP_CR_ALGODIR);
1488 /* Enable CRYP */
1489 __HAL_CRYP_ENABLE(hcryp);
1490
1491 /* Get tick */
1492 tickstart = HAL_GetTick();
1493
1494 while(HAL_IS_BIT_SET(hcryp->Instance->SR, CRYP_FLAG_BUSY))
1495 {
1496 /* Check for the Timeout */
1497 if((HAL_GetTick() - tickstart ) > CRYP_TIMEOUT_VALUE)
1498 {
1499 /* Change state */
1500 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
1501
1502 /* Process Unlocked */
1503 __HAL_UNLOCK(hcryp);
1504
1505 return HAL_TIMEOUT;
1506 }
1507 }
1508
1509 /* Reset the ALGOMODE bits*/
1510 CRYP->CR &= (uint32_t)(~CRYP_CR_ALGOMODE);
1511
1512 /* Set the CRYP peripheral in AES ECB decryption mode */
1513 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB | CRYP_CR_ALGODIR);
1514
1515 /* Flush FIFO */
1516 __HAL_CRYP_FIFO_FLUSH(hcryp);
1517
1518 /* Set the phase */
1519 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1520 }
1521
1522 /* Enable Interrupts */
1523 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
1524
1525 /* Enable CRYP */
1526 __HAL_CRYP_ENABLE(hcryp);
1527
1528 /* Return function status */
1529 return HAL_OK;
1530 }
1531 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
1532 {
1533 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
1534 /* Write the Input block in the IN FIFO */
1535 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1536 inputaddr+=4;
1537 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1538 inputaddr+=4;
1539 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1540 inputaddr+=4;
1541 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1542 hcryp->pCrypInBuffPtr += 16;
1543 hcryp->CrypInCount -= 16;
1544 if(hcryp->CrypInCount == 0)
1545 {
1546 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
1547 /* Call the Input data transfer complete callback */
1548 HAL_CRYP_InCpltCallback(hcryp);
1549 }
1550 }
1551 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
1552 {
1553 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
1554 /* Read the Output block from the Output FIFO */
1555 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1556 outputaddr+=4;
1557 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1558 outputaddr+=4;
1559 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1560 outputaddr+=4;
1561 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1562 hcryp->pCrypOutBuffPtr += 16;
1563 hcryp->CrypOutCount -= 16;
1564 if(hcryp->CrypOutCount == 0)
1565 {
1566 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
1567 /* Process Unlocked */
1568 __HAL_UNLOCK(hcryp);
1569 /* Change the CRYP state */
1570 hcryp->State = HAL_CRYP_STATE_READY;
1571 /* Call Input transfer complete callback */
1572 HAL_CRYP_OutCpltCallback(hcryp);
1573 }
1574 }
1575
1576 /* Return function status */
1577 return HAL_OK;
1578}
1579
1580/**
1581 * @brief Initializes the CRYP peripheral in AES CBC decryption mode using IT.
1582 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1583 * the configuration information for CRYP module
1584 * @param pCypherData: Pointer to the cyphertext buffer
1585 * @param Size: Length of the plaintext buffer, must be a multiple of 16
1586 * @param pPlainData: Pointer to the plaintext buffer
1587 * @retval HAL status
1588 */
1589HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
1590{
1591
1592 uint32_t tickstart = 0;
1593 uint32_t inputaddr;
1594 uint32_t outputaddr;
1595
1596 if(hcryp->State == HAL_CRYP_STATE_READY)
1597 {
1598 /* Process Locked */
1599 __HAL_LOCK(hcryp);
1600
1601 /* Get the buffer addresses and sizes */
1602 hcryp->CrypInCount = Size;
1603 hcryp->pCrypInBuffPtr = pCypherData;
1604 hcryp->pCrypOutBuffPtr = pPlainData;
1605 hcryp->CrypOutCount = Size;
1606
1607 /* Change the CRYP state */
1608 hcryp->State = HAL_CRYP_STATE_BUSY;
1609
1610 /* Check if initialization phase has already been performed */
1611 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1612 {
1613 /* Set the key */
1614 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1615
1616 /* Set the CRYP peripheral in AES Key mode */
1617 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_KEY | CRYP_CR_ALGODIR);
1618
1619 /* Enable CRYP */
1620 __HAL_CRYP_ENABLE(hcryp);
1621
1622 /* Get tick */
1623 tickstart = HAL_GetTick();
1624
1625 while(HAL_IS_BIT_SET(hcryp->Instance->SR, CRYP_FLAG_BUSY))
1626 {
1627 /* Check for the Timeout */
1628 if((HAL_GetTick() - tickstart ) > CRYP_TIMEOUT_VALUE)
1629 {
1630 /* Change state */
1631 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
1632
1633 /* Process Unlocked */
1634 __HAL_UNLOCK(hcryp);
1635
1636 return HAL_TIMEOUT;
1637 }
1638 }
1639
1640 /* Reset the ALGOMODE bits*/
1641 CRYP->CR &= (uint32_t)(~CRYP_CR_ALGOMODE);
1642
1643 /* Set the CRYP peripheral in AES CBC decryption mode */
1644 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC | CRYP_CR_ALGODIR);
1645
1646 /* Set the Initialization Vector */
1647 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1648
1649 /* Flush FIFO */
1650 __HAL_CRYP_FIFO_FLUSH(hcryp);
1651
1652 /* Enable CRYP */
1653 __HAL_CRYP_ENABLE(hcryp);
1654
1655 /* Set the phase */
1656 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1657 }
1658
1659 /* Enable Interrupts */
1660 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
1661
1662 /* Enable CRYP */
1663 __HAL_CRYP_ENABLE(hcryp);
1664
1665 /* Return function status */
1666 return HAL_OK;
1667 }
1668 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
1669 {
1670 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
1671 /* Write the Input block in the IN FIFO */
1672 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1673 inputaddr+=4;
1674 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1675 inputaddr+=4;
1676 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1677 inputaddr+=4;
1678 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1679 hcryp->pCrypInBuffPtr += 16;
1680 hcryp->CrypInCount -= 16;
1681 if(hcryp->CrypInCount == 0)
1682 {
1683 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
1684 /* Call the Input data transfer complete callback */
1685 HAL_CRYP_InCpltCallback(hcryp);
1686 }
1687 }
1688 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
1689 {
1690 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
1691 /* Read the Output block from the Output FIFO */
1692 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1693 outputaddr+=4;
1694 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1695 outputaddr+=4;
1696 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1697 outputaddr+=4;
1698 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1699 hcryp->pCrypOutBuffPtr += 16;
1700 hcryp->CrypOutCount -= 16;
1701 if(hcryp->CrypOutCount == 0)
1702 {
1703 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
1704 /* Process Unlocked */
1705 __HAL_UNLOCK(hcryp);
1706 /* Change the CRYP state */
1707 hcryp->State = HAL_CRYP_STATE_READY;
1708 /* Call Input transfer complete callback */
1709 HAL_CRYP_OutCpltCallback(hcryp);
1710 }
1711 }
1712
1713 /* Return function status */
1714 return HAL_OK;
1715}
1716
1717/**
1718 * @brief Initializes the CRYP peripheral in AES CTR decryption mode using Interrupt.
1719 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1720 * the configuration information for CRYP module
1721 * @param pCypherData: Pointer to the cyphertext buffer
1722 * @param Size: Length of the plaintext buffer, must be a multiple of 16
1723 * @param pPlainData: Pointer to the plaintext buffer
1724 * @retval HAL status
1725 */
1726HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
1727{
1728 uint32_t inputaddr;
1729 uint32_t outputaddr;
1730
1731 if(hcryp->State == HAL_CRYP_STATE_READY)
1732 {
1733 /* Process Locked */
1734 __HAL_LOCK(hcryp);
1735
1736 /* Get the buffer addresses and sizes */
1737 hcryp->CrypInCount = Size;
1738 hcryp->pCrypInBuffPtr = pCypherData;
1739 hcryp->pCrypOutBuffPtr = pPlainData;
1740 hcryp->CrypOutCount = Size;
1741
1742 /* Change the CRYP state */
1743 hcryp->State = HAL_CRYP_STATE_BUSY;
1744
1745 /* Check if initialization phase has already been performed */
1746 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1747 {
1748 /* Set the key */
1749 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1750
1751 /* Set the CRYP peripheral in AES CTR mode */
1752 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR | CRYP_CR_ALGODIR);
1753
1754 /* Set the Initialization Vector */
1755 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1756
1757 /* Flush FIFO */
1758 __HAL_CRYP_FIFO_FLUSH(hcryp);
1759
1760 /* Set the phase */
1761 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1762 }
1763
1764 /* Enable Interrupts */
1765 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
1766
1767 /* Enable CRYP */
1768 __HAL_CRYP_ENABLE(hcryp);
1769
1770 /* Return function status */
1771 return HAL_OK;
1772 }
1773 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
1774 {
1775 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
1776 /* Write the Input block in the IN FIFO */
1777 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1778 inputaddr+=4;
1779 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1780 inputaddr+=4;
1781 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1782 inputaddr+=4;
1783 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1784 hcryp->pCrypInBuffPtr += 16;
1785 hcryp->CrypInCount -= 16;
1786 if(hcryp->CrypInCount == 0)
1787 {
1788 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
1789 /* Call the Input data transfer complete callback */
1790 HAL_CRYP_InCpltCallback(hcryp);
1791 }
1792 }
1793 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
1794 {
1795 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
1796 /* Read the Output block from the Output FIFO */
1797 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1798 outputaddr+=4;
1799 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1800 outputaddr+=4;
1801 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1802 outputaddr+=4;
1803 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1804 hcryp->pCrypOutBuffPtr += 16;
1805 hcryp->CrypOutCount -= 16;
1806 if(hcryp->CrypOutCount == 0)
1807 {
1808 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
1809 /* Process Unlocked */
1810 __HAL_UNLOCK(hcryp);
1811 /* Change the CRYP state */
1812 hcryp->State = HAL_CRYP_STATE_READY;
1813 /* Call Input transfer complete callback */
1814 HAL_CRYP_OutCpltCallback(hcryp);
1815 }
1816 }
1817
1818 /* Return function status */
1819 return HAL_OK;
1820}
1821
1822/**
1823 * @brief Initializes the CRYP peripheral in AES ECB encryption mode using DMA.
1824 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1825 * the configuration information for CRYP module
1826 * @param pPlainData: Pointer to the plaintext buffer
1827 * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
1828 * @param pCypherData: Pointer to the cyphertext buffer
1829 * @retval HAL status
1830 */
1831HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
1832{
1833 uint32_t inputaddr;
1834 uint32_t outputaddr;
1835
1836 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
1837 {
1838 /* Process Locked */
1839 __HAL_LOCK(hcryp);
1840
1841 inputaddr = (uint32_t)pPlainData;
1842 outputaddr = (uint32_t)pCypherData;
1843
1844 /* Change the CRYP state */
1845 hcryp->State = HAL_CRYP_STATE_BUSY;
1846
1847 /* Check if initialization phase has already been performed */
1848 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1849 {
1850 /* Set the key */
1851 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1852
1853 /* Set the CRYP peripheral in AES ECB mode */
1854 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB);
1855
1856 /* Flush FIFO */
1857 __HAL_CRYP_FIFO_FLUSH(hcryp);
1858
1859 /* Set the phase */
1860 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1861 }
1862 /* Set the input and output addresses and start DMA transfer */
1863 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
1864
1865 /* Process Unlocked */
1866 __HAL_UNLOCK(hcryp);
1867
1868 /* Return function status */
1869 return HAL_OK;
1870 }
1871 else
1872 {
1873 return HAL_ERROR;
1874 }
1875}
1876
1877/**
1878 * @brief Initializes the CRYP peripheral in AES CBC encryption mode using DMA.
1879 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1880 * the configuration information for CRYP module
1881 * @param pPlainData: Pointer to the plaintext buffer
1882 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
1883 * @param pCypherData: Pointer to the cyphertext buffer
1884 * @retval HAL status
1885 */
1886HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
1887{
1888 uint32_t inputaddr;
1889 uint32_t outputaddr;
1890
1891 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
1892 {
1893 /* Process Locked */
1894 __HAL_LOCK(hcryp);
1895
1896 inputaddr = (uint32_t)pPlainData;
1897 outputaddr = (uint32_t)pCypherData;
1898
1899 /* Change the CRYP state */
1900 hcryp->State = HAL_CRYP_STATE_BUSY;
1901
1902 /* Check if initialization phase has already been performed */
1903 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1904 {
1905 /* Set the key */
1906 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1907
1908 /* Set the CRYP peripheral in AES ECB mode */
1909 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC);
1910
1911 /* Set the Initialization Vector */
1912 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1913
1914 /* Flush FIFO */
1915 __HAL_CRYP_FIFO_FLUSH(hcryp);
1916
1917 /* Set the phase */
1918 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1919 }
1920 /* Set the input and output addresses and start DMA transfer */
1921 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
1922
1923 /* Process Unlocked */
1924 __HAL_UNLOCK(hcryp);
1925
1926 /* Return function status */
1927 return HAL_OK;
1928 }
1929 else
1930 {
1931 return HAL_ERROR;
1932 }
1933}
1934
1935/**
1936 * @brief Initializes the CRYP peripheral in AES CTR encryption mode using DMA.
1937 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1938 * the configuration information for CRYP module
1939 * @param pPlainData: Pointer to the plaintext buffer
1940 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
1941 * @param pCypherData: Pointer to the cyphertext buffer
1942 * @retval HAL status
1943 */
1944HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
1945{
1946 uint32_t inputaddr;
1947 uint32_t outputaddr;
1948
1949 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
1950 {
1951 /* Process Locked */
1952 __HAL_LOCK(hcryp);
1953
1954 inputaddr = (uint32_t)pPlainData;
1955 outputaddr = (uint32_t)pCypherData;
1956
1957 /* Change the CRYP state */
1958 hcryp->State = HAL_CRYP_STATE_BUSY;
1959
1960 /* Check if initialization phase has already been performed */
1961 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1962 {
1963 /* Set the key */
1964 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1965
1966 /* Set the CRYP peripheral in AES ECB mode */
1967 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR);
1968
1969 /* Set the Initialization Vector */
1970 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1971
1972 /* Flush FIFO */
1973 __HAL_CRYP_FIFO_FLUSH(hcryp);
1974
1975 /* Set the phase */
1976 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1977 }
1978
1979 /* Set the input and output addresses and start DMA transfer */
1980 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
1981
1982 /* Process Unlocked */
1983 __HAL_UNLOCK(hcryp);
1984
1985 /* Return function status */
1986 return HAL_OK;
1987 }
1988 else
1989 {
1990 return HAL_ERROR;
1991 }
1992}
1993
1994/**
1995 * @brief Initializes the CRYP peripheral in AES ECB decryption mode using DMA.
1996 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1997 * the configuration information for CRYP module
1998 * @param pCypherData: Pointer to the cyphertext buffer
1999 * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
2000 * @param pPlainData: Pointer to the plaintext buffer
2001 * @retval HAL status
2002 */
2003HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
2004{
2005 uint32_t tickstart = 0;
2006 uint32_t inputaddr;
2007 uint32_t outputaddr;
2008
2009 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
2010 {
2011 /* Process Locked */
2012 __HAL_LOCK(hcryp);
2013
2014 inputaddr = (uint32_t)pCypherData;
2015 outputaddr = (uint32_t)pPlainData;
2016
2017 /* Change the CRYP state */
2018 hcryp->State = HAL_CRYP_STATE_BUSY;
2019
2020 /* Check if initialization phase has already been performed */
2021 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
2022 {
2023 /* Set the key */
2024 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
2025
2026 /* Set the CRYP peripheral in AES Key mode */
2027 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_KEY | CRYP_CR_ALGODIR);
2028
2029 /* Enable CRYP */
2030 __HAL_CRYP_ENABLE(hcryp);
2031
2032 /* Get tick */
2033 tickstart = HAL_GetTick();
2034
2035 while(HAL_IS_BIT_SET(hcryp->Instance->SR, CRYP_FLAG_BUSY))
2036 {
2037 /* Check for the Timeout */
2038 if((HAL_GetTick() - tickstart ) > CRYP_TIMEOUT_VALUE)
2039 {
2040 /* Change state */
2041 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
2042
2043 /* Process Unlocked */
2044 __HAL_UNLOCK(hcryp);
2045
2046 return HAL_TIMEOUT;
2047 }
2048 }
2049
2050 /* Reset the ALGOMODE bits*/
2051 CRYP->CR &= (uint32_t)(~CRYP_CR_ALGOMODE);
2052
2053 /* Set the CRYP peripheral in AES ECB decryption mode */
2054 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB | CRYP_CR_ALGODIR);
2055
2056 /* Flush FIFO */
2057 __HAL_CRYP_FIFO_FLUSH(hcryp);
2058
2059 /* Set the phase */
2060 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
2061 }
2062
2063 /* Set the input and output addresses and start DMA transfer */
2064 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
2065
2066 /* Process Unlocked */
2067 __HAL_UNLOCK(hcryp);
2068
2069 /* Return function status */
2070 return HAL_OK;
2071 }
2072 else
2073 {
2074 return HAL_ERROR;
2075 }
2076}
2077
2078/**
2079 * @brief Initializes the CRYP peripheral in AES CBC encryption mode using DMA.
2080 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2081 * the configuration information for CRYP module
2082 * @param pCypherData: Pointer to the cyphertext buffer
2083 * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
2084 * @param pPlainData: Pointer to the plaintext buffer
2085 * @retval HAL status
2086 */
2087HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
2088{
2089 uint32_t tickstart = 0;
2090 uint32_t inputaddr;
2091 uint32_t outputaddr;
2092
2093 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
2094 {
2095 /* Process Locked */
2096 __HAL_LOCK(hcryp);
2097
2098 inputaddr = (uint32_t)pCypherData;
2099 outputaddr = (uint32_t)pPlainData;
2100
2101 /* Change the CRYP state */
2102 hcryp->State = HAL_CRYP_STATE_BUSY;
2103
2104 /* Check if initialization phase has already been performed */
2105 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
2106 {
2107 /* Set the key */
2108 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
2109
2110 /* Set the CRYP peripheral in AES Key mode */
2111 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_KEY | CRYP_CR_ALGODIR);
2112
2113 /* Enable CRYP */
2114 __HAL_CRYP_ENABLE(hcryp);
2115
2116 /* Get tick */
2117 tickstart = HAL_GetTick();
2118
2119 while(HAL_IS_BIT_SET(hcryp->Instance->SR, CRYP_FLAG_BUSY))
2120 {
2121 /* Check for the Timeout */
2122 if((HAL_GetTick() - tickstart ) > CRYP_TIMEOUT_VALUE)
2123 {
2124 /* Change state */
2125 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
2126
2127 /* Process Unlocked */
2128 __HAL_UNLOCK(hcryp);
2129
2130 return HAL_TIMEOUT;
2131 }
2132 }
2133
2134 /* Reset the ALGOMODE bits*/
2135 CRYP->CR &= (uint32_t)(~CRYP_CR_ALGOMODE);
2136
2137 /* Set the CRYP peripheral in AES CBC decryption mode */
2138 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC | CRYP_CR_ALGODIR);
2139
2140 /* Set the Initialization Vector */
2141 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
2142
2143 /* Flush FIFO */
2144 __HAL_CRYP_FIFO_FLUSH(hcryp);
2145
2146 /* Set the phase */
2147 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
2148 }
2149
2150 /* Set the input and output addresses and start DMA transfer */
2151 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
2152
2153 /* Process Unlocked */
2154 __HAL_UNLOCK(hcryp);
2155
2156 /* Return function status */
2157 return HAL_OK;
2158 }
2159 else
2160 {
2161 return HAL_ERROR;
2162 }
2163}
2164
2165/**
2166 * @brief Initializes the CRYP peripheral in AES CTR decryption mode using DMA.
2167 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2168 * the configuration information for CRYP module
2169 * @param pCypherData: Pointer to the cyphertext buffer
2170 * @param Size: Length of the plaintext buffer, must be a multiple of 16
2171 * @param pPlainData: Pointer to the plaintext buffer
2172 * @retval HAL status
2173 */
2174HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
2175{
2176 uint32_t inputaddr;
2177 uint32_t outputaddr;
2178
2179 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
2180 {
2181 /* Process Locked */
2182 __HAL_LOCK(hcryp);
2183
2184 inputaddr = (uint32_t)pCypherData;
2185 outputaddr = (uint32_t)pPlainData;
2186
2187 /* Change the CRYP state */
2188 hcryp->State = HAL_CRYP_STATE_BUSY;
2189
2190 /* Check if initialization phase has already been performed */
2191 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
2192 {
2193 /* Set the key */
2194 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
2195
2196 /* Set the CRYP peripheral in AES CTR mode */
2197 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR | CRYP_CR_ALGODIR);
2198
2199 /* Set the Initialization Vector */
2200 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
2201
2202 /* Flush FIFO */
2203 __HAL_CRYP_FIFO_FLUSH(hcryp);
2204
2205 /* Set the phase */
2206 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
2207 }
2208
2209 /* Set the input and output addresses and start DMA transfer */
2210 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
2211
2212 /* Process Unlocked */
2213 __HAL_UNLOCK(hcryp);
2214
2215 /* Return function status */
2216 return HAL_OK;
2217 }
2218 else
2219 {
2220 return HAL_ERROR;
2221 }
2222}
2223
2224
2225/**
2226 * @}
2227 */
2228
2229/** @defgroup CRYP_Exported_Functions_Group3 DES processing functions
2230 * @brief processing functions.
2231 *
2232@verbatim
2233 ==============================================================================
2234 ##### DES processing functions #####
2235 ==============================================================================
2236 [..] This section provides functions allowing to:
2237 (+) Encrypt plaintext using DES using ECB or CBC chaining modes
2238 (+) Decrypt cyphertext using ECB or CBC chaining modes
2239 [..] Three processing functions are available:
2240 (+) Polling mode
2241 (+) Interrupt mode
2242 (+) DMA mode
2243
2244@endverbatim
2245 * @{
2246 */
2247
2248/**
2249 * @brief Initializes the CRYP peripheral in DES ECB encryption mode.
2250 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2251 * the configuration information for CRYP module
2252 * @param pPlainData: Pointer to the plaintext buffer
2253 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2254 * @param pCypherData: Pointer to the cyphertext buffer
2255 * @param Timeout: Specify Timeout value
2256 * @retval HAL status
2257 */
2258HAL_StatusTypeDef HAL_CRYP_DESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
2259{
2260 /* Process Locked */
2261 __HAL_LOCK(hcryp);
2262
2263 /* Change the CRYP state */
2264 hcryp->State = HAL_CRYP_STATE_BUSY;
2265
2266 /* Set CRYP peripheral in DES ECB encryption mode */
2267 CRYP_SetDESECBMode(hcryp, 0);
2268
2269 /* Enable CRYP */
2270 __HAL_CRYP_ENABLE(hcryp);
2271
2272 /* Write Plain Data and Get Cypher Data */
2273 if(CRYP_ProcessData2Words(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
2274 {
2275 return HAL_TIMEOUT;
2276 }
2277
2278 /* Change the CRYP state */
2279 hcryp->State = HAL_CRYP_STATE_READY;
2280
2281 /* Process Unlocked */
2282 __HAL_UNLOCK(hcryp);
2283
2284 /* Return function status */
2285 return HAL_OK;
2286}
2287
2288/**
2289 * @brief Initializes the CRYP peripheral in DES ECB decryption mode.
2290 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2291 * the configuration information for CRYP module
2292 * @param pPlainData: Pointer to the plaintext buffer
2293 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2294 * @param pCypherData: Pointer to the cyphertext buffer
2295 * @param Timeout: Specify Timeout value
2296 * @retval HAL status
2297 */
2298HAL_StatusTypeDef HAL_CRYP_DESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
2299{
2300 /* Process Locked */
2301 __HAL_LOCK(hcryp);
2302
2303 /* Change the CRYP state */
2304 hcryp->State = HAL_CRYP_STATE_BUSY;
2305
2306 /* Set CRYP peripheral in DES ECB decryption mode */
2307 CRYP_SetDESECBMode(hcryp, CRYP_CR_ALGODIR);
2308
2309 /* Enable CRYP */
2310 __HAL_CRYP_ENABLE(hcryp);
2311
2312 /* Write Plain Data and Get Cypher Data */
2313 if(CRYP_ProcessData2Words(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
2314 {
2315 return HAL_TIMEOUT;
2316 }
2317
2318 /* Change the CRYP state */
2319 hcryp->State = HAL_CRYP_STATE_READY;
2320
2321 /* Process Unlocked */
2322 __HAL_UNLOCK(hcryp);
2323
2324 /* Return function status */
2325 return HAL_OK;
2326}
2327
2328/**
2329 * @brief Initializes the CRYP peripheral in DES CBC encryption mode.
2330 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2331 * the configuration information for CRYP module
2332 * @param pPlainData: Pointer to the plaintext buffer
2333 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2334 * @param pCypherData: Pointer to the cyphertext buffer
2335 * @param Timeout: Specify Timeout value
2336 * @retval HAL status
2337 */
2338HAL_StatusTypeDef HAL_CRYP_DESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
2339{
2340 /* Process Locked */
2341 __HAL_LOCK(hcryp);
2342
2343 /* Change the CRYP state */
2344 hcryp->State = HAL_CRYP_STATE_BUSY;
2345
2346 /* Set CRYP peripheral in DES CBC encryption mode */
2347 CRYP_SetDESCBCMode(hcryp, 0);
2348
2349 /* Enable CRYP */
2350 __HAL_CRYP_ENABLE(hcryp);
2351
2352 /* Write Plain Data and Get Cypher Data */
2353 if(CRYP_ProcessData2Words(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
2354 {
2355 return HAL_TIMEOUT;
2356 }
2357
2358 /* Change the CRYP state */
2359 hcryp->State = HAL_CRYP_STATE_READY;
2360
2361 /* Process Unlocked */
2362 __HAL_UNLOCK(hcryp);
2363
2364 /* Return function status */
2365 return HAL_OK;
2366}
2367
2368/**
2369 * @brief Initializes the CRYP peripheral in DES ECB decryption mode.
2370 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2371 * the configuration information for CRYP module
2372 * @param pPlainData: Pointer to the plaintext buffer
2373 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2374 * @param pCypherData: Pointer to the cyphertext buffer
2375 * @param Timeout: Specify Timeout value
2376 * @retval HAL status
2377 */
2378HAL_StatusTypeDef HAL_CRYP_DESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
2379{
2380 /* Process Locked */
2381 __HAL_LOCK(hcryp);
2382
2383 /* Change the CRYP state */
2384 hcryp->State = HAL_CRYP_STATE_BUSY;
2385
2386 /* Set CRYP peripheral in DES CBC decryption mode */
2387 CRYP_SetDESCBCMode(hcryp, CRYP_CR_ALGODIR);
2388
2389 /* Enable CRYP */
2390 __HAL_CRYP_ENABLE(hcryp);
2391
2392 /* Write Plain Data and Get Cypher Data */
2393 if(CRYP_ProcessData2Words(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
2394 {
2395 return HAL_TIMEOUT;
2396 }
2397
2398 /* Change the CRYP state */
2399 hcryp->State = HAL_CRYP_STATE_READY;
2400
2401 /* Process Unlocked */
2402 __HAL_UNLOCK(hcryp);
2403
2404 /* Return function status */
2405 return HAL_OK;
2406}
2407
2408/**
2409 * @brief Initializes the CRYP peripheral in DES ECB encryption mode using IT.
2410 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2411 * the configuration information for CRYP module
2412 * @param pPlainData: Pointer to the plaintext buffer
2413 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2414 * @param pCypherData: Pointer to the cyphertext buffer
2415 * @retval HAL status
2416 */
2417HAL_StatusTypeDef HAL_CRYP_DESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
2418{
2419 uint32_t inputaddr;
2420 uint32_t outputaddr;
2421
2422 if(hcryp->State == HAL_CRYP_STATE_READY)
2423 {
2424 /* Process Locked */
2425 __HAL_LOCK(hcryp);
2426
2427 hcryp->CrypInCount = Size;
2428 hcryp->pCrypInBuffPtr = pPlainData;
2429 hcryp->pCrypOutBuffPtr = pCypherData;
2430 hcryp->CrypOutCount = Size;
2431
2432 /* Change the CRYP state */
2433 hcryp->State = HAL_CRYP_STATE_BUSY;
2434
2435 /* Set CRYP peripheral in DES ECB encryption mode */
2436 CRYP_SetDESECBMode(hcryp, 0);
2437
2438 /* Enable Interrupts */
2439 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
2440
2441 /* Enable CRYP */
2442 __HAL_CRYP_ENABLE(hcryp);
2443
2444 /* Return function status */
2445 return HAL_OK;
2446 }
2447 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
2448 {
2449 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
2450 /* Write the Input block in the IN FIFO */
2451 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
2452 inputaddr+=4;
2453 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
2454
2455 hcryp->pCrypInBuffPtr += 8;
2456 hcryp->CrypInCount -= 8;
2457 if(hcryp->CrypInCount == 0)
2458 {
2459 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
2460 /* Call the Input data transfer complete callback */
2461 HAL_CRYP_InCpltCallback(hcryp);
2462 }
2463 }
2464 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
2465 {
2466 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
2467 /* Read the Output block from the Output FIFO */
2468 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
2469 outputaddr+=4;
2470 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
2471
2472 hcryp->pCrypOutBuffPtr += 8;
2473 hcryp->CrypOutCount -= 8;
2474 if(hcryp->CrypOutCount == 0)
2475 {
2476 /* Disable IT */
2477 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
2478 /* Disable CRYP */
2479 __HAL_CRYP_DISABLE(hcryp);
2480 /* Process Unlocked */
2481 __HAL_UNLOCK(hcryp);
2482 /* Change the CRYP state */
2483 hcryp->State = HAL_CRYP_STATE_READY;
2484 /* Call Input transfer complete callback */
2485 HAL_CRYP_OutCpltCallback(hcryp);
2486 }
2487 }
2488
2489 /* Return function status */
2490 return HAL_OK;
2491}
2492
2493/**
2494 * @brief Initializes the CRYP peripheral in DES CBC encryption mode using interrupt.
2495 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2496 * the configuration information for CRYP module
2497 * @param pPlainData: Pointer to the plaintext buffer
2498 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2499 * @param pCypherData: Pointer to the cyphertext buffer
2500 * @retval HAL status
2501 */
2502HAL_StatusTypeDef HAL_CRYP_DESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
2503{
2504 uint32_t inputaddr;
2505 uint32_t outputaddr;
2506
2507 if(hcryp->State == HAL_CRYP_STATE_READY)
2508 {
2509 /* Process Locked */
2510 __HAL_LOCK(hcryp);
2511
2512 hcryp->CrypInCount = Size;
2513 hcryp->pCrypInBuffPtr = pPlainData;
2514 hcryp->pCrypOutBuffPtr = pCypherData;
2515 hcryp->CrypOutCount = Size;
2516
2517 /* Change the CRYP state */
2518 hcryp->State = HAL_CRYP_STATE_BUSY;
2519
2520 /* Set CRYP peripheral in DES CBC encryption mode */
2521 CRYP_SetDESCBCMode(hcryp, 0);
2522
2523 /* Enable Interrupts */
2524 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
2525
2526 /* Enable CRYP */
2527 __HAL_CRYP_ENABLE(hcryp);
2528
2529 /* Return function status */
2530 return HAL_OK;
2531 }
2532
2533 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
2534 {
2535 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
2536 /* Write the Input block in the IN FIFO */
2537 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
2538 inputaddr+=4;
2539 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
2540
2541 hcryp->pCrypInBuffPtr += 8;
2542 hcryp->CrypInCount -= 8;
2543 if(hcryp->CrypInCount == 0)
2544 {
2545 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
2546 /* Call the Input data transfer complete callback */
2547 HAL_CRYP_InCpltCallback(hcryp);
2548 }
2549 }
2550 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
2551 {
2552 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
2553 /* Read the Output block from the Output FIFO */
2554 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
2555 outputaddr+=4;
2556 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
2557
2558 hcryp->pCrypOutBuffPtr += 8;
2559 hcryp->CrypOutCount -= 8;
2560 if(hcryp->CrypOutCount == 0)
2561 {
2562 /* Disable IT */
2563 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
2564 /* Disable CRYP */
2565 __HAL_CRYP_DISABLE(hcryp);
2566 /* Process Unlocked */
2567 __HAL_UNLOCK(hcryp);
2568 /* Change the CRYP state */
2569 hcryp->State = HAL_CRYP_STATE_READY;
2570 /* Call Input transfer complete callback */
2571 HAL_CRYP_OutCpltCallback(hcryp);
2572 }
2573 }
2574
2575 /* Return function status */
2576 return HAL_OK;
2577}
2578
2579/**
2580 * @brief Initializes the CRYP peripheral in DES ECB decryption mode using IT.
2581 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2582 * the configuration information for CRYP module
2583 * @param pPlainData: Pointer to the plaintext buffer
2584 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2585 * @param pCypherData: Pointer to the cyphertext buffer
2586 * @retval HAL status
2587 */
2588HAL_StatusTypeDef HAL_CRYP_DESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
2589{
2590 uint32_t inputaddr;
2591 uint32_t outputaddr;
2592
2593 if(hcryp->State == HAL_CRYP_STATE_READY)
2594 {
2595 /* Process Locked */
2596 __HAL_LOCK(hcryp);
2597
2598 hcryp->CrypInCount = Size;
2599 hcryp->pCrypInBuffPtr = pCypherData;
2600 hcryp->pCrypOutBuffPtr = pPlainData;
2601 hcryp->CrypOutCount = Size;
2602
2603 /* Change the CRYP state */
2604 hcryp->State = HAL_CRYP_STATE_BUSY;
2605
2606 /* Set CRYP peripheral in DES ECB decryption mode */
2607 CRYP_SetDESECBMode(hcryp, CRYP_CR_ALGODIR);
2608
2609 /* Enable Interrupts */
2610 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
2611
2612 /* Enable CRYP */
2613 __HAL_CRYP_ENABLE(hcryp);
2614
2615 /* Return function status */
2616 return HAL_OK;
2617 }
2618 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
2619 {
2620 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
2621 /* Write the Input block in the IN FIFO */
2622 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
2623 inputaddr+=4;
2624 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
2625
2626 hcryp->pCrypInBuffPtr += 8;
2627 hcryp->CrypInCount -= 8;
2628 if(hcryp->CrypInCount == 0)
2629 {
2630 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
2631 /* Call the Input data transfer complete callback */
2632 HAL_CRYP_InCpltCallback(hcryp);
2633 }
2634 }
2635 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
2636 {
2637 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
2638 /* Read the Output block from the Output FIFO */
2639 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
2640 outputaddr+=4;
2641 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
2642
2643 hcryp->pCrypOutBuffPtr += 8;
2644 hcryp->CrypOutCount -= 8;
2645 if(hcryp->CrypOutCount == 0)
2646 {
2647 /* Disable IT */
2648 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
2649 /* Disable CRYP */
2650 __HAL_CRYP_DISABLE(hcryp);
2651 /* Process Unlocked */
2652 __HAL_UNLOCK(hcryp);
2653 /* Change the CRYP state */
2654 hcryp->State = HAL_CRYP_STATE_READY;
2655 /* Call Input transfer complete callback */
2656 HAL_CRYP_OutCpltCallback(hcryp);
2657 }
2658 }
2659
2660 /* Return function status */
2661 return HAL_OK;
2662}
2663
2664/**
2665 * @brief Initializes the CRYP peripheral in DES ECB decryption mode using interrupt.
2666 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2667 * the configuration information for CRYP module
2668 * @param pPlainData: Pointer to the plaintext buffer
2669 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2670 * @param pCypherData: Pointer to the cyphertext buffer
2671 * @retval HAL status
2672 */
2673HAL_StatusTypeDef HAL_CRYP_DESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
2674{
2675 uint32_t inputaddr;
2676 uint32_t outputaddr;
2677
2678 if(hcryp->State == HAL_CRYP_STATE_READY)
2679 {
2680 /* Process Locked */
2681 __HAL_LOCK(hcryp);
2682
2683 hcryp->CrypInCount = Size;
2684 hcryp->pCrypInBuffPtr = pCypherData;
2685 hcryp->pCrypOutBuffPtr = pPlainData;
2686 hcryp->CrypOutCount = Size;
2687
2688 /* Change the CRYP state */
2689 hcryp->State = HAL_CRYP_STATE_BUSY;
2690
2691 /* Set CRYP peripheral in DES CBC decryption mode */
2692 CRYP_SetDESCBCMode(hcryp, CRYP_CR_ALGODIR);
2693
2694 /* Enable Interrupts */
2695 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
2696
2697 /* Enable CRYP */
2698 __HAL_CRYP_ENABLE(hcryp);
2699
2700 /* Return function status */
2701 return HAL_OK;
2702 }
2703 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
2704 {
2705 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
2706 /* Write the Input block in the IN FIFO */
2707 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
2708 inputaddr+=4;
2709 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
2710
2711 hcryp->pCrypInBuffPtr += 8;
2712 hcryp->CrypInCount -= 8;
2713 if(hcryp->CrypInCount == 0)
2714 {
2715 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
2716 /* Call the Input data transfer complete callback */
2717 HAL_CRYP_InCpltCallback(hcryp);
2718 }
2719 }
2720 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
2721 {
2722 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
2723 /* Read the Output block from the Output FIFO */
2724 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
2725 outputaddr+=4;
2726 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
2727
2728 hcryp->pCrypOutBuffPtr += 8;
2729 hcryp->CrypOutCount -= 8;
2730 if(hcryp->CrypOutCount == 0)
2731 {
2732 /* Disable IT */
2733 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
2734 /* Disable CRYP */
2735 __HAL_CRYP_DISABLE(hcryp);
2736 /* Process Unlocked */
2737 __HAL_UNLOCK(hcryp);
2738 /* Change the CRYP state */
2739 hcryp->State = HAL_CRYP_STATE_READY;
2740 /* Call Input transfer complete callback */
2741 HAL_CRYP_OutCpltCallback(hcryp);
2742 }
2743 }
2744
2745 /* Return function status */
2746 return HAL_OK;
2747}
2748
2749/**
2750 * @brief Initializes the CRYP peripheral in DES ECB encryption mode using DMA.
2751 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2752 * the configuration information for CRYP module
2753 * @param pPlainData: Pointer to the plaintext buffer
2754 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2755 * @param pCypherData: Pointer to the cyphertext buffer
2756 * @retval HAL status
2757 */
2758HAL_StatusTypeDef HAL_CRYP_DESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
2759{
2760 uint32_t inputaddr;
2761 uint32_t outputaddr;
2762
2763 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
2764 {
2765 /* Process Locked */
2766 __HAL_LOCK(hcryp);
2767
2768 inputaddr = (uint32_t)pPlainData;
2769 outputaddr = (uint32_t)pCypherData;
2770
2771 /* Change the CRYP state */
2772 hcryp->State = HAL_CRYP_STATE_BUSY;
2773
2774 /* Set CRYP peripheral in DES ECB encryption mode */
2775 CRYP_SetDESECBMode(hcryp, 0);
2776
2777 /* Set the input and output addresses and start DMA transfer */
2778 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
2779
2780 /* Process Unlocked */
2781 __HAL_UNLOCK(hcryp);
2782
2783 /* Return function status */
2784 return HAL_OK;
2785 }
2786 else
2787 {
2788 return HAL_ERROR;
2789 }
2790}
2791
2792/**
2793 * @brief Initializes the CRYP peripheral in DES CBC encryption mode using DMA.
2794 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2795 * the configuration information for CRYP module
2796 * @param pPlainData: Pointer to the plaintext buffer
2797 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2798 * @param pCypherData: Pointer to the cyphertext buffer
2799 * @retval HAL status
2800 */
2801HAL_StatusTypeDef HAL_CRYP_DESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
2802{
2803 uint32_t inputaddr;
2804 uint32_t outputaddr;
2805
2806 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
2807 {
2808 /* Process Locked */
2809 __HAL_LOCK(hcryp);
2810
2811 inputaddr = (uint32_t)pPlainData;
2812 outputaddr = (uint32_t)pCypherData;
2813
2814 /* Change the CRYP state */
2815 hcryp->State = HAL_CRYP_STATE_BUSY;
2816
2817 /* Set CRYP peripheral in DES CBC encryption mode */
2818 CRYP_SetDESCBCMode(hcryp, 0);
2819
2820 /* Set the input and output addresses and start DMA transfer */
2821 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
2822
2823 /* Process Unlocked */
2824 __HAL_UNLOCK(hcryp);
2825
2826 /* Return function status */
2827 return HAL_OK;
2828 }
2829 else
2830 {
2831 return HAL_ERROR;
2832 }
2833}
2834
2835/**
2836 * @brief Initializes the CRYP peripheral in DES ECB decryption mode using DMA.
2837 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2838 * the configuration information for CRYP module
2839 * @param pPlainData: Pointer to the plaintext buffer
2840 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2841 * @param pCypherData: Pointer to the cyphertext buffer
2842 * @retval HAL status
2843 */
2844HAL_StatusTypeDef HAL_CRYP_DESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
2845{
2846 uint32_t inputaddr;
2847 uint32_t outputaddr;
2848
2849 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
2850 {
2851 /* Process Locked */
2852 __HAL_LOCK(hcryp);
2853
2854 inputaddr = (uint32_t)pCypherData;
2855 outputaddr = (uint32_t)pPlainData;
2856
2857 /* Change the CRYP state */
2858 hcryp->State = HAL_CRYP_STATE_BUSY;
2859
2860 /* Set CRYP peripheral in DES ECB decryption mode */
2861 CRYP_SetDESECBMode(hcryp, CRYP_CR_ALGODIR);
2862
2863 /* Set the input and output addresses and start DMA transfer */
2864 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
2865
2866 /* Process Unlocked */
2867 __HAL_UNLOCK(hcryp);
2868
2869 /* Return function status */
2870 return HAL_OK;
2871 }
2872 else
2873 {
2874 return HAL_ERROR;
2875 }
2876}
2877
2878/**
2879 * @brief Initializes the CRYP peripheral in DES ECB decryption mode using DMA.
2880 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2881 * the configuration information for CRYP module
2882 * @param pPlainData: Pointer to the plaintext buffer
2883 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2884 * @param pCypherData: Pointer to the cyphertext buffer
2885 * @retval HAL status
2886 */
2887HAL_StatusTypeDef HAL_CRYP_DESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
2888{
2889 uint32_t inputaddr;
2890 uint32_t outputaddr;
2891
2892 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
2893 {
2894 /* Process Locked */
2895 __HAL_LOCK(hcryp);
2896
2897 inputaddr = (uint32_t)pCypherData;
2898 outputaddr = (uint32_t)pPlainData;
2899
2900 /* Change the CRYP state */
2901 hcryp->State = HAL_CRYP_STATE_BUSY;
2902
2903 /* Set CRYP peripheral in DES CBC decryption mode */
2904 CRYP_SetDESCBCMode(hcryp, CRYP_CR_ALGODIR);
2905
2906 /* Set the input and output addresses and start DMA transfer */
2907 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
2908
2909 /* Process Unlocked */
2910 __HAL_UNLOCK(hcryp);
2911
2912 /* Return function status */
2913 return HAL_OK;
2914 }
2915 else
2916 {
2917 return HAL_ERROR;
2918 }
2919}
2920
2921/**
2922 * @}
2923 */
2924
2925/** @defgroup CRYP_Exported_Functions_Group4 TDES processing functions
2926 * @brief processing functions.
2927 *
2928@verbatim
2929 ==============================================================================
2930 ##### TDES processing functions #####
2931 ==============================================================================
2932 [..] This section provides functions allowing to:
2933 (+) Encrypt plaintext using TDES based on ECB or CBC chaining modes
2934 (+) Decrypt cyphertext using TDES based on ECB or CBC chaining modes
2935 [..] Three processing functions are available:
2936 (+) Polling mode
2937 (+) Interrupt mode
2938 (+) DMA mode
2939
2940@endverbatim
2941 * @{
2942 */
2943
2944/**
2945 * @brief Initializes the CRYP peripheral in TDES ECB encryption mode
2946 * then encrypt pPlainData. The cypher data are available in pCypherData
2947 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2948 * the configuration information for CRYP module
2949 * @param pPlainData: Pointer to the plaintext buffer
2950 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2951 * @param pCypherData: Pointer to the cyphertext buffer
2952 * @param Timeout: Specify Timeout value
2953 * @retval HAL status
2954 */
2955HAL_StatusTypeDef HAL_CRYP_TDESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
2956{
2957 /* Process Locked */
2958 __HAL_LOCK(hcryp);
2959
2960 /* Change the CRYP state */
2961 hcryp->State = HAL_CRYP_STATE_BUSY;
2962
2963 /* Set CRYP peripheral in TDES ECB encryption mode */
2964 CRYP_SetTDESECBMode(hcryp, 0);
2965
2966 /* Enable CRYP */
2967 __HAL_CRYP_ENABLE(hcryp);
2968
2969 /* Write Plain Data and Get Cypher Data */
2970 if(CRYP_ProcessData2Words(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
2971 {
2972 return HAL_TIMEOUT;
2973 }
2974
2975 /* Change the CRYP state */
2976 hcryp->State = HAL_CRYP_STATE_READY;
2977
2978 /* Process Unlocked */
2979 __HAL_UNLOCK(hcryp);
2980
2981 /* Return function status */
2982 return HAL_OK;
2983}
2984
2985/**
2986 * @brief Initializes the CRYP peripheral in TDES ECB decryption mode
2987 * then decrypted pCypherData. The cypher data are available in pPlainData
2988 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2989 * the configuration information for CRYP module
2990 * @param pPlainData: Pointer to the plaintext buffer
2991 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2992 * @param pCypherData: Pointer to the cyphertext buffer
2993 * @param Timeout: Specify Timeout value
2994 * @retval HAL status
2995 */
2996HAL_StatusTypeDef HAL_CRYP_TDESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
2997{
2998 /* Process Locked */
2999 __HAL_LOCK(hcryp);
3000
3001 /* Change the CRYP state */
3002 hcryp->State = HAL_CRYP_STATE_BUSY;
3003
3004 /* Set CRYP peripheral in TDES ECB decryption mode */
3005 CRYP_SetTDESECBMode(hcryp, CRYP_CR_ALGODIR);
3006
3007 /* Enable CRYP */
3008 __HAL_CRYP_ENABLE(hcryp);
3009
3010 /* Write Cypher Data and Get Plain Data */
3011 if(CRYP_ProcessData2Words(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
3012 {
3013 return HAL_TIMEOUT;
3014 }
3015
3016 /* Change the CRYP state */
3017 hcryp->State = HAL_CRYP_STATE_READY;
3018
3019 /* Process Unlocked */
3020 __HAL_UNLOCK(hcryp);
3021
3022 /* Return function status */
3023 return HAL_OK;
3024}
3025
3026/**
3027 * @brief Initializes the CRYP peripheral in TDES CBC encryption mode
3028 * then encrypt pPlainData. The cypher data are available in pCypherData
3029 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3030 * the configuration information for CRYP module
3031 * @param pPlainData: Pointer to the plaintext buffer
3032 * @param Size: Length of the plaintext buffer, must be a multiple of 8
3033 * @param pCypherData: Pointer to the cyphertext buffer
3034 * @param Timeout: Specify Timeout value
3035 * @retval HAL status
3036 */
3037HAL_StatusTypeDef HAL_CRYP_TDESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
3038{
3039 /* Process Locked */
3040 __HAL_LOCK(hcryp);
3041
3042 /* Change the CRYP state */
3043 hcryp->State = HAL_CRYP_STATE_BUSY;
3044
3045 /* Set CRYP peripheral in TDES CBC encryption mode */
3046 CRYP_SetTDESCBCMode(hcryp, 0);
3047
3048 /* Enable CRYP */
3049 __HAL_CRYP_ENABLE(hcryp);
3050
3051 /* Write Plain Data and Get Cypher Data */
3052 if(CRYP_ProcessData2Words(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
3053 {
3054 return HAL_TIMEOUT;
3055 }
3056
3057 /* Change the CRYP state */
3058 hcryp->State = HAL_CRYP_STATE_READY;
3059
3060 /* Process Unlocked */
3061 __HAL_UNLOCK(hcryp);
3062
3063 /* Return function status */
3064 return HAL_OK;
3065}
3066
3067/**
3068 * @brief Initializes the CRYP peripheral in TDES CBC decryption mode
3069 * then decrypted pCypherData. The cypher data are available in pPlainData
3070 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3071 * the configuration information for CRYP module
3072 * @param pCypherData: Pointer to the cyphertext buffer
3073 * @param Size: Length of the plaintext buffer, must be a multiple of 8
3074 * @param pPlainData: Pointer to the plaintext buffer
3075 * @param Timeout: Specify Timeout value
3076 * @retval HAL status
3077 */
3078HAL_StatusTypeDef HAL_CRYP_TDESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
3079{
3080 /* Process Locked */
3081 __HAL_LOCK(hcryp);
3082
3083 /* Change the CRYP state */
3084 hcryp->State = HAL_CRYP_STATE_BUSY;
3085
3086 /* Set CRYP peripheral in TDES CBC decryption mode */
3087 CRYP_SetTDESCBCMode(hcryp, CRYP_CR_ALGODIR);
3088
3089 /* Enable CRYP */
3090 __HAL_CRYP_ENABLE(hcryp);
3091
3092 /* Write Cypher Data and Get Plain Data */
3093 if(CRYP_ProcessData2Words(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
3094 {
3095 return HAL_TIMEOUT;
3096 }
3097
3098 /* Change the CRYP state */
3099 hcryp->State = HAL_CRYP_STATE_READY;
3100
3101 /* Process Unlocked */
3102 __HAL_UNLOCK(hcryp);
3103
3104 /* Return function status */
3105 return HAL_OK;
3106}
3107
3108/**
3109 * @brief Initializes the CRYP peripheral in TDES ECB encryption mode using interrupt.
3110 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3111 * the configuration information for CRYP module
3112 * @param pPlainData: Pointer to the plaintext buffer
3113 * @param Size: Length of the plaintext buffer, must be a multiple of 8
3114 * @param pCypherData: Pointer to the cyphertext buffer
3115 * @retval HAL status
3116 */
3117HAL_StatusTypeDef HAL_CRYP_TDESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
3118{
3119 uint32_t inputaddr;
3120 uint32_t outputaddr;
3121
3122 if(hcryp->State == HAL_CRYP_STATE_READY)
3123 {
3124 /* Process Locked */
3125 __HAL_LOCK(hcryp);
3126
3127 hcryp->CrypInCount = Size;
3128 hcryp->pCrypInBuffPtr = pPlainData;
3129 hcryp->pCrypOutBuffPtr = pCypherData;
3130 hcryp->CrypOutCount = Size;
3131
3132 /* Change the CRYP state */
3133 hcryp->State = HAL_CRYP_STATE_BUSY;
3134
3135 /* Set CRYP peripheral in TDES ECB encryption mode */
3136 CRYP_SetTDESECBMode(hcryp, 0);
3137
3138 /* Enable Interrupts */
3139 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
3140
3141 /* Enable CRYP */
3142 __HAL_CRYP_ENABLE(hcryp);
3143
3144 /* Return function status */
3145 return HAL_OK;
3146 }
3147 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
3148 {
3149 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
3150 /* Write the Input block in the IN FIFO */
3151 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
3152 inputaddr+=4;
3153 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
3154
3155 hcryp->pCrypInBuffPtr += 8;
3156 hcryp->CrypInCount -= 8;
3157 if(hcryp->CrypInCount == 0)
3158 {
3159 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
3160 /* Call the Input data transfer complete callback */
3161 HAL_CRYP_InCpltCallback(hcryp);
3162 }
3163 }
3164 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
3165 {
3166 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
3167 /* Read the Output block from the Output FIFO */
3168 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
3169 outputaddr+=4;
3170 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
3171
3172 hcryp->pCrypOutBuffPtr += 8;
3173 hcryp->CrypOutCount -= 8;
3174 if(hcryp->CrypOutCount == 0)
3175 {
3176 /* Disable IT */
3177 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
3178 /* Disable CRYP */
3179 __HAL_CRYP_DISABLE(hcryp);
3180 /* Process Unlocked */
3181 __HAL_UNLOCK(hcryp);
3182 /* Change the CRYP state */
3183 hcryp->State = HAL_CRYP_STATE_READY;
3184 /* Call the Output data transfer complete callback */
3185 HAL_CRYP_OutCpltCallback(hcryp);
3186 }
3187 }
3188
3189 /* Return function status */
3190 return HAL_OK;
3191}
3192
3193/**
3194 * @brief Initializes the CRYP peripheral in TDES CBC encryption mode.
3195 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3196 * the configuration information for CRYP module
3197 * @param pPlainData: Pointer to the plaintext buffer
3198 * @param Size: Length of the plaintext buffer, must be a multiple of 8
3199 * @param pCypherData: Pointer to the cyphertext buffer
3200 * @retval HAL status
3201 */
3202HAL_StatusTypeDef HAL_CRYP_TDESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
3203{
3204 uint32_t inputaddr;
3205 uint32_t outputaddr;
3206
3207 if(hcryp->State == HAL_CRYP_STATE_READY)
3208 {
3209 /* Process Locked */
3210 __HAL_LOCK(hcryp);
3211
3212 hcryp->CrypInCount = Size;
3213 hcryp->pCrypInBuffPtr = pPlainData;
3214 hcryp->pCrypOutBuffPtr = pCypherData;
3215 hcryp->CrypOutCount = Size;
3216
3217 /* Change the CRYP state */
3218 hcryp->State = HAL_CRYP_STATE_BUSY;
3219
3220 /* Set CRYP peripheral in TDES CBC encryption mode */
3221 CRYP_SetTDESCBCMode(hcryp, 0);
3222
3223 /* Enable Interrupts */
3224 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
3225
3226 /* Enable CRYP */
3227 __HAL_CRYP_ENABLE(hcryp);
3228
3229 /* Return function status */
3230 return HAL_OK;
3231 }
3232 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
3233 {
3234 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
3235 /* Write the Input block in the IN FIFO */
3236 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
3237 inputaddr+=4;
3238 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
3239
3240 hcryp->pCrypInBuffPtr += 8;
3241 hcryp->CrypInCount -= 8;
3242 if(hcryp->CrypInCount == 0)
3243 {
3244 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
3245 /* Call the Input data transfer complete callback */
3246 HAL_CRYP_InCpltCallback(hcryp);
3247 }
3248 }
3249 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
3250 {
3251 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
3252 /* Read the Output block from the Output FIFO */
3253 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
3254 outputaddr+=4;
3255 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
3256
3257 hcryp->pCrypOutBuffPtr += 8;
3258 hcryp->CrypOutCount -= 8;
3259 if(hcryp->CrypOutCount == 0)
3260 {
3261 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
3262 /* Disable CRYP */
3263 __HAL_CRYP_DISABLE(hcryp);
3264 /* Process Unlocked */
3265 __HAL_UNLOCK(hcryp);
3266 /* Change the CRYP state */
3267 hcryp->State = HAL_CRYP_STATE_READY;
3268 /* Call Input transfer complete callback */
3269 HAL_CRYP_OutCpltCallback(hcryp);
3270 }
3271 }
3272
3273 /* Return function status */
3274 return HAL_OK;
3275}
3276
3277/**
3278 * @brief Initializes the CRYP peripheral in TDES ECB decryption mode.
3279 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3280 * the configuration information for CRYP module
3281 * @param pPlainData: Pointer to the plaintext buffer
3282 * @param Size: Length of the plaintext buffer, must be a multiple of 8
3283 * @param pCypherData: Pointer to the cyphertext buffer
3284 * @retval HAL status
3285 */
3286HAL_StatusTypeDef HAL_CRYP_TDESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
3287{
3288 uint32_t inputaddr;
3289 uint32_t outputaddr;
3290
3291 if(hcryp->State == HAL_CRYP_STATE_READY)
3292 {
3293 /* Process Locked */
3294 __HAL_LOCK(hcryp);
3295
3296 hcryp->CrypInCount = Size;
3297 hcryp->pCrypInBuffPtr = pCypherData;
3298 hcryp->pCrypOutBuffPtr = pPlainData;
3299 hcryp->CrypOutCount = Size;
3300
3301 /* Change the CRYP state */
3302 hcryp->State = HAL_CRYP_STATE_BUSY;
3303
3304 /* Set CRYP peripheral in TDES ECB decryption mode */
3305 CRYP_SetTDESECBMode(hcryp, CRYP_CR_ALGODIR);
3306
3307 /* Enable Interrupts */
3308 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
3309
3310 /* Enable CRYP */
3311 __HAL_CRYP_ENABLE(hcryp);
3312
3313 /* Return function status */
3314 return HAL_OK;
3315 }
3316 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
3317 {
3318 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
3319 /* Write the Input block in the IN FIFO */
3320 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
3321 inputaddr+=4;
3322 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
3323
3324 hcryp->pCrypInBuffPtr += 8;
3325 hcryp->CrypInCount -= 8;
3326 if(hcryp->CrypInCount == 0)
3327 {
3328 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
3329 /* Call the Input data transfer complete callback */
3330 HAL_CRYP_InCpltCallback(hcryp);
3331 }
3332 }
3333 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
3334 {
3335 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
3336 /* Read the Output block from the Output FIFO */
3337 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
3338 outputaddr+=4;
3339 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
3340
3341 hcryp->pCrypOutBuffPtr += 8;
3342 hcryp->CrypOutCount -= 8;
3343 if(hcryp->CrypOutCount == 0)
3344 {
3345 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
3346 /* Disable CRYP */
3347 __HAL_CRYP_DISABLE(hcryp);
3348 /* Process Unlocked */
3349 __HAL_UNLOCK(hcryp);
3350 /* Change the CRYP state */
3351 hcryp->State = HAL_CRYP_STATE_READY;
3352 /* Call Input transfer complete callback */
3353 HAL_CRYP_OutCpltCallback(hcryp);
3354 }
3355 }
3356
3357 /* Return function status */
3358 return HAL_OK;
3359}
3360
3361/**
3362 * @brief Initializes the CRYP peripheral in TDES CBC decryption mode.
3363 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3364 * the configuration information for CRYP module
3365 * @param pCypherData: Pointer to the cyphertext buffer
3366 * @param Size: Length of the plaintext buffer, must be a multiple of 8
3367 * @param pPlainData: Pointer to the plaintext buffer
3368 * @retval HAL status
3369 */
3370HAL_StatusTypeDef HAL_CRYP_TDESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
3371{
3372 uint32_t inputaddr;
3373 uint32_t outputaddr;
3374
3375 if(hcryp->State == HAL_CRYP_STATE_READY)
3376 {
3377 /* Process Locked */
3378 __HAL_LOCK(hcryp);
3379
3380 hcryp->CrypInCount = Size;
3381 hcryp->pCrypInBuffPtr = pCypherData;
3382 hcryp->pCrypOutBuffPtr = pPlainData;
3383 hcryp->CrypOutCount = Size;
3384
3385 /* Change the CRYP state */
3386 hcryp->State = HAL_CRYP_STATE_BUSY;
3387
3388 /* Set CRYP peripheral in TDES CBC decryption mode */
3389 CRYP_SetTDESCBCMode(hcryp, CRYP_CR_ALGODIR);
3390
3391 /* Enable Interrupts */
3392 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
3393
3394 /* Enable CRYP */
3395 __HAL_CRYP_ENABLE(hcryp);
3396
3397 /* Return function status */
3398 return HAL_OK;
3399 }
3400 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
3401 {
3402 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
3403 /* Write the Input block in the IN FIFO */
3404 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
3405 inputaddr+=4;
3406 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
3407
3408 hcryp->pCrypInBuffPtr += 8;
3409 hcryp->CrypInCount -= 8;
3410 if(hcryp->CrypInCount == 0)
3411 {
3412 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
3413 /* Call the Input data transfer complete callback */
3414 HAL_CRYP_InCpltCallback(hcryp);
3415 }
3416 }
3417 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
3418 {
3419 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
3420 /* Read the Output block from the Output FIFO */
3421 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
3422 outputaddr+=4;
3423 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
3424
3425 hcryp->pCrypOutBuffPtr += 8;
3426 hcryp->CrypOutCount -= 8;
3427 if(hcryp->CrypOutCount == 0)
3428 {
3429 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
3430 /* Disable CRYP */
3431 __HAL_CRYP_DISABLE(hcryp);
3432 /* Process Unlocked */
3433 __HAL_UNLOCK(hcryp);
3434 /* Change the CRYP state */
3435 hcryp->State = HAL_CRYP_STATE_READY;
3436 /* Call Input transfer complete callback */
3437 HAL_CRYP_OutCpltCallback(hcryp);
3438 }
3439 }
3440
3441 /* Return function status */
3442 return HAL_OK;
3443}
3444
3445/**
3446 * @brief Initializes the CRYP peripheral in TDES ECB encryption mode using DMA.
3447 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3448 * the configuration information for CRYP module
3449 * @param pPlainData: Pointer to the plaintext buffer
3450 * @param Size: Length of the plaintext buffer, must be a multiple of 8
3451 * @param pCypherData: Pointer to the cyphertext buffer
3452 * @retval HAL status
3453 */
3454HAL_StatusTypeDef HAL_CRYP_TDESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
3455{
3456 uint32_t inputaddr;
3457 uint32_t outputaddr;
3458
3459 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
3460 {
3461 /* Process Locked */
3462 __HAL_LOCK(hcryp);
3463
3464 inputaddr = (uint32_t)pPlainData;
3465 outputaddr = (uint32_t)pCypherData;
3466
3467 /* Change the CRYP state */
3468 hcryp->State = HAL_CRYP_STATE_BUSY;
3469
3470 /* Set CRYP peripheral in TDES ECB encryption mode */
3471 CRYP_SetTDESECBMode(hcryp, 0);
3472
3473 /* Set the input and output addresses and start DMA transfer */
3474 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
3475
3476 /* Process Unlocked */
3477 __HAL_UNLOCK(hcryp);
3478
3479 /* Return function status */
3480 return HAL_OK;
3481 }
3482 else
3483 {
3484 return HAL_ERROR;
3485 }
3486}
3487
3488/**
3489 * @brief Initializes the CRYP peripheral in TDES CBC encryption mode using DMA.
3490 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3491 * the configuration information for CRYP module
3492 * @param pPlainData: Pointer to the plaintext buffer
3493 * @param Size: Length of the plaintext buffer, must be a multiple of 8
3494 * @param pCypherData: Pointer to the cyphertext buffer
3495 * @retval HAL status
3496 */
3497HAL_StatusTypeDef HAL_CRYP_TDESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
3498{
3499 uint32_t inputaddr;
3500 uint32_t outputaddr;
3501
3502 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
3503 {
3504 /* Process Locked */
3505 __HAL_LOCK(hcryp);
3506
3507 inputaddr = (uint32_t)pPlainData;
3508 outputaddr = (uint32_t)pCypherData;
3509
3510 /* Change the CRYP state */
3511 hcryp->State = HAL_CRYP_STATE_BUSY;
3512
3513 /* Set CRYP peripheral in TDES CBC encryption mode */
3514 CRYP_SetTDESCBCMode(hcryp, 0);
3515
3516 /* Set the input and output addresses and start DMA transfer */
3517 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
3518
3519 /* Process Unlocked */
3520 __HAL_UNLOCK(hcryp);
3521
3522 /* Return function status */
3523 return HAL_OK;
3524 }
3525 else
3526 {
3527 return HAL_ERROR;
3528 }
3529}
3530
3531/**
3532 * @brief Initializes the CRYP peripheral in TDES ECB decryption mode using DMA.
3533 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3534 * the configuration information for CRYP module
3535 * @param pPlainData: Pointer to the plaintext buffer
3536 * @param Size: Length of the plaintext buffer, must be a multiple of 8
3537 * @param pCypherData: Pointer to the cyphertext buffer
3538 * @retval HAL status
3539 */
3540HAL_StatusTypeDef HAL_CRYP_TDESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
3541{
3542 uint32_t inputaddr;
3543 uint32_t outputaddr;
3544
3545 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
3546 {
3547 /* Process Locked */
3548 __HAL_LOCK(hcryp);
3549
3550 inputaddr = (uint32_t)pCypherData;
3551 outputaddr = (uint32_t)pPlainData;
3552
3553 /* Change the CRYP state */
3554 hcryp->State = HAL_CRYP_STATE_BUSY;
3555
3556 /* Set CRYP peripheral in TDES ECB decryption mode */
3557 CRYP_SetTDESECBMode(hcryp, CRYP_CR_ALGODIR);
3558
3559 /* Set the input and output addresses and start DMA transfer */
3560 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
3561
3562 /* Process Unlocked */
3563 __HAL_UNLOCK(hcryp);
3564
3565 /* Return function status */
3566 return HAL_OK;
3567 }
3568 else
3569 {
3570 return HAL_ERROR;
3571 }
3572}
3573
3574/**
3575 * @brief Initializes the CRYP peripheral in TDES CBC decryption mode using DMA.
3576 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3577 * the configuration information for CRYP module
3578 * @param pCypherData: Pointer to the cyphertext buffer
3579 * @param Size: Length of the plaintext buffer, must be a multiple of 8
3580 * @param pPlainData: Pointer to the plaintext buffer
3581 * @retval HAL status
3582 */
3583HAL_StatusTypeDef HAL_CRYP_TDESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
3584{
3585 uint32_t inputaddr;
3586 uint32_t outputaddr;
3587
3588 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
3589 {
3590 /* Process Locked */
3591 __HAL_LOCK(hcryp);
3592
3593 inputaddr = (uint32_t)pCypherData;
3594 outputaddr = (uint32_t)pPlainData;
3595
3596 /* Change the CRYP state */
3597 hcryp->State = HAL_CRYP_STATE_BUSY;
3598
3599 /* Set CRYP peripheral in TDES CBC decryption mode */
3600 CRYP_SetTDESCBCMode(hcryp, CRYP_CR_ALGODIR);
3601
3602 /* Set the input and output addresses and start DMA transfer */
3603 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
3604
3605 /* Process Unlocked */
3606 __HAL_UNLOCK(hcryp);
3607
3608 /* Return function status */
3609 return HAL_OK;
3610 }
3611 else
3612 {
3613 return HAL_ERROR;
3614 }
3615}
3616
3617/**
3618 * @}
3619 */
3620
3621/** @defgroup CRYP_Exported_Functions_Group5 DMA callback functions
3622 * @brief DMA callback functions.
3623 *
3624@verbatim
3625 ==============================================================================
3626 ##### DMA callback functions #####
3627 ==============================================================================
3628 [..] This section provides DMA callback functions:
3629 (+) DMA Input data transfer complete
3630 (+) DMA Output data transfer complete
3631 (+) DMA error
3632
3633@endverbatim
3634 * @{
3635 */
3636
3637/**
3638 * @brief Input FIFO transfer completed callbacks.
3639 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3640 * the configuration information for CRYP module
3641 * @retval None
3642 */
3643__weak void HAL_CRYP_InCpltCallback(CRYP_HandleTypeDef *hcryp)
3644{
3645 /* NOTE : This function Should not be modified, when the callback is needed,
3646 the HAL_CRYP_InCpltCallback could be implemented in the user file
3647 */
3648}
3649
3650/**
3651 * @brief Output FIFO transfer completed callbacks.
3652 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3653 * the configuration information for CRYP module
3654 * @retval None
3655 */
3656__weak void HAL_CRYP_OutCpltCallback(CRYP_HandleTypeDef *hcryp)
3657{
3658 /* NOTE : This function Should not be modified, when the callback is needed,
3659 the HAL_CRYP_OutCpltCallback could be implemented in the user file
3660 */
3661}
3662
3663/**
3664 * @brief CRYP error callbacks.
3665 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3666 * the configuration information for CRYP module
3667 * @retval None
3668 */
3669 __weak void HAL_CRYP_ErrorCallback(CRYP_HandleTypeDef *hcryp)
3670{
3671 /* NOTE : This function Should not be modified, when the callback is needed,
3672 the HAL_CRYP_ErrorCallback could be implemented in the user file
3673 */
3674}
3675
3676/**
3677 * @}
3678 */
3679
3680/** @defgroup CRYP_Exported_Functions_Group6 CRYP IRQ handler management
3681 * @brief CRYP IRQ handler.
3682 *
3683@verbatim
3684 ==============================================================================
3685 ##### CRYP IRQ handler management #####
3686 ==============================================================================
3687[..] This section provides CRYP IRQ handler function.
3688
3689@endverbatim
3690 * @{
3691 */
3692
3693/**
3694 * @brief This function handles CRYP interrupt request.
3695 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3696 * the configuration information for CRYP module
3697 * @retval None
3698 */
3699void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp)
3700{
3701 switch(CRYP->CR & CRYP_CR_ALGOMODE_DIRECTION)
3702 {
3703 case CRYP_CR_ALGOMODE_TDES_ECB_ENCRYPT:
3704 HAL_CRYP_TDESECB_Encrypt_IT(hcryp, NULL, 0, NULL);
3705 break;
3706
3707 case CRYP_CR_ALGOMODE_TDES_ECB_DECRYPT:
3708 HAL_CRYP_TDESECB_Decrypt_IT(hcryp, NULL, 0, NULL);
3709 break;
3710
3711 case CRYP_CR_ALGOMODE_TDES_CBC_ENCRYPT:
3712 HAL_CRYP_TDESCBC_Encrypt_IT(hcryp, NULL, 0, NULL);
3713 break;
3714
3715 case CRYP_CR_ALGOMODE_TDES_CBC_DECRYPT:
3716 HAL_CRYP_TDESCBC_Decrypt_IT(hcryp, NULL, 0, NULL);
3717 break;
3718
3719 case CRYP_CR_ALGOMODE_DES_ECB_ENCRYPT:
3720 HAL_CRYP_DESECB_Encrypt_IT(hcryp, NULL, 0, NULL);
3721 break;
3722
3723 case CRYP_CR_ALGOMODE_DES_ECB_DECRYPT:
3724 HAL_CRYP_DESECB_Decrypt_IT(hcryp, NULL, 0, NULL);
3725 break;
3726
3727 case CRYP_CR_ALGOMODE_DES_CBC_ENCRYPT:
3728 HAL_CRYP_DESCBC_Encrypt_IT(hcryp, NULL, 0, NULL);
3729 break;
3730
3731 case CRYP_CR_ALGOMODE_DES_CBC_DECRYPT:
3732 HAL_CRYP_DESCBC_Decrypt_IT(hcryp, NULL, 0, NULL);
3733 break;
3734
3735 case CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT:
3736 HAL_CRYP_AESECB_Encrypt_IT(hcryp, NULL, 0, NULL);
3737 break;
3738
3739 case CRYP_CR_ALGOMODE_AES_ECB_DECRYPT:
3740 HAL_CRYP_AESECB_Decrypt_IT(hcryp, NULL, 0, NULL);
3741 break;
3742
3743 case CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT:
3744 HAL_CRYP_AESCBC_Encrypt_IT(hcryp, NULL, 0, NULL);
3745 break;
3746
3747 case CRYP_CR_ALGOMODE_AES_CBC_DECRYPT:
3748 HAL_CRYP_AESCBC_Decrypt_IT(hcryp, NULL, 0, NULL);
3749 break;
3750
3751 case CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT:
3752 HAL_CRYP_AESCTR_Encrypt_IT(hcryp, NULL, 0, NULL);
3753 break;
3754
3755 case CRYP_CR_ALGOMODE_AES_CTR_DECRYPT:
3756 HAL_CRYP_AESCTR_Decrypt_IT(hcryp, NULL, 0, NULL);
3757 break;
3758
3759 default:
3760 break;
3761 }
3762}
3763
3764/**
3765 * @}
3766 */
3767
3768/** @defgroup CRYP_Exported_Functions_Group7 Peripheral State functions
3769 * @brief Peripheral State functions.
3770 *
3771@verbatim
3772 ==============================================================================
3773 ##### Peripheral State functions #####
3774 ==============================================================================
3775 [..]
3776 This subsection permits to get in run-time the status of the peripheral.
3777
3778@endverbatim
3779 * @{
3780 */
3781
3782/**
3783 * @brief Returns the CRYP state.
3784 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3785 * the configuration information for CRYP module
3786 * @retval HAL state
3787 */
3788HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp)
3789{
3790 return hcryp->State;
3791}
3792
3793/**
3794 * @}
3795 */
3796
3797
3798/**
3799 * @}
3800 */
3801
3802#endif /* STM32F415xx || STM32F417xx || STM32F437xx || STM32F439xx || STM32F479xx */
3803
3804#endif /* HAL_CRYP_MODULE_ENABLED */
3805/**
3806 * @}
3807 */
3808
3809/**
3810 * @}
3811 */
3812
3813/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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