source: asp3_wo_tecs/trunk/arch/arm_m_gcc/stm32f4xx_stm32cube/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_usb.h@ 303

Last change on this file since 303 was 303, checked in by ertl-honda, 7 years ago

nucleo_f401re依存部の追加

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1/**
2 ******************************************************************************
3 * @file stm32f4xx_ll_usb.h
4 * @author MCD Application Team
5 * @version V1.4.1
6 * @date 09-October-2015
7 * @brief Header file of USB Core HAL module.
8 ******************************************************************************
9 * @attention
10 *
11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
12 *
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 ******************************************************************************
36 */
37
38/* Define to prevent recursive inclusion -------------------------------------*/
39#ifndef __STM32F4xx_LL_USB_H
40#define __STM32F4xx_LL_USB_H
41
42#ifdef __cplusplus
43 extern "C" {
44#endif
45#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
46 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
47 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || \
48 defined(STM32F469xx) || defined(STM32F479xx)
49/* Includes ------------------------------------------------------------------*/
50#include "stm32f4xx_hal_def.h"
51
52/** @addtogroup STM32F4xx_HAL
53 * @{
54 */
55
56/** @addtogroup USB_Core
57 * @{
58 */
59
60/* Exported types ------------------------------------------------------------*/
61
62/**
63 * @brief USB Mode definition
64 */
65typedef enum
66{
67 USB_OTG_DEVICE_MODE = 0,
68 USB_OTG_HOST_MODE = 1,
69 USB_OTG_DRD_MODE = 2
70
71}USB_OTG_ModeTypeDef;
72
73/**
74 * @brief URB States definition
75 */
76typedef enum {
77 URB_IDLE = 0,
78 URB_DONE,
79 URB_NOTREADY,
80 URB_NYET,
81 URB_ERROR,
82 URB_STALL
83
84}USB_OTG_URBStateTypeDef;
85
86/**
87 * @brief Host channel States definition
88 */
89typedef enum {
90 HC_IDLE = 0,
91 HC_XFRC,
92 HC_HALTED,
93 HC_NAK,
94 HC_NYET,
95 HC_STALL,
96 HC_XACTERR,
97 HC_BBLERR,
98 HC_DATATGLERR
99
100}USB_OTG_HCStateTypeDef;
101
102/**
103 * @brief PCD Initialization Structure definition
104 */
105typedef struct
106{
107 uint32_t dev_endpoints; /*!< Device Endpoints number.
108 This parameter depends on the used USB core.
109 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
110
111 uint32_t Host_channels; /*!< Host Channels number.
112 This parameter Depends on the used USB core.
113 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
114
115 uint32_t speed; /*!< USB Core speed.
116 This parameter can be any value of @ref USB_Core_Speed_ */
117
118 uint32_t dma_enable; /*!< Enable or disable of the USB embedded DMA. */
119
120 uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size.
121 This parameter can be any value of @ref USB_EP0_MPS_ */
122
123 uint32_t phy_itface; /*!< Select the used PHY interface.
124 This parameter can be any value of @ref USB_Core_PHY_ */
125
126 uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */
127
128 uint32_t low_power_enable; /*!< Enable or disable the low power mode. */
129
130 uint32_t lpm_enable; /*!< Enable or disable Link Power Management. */
131
132 uint32_t battery_charging_enable; /*!< Enable or disable Battery charging. */
133
134 uint32_t vbus_sensing_enable; /*!< Enable or disable the VBUS Sensing feature. */
135
136 uint32_t use_dedicated_ep1; /*!< Enable or disable the use of the dedicated EP1 interrupt. */
137
138 uint32_t use_external_vbus; /*!< Enable or disable the use of the external VBUS. */
139
140}USB_OTG_CfgTypeDef;
141
142typedef struct
143{
144 uint8_t num; /*!< Endpoint number
145 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
146
147 uint8_t is_in; /*!< Endpoint direction
148 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
149
150 uint8_t is_stall; /*!< Endpoint stall condition
151 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
152
153 uint8_t type; /*!< Endpoint type
154 This parameter can be any value of @ref USB_EP_Type_ */
155
156 uint8_t data_pid_start; /*!< Initial data PID
157 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
158
159 uint8_t even_odd_frame; /*!< IFrame parity
160 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
161
162 uint16_t tx_fifo_num; /*!< Transmission FIFO number
163 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
164
165 uint32_t maxpacket; /*!< Endpoint Max packet size
166 This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
167
168 uint8_t *xfer_buff; /*!< Pointer to transfer buffer */
169
170 uint32_t dma_addr; /*!< 32 bits aligned transfer buffer address */
171
172 uint32_t xfer_len; /*!< Current transfer length */
173
174 uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */
175
176}USB_OTG_EPTypeDef;
177
178typedef struct
179{
180 uint8_t dev_addr ; /*!< USB device address.
181 This parameter must be a number between Min_Data = 1 and Max_Data = 255 */
182
183 uint8_t ch_num; /*!< Host channel number.
184 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
185
186 uint8_t ep_num; /*!< Endpoint number.
187 This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
188
189 uint8_t ep_is_in; /*!< Endpoint direction
190 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
191
192 uint8_t speed; /*!< USB Host speed.
193 This parameter can be any value of @ref USB_Core_Speed_ */
194
195 uint8_t do_ping; /*!< Enable or disable the use of the PING protocol for HS mode. */
196
197 uint8_t process_ping; /*!< Execute the PING protocol for HS mode. */
198
199 uint8_t ep_type; /*!< Endpoint Type.
200 This parameter can be any value of @ref USB_EP_Type_ */
201
202 uint16_t max_packet; /*!< Endpoint Max packet size.
203 This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
204
205 uint8_t data_pid; /*!< Initial data PID.
206 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
207
208 uint8_t *xfer_buff; /*!< Pointer to transfer buffer. */
209
210 uint32_t xfer_len; /*!< Current transfer length. */
211
212 uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer. */
213
214 uint8_t toggle_in; /*!< IN transfer current toggle flag.
215 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
216
217 uint8_t toggle_out; /*!< OUT transfer current toggle flag
218 This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
219
220 uint32_t dma_addr; /*!< 32 bits aligned transfer buffer address. */
221
222 uint32_t ErrCnt; /*!< Host channel error count.*/
223
224 USB_OTG_URBStateTypeDef urb_state; /*!< URB state.
225 This parameter can be any value of @ref USB_OTG_URBStateTypeDef */
226
227 USB_OTG_HCStateTypeDef state; /*!< Host Channel state.
228 This parameter can be any value of @ref USB_OTG_HCStateTypeDef */
229
230}USB_OTG_HCTypeDef;
231
232/* Exported constants --------------------------------------------------------*/
233
234/** @defgroup PCD_Exported_Constants PCD Exported Constants
235 * @{
236 */
237
238/** @defgroup USB_Core_Mode_ USB Core Mode
239 * @{
240 */
241#define USB_OTG_MODE_DEVICE 0
242#define USB_OTG_MODE_HOST 1
243#define USB_OTG_MODE_DRD 2
244/**
245 * @}
246 */
247
248/** @defgroup USB_Core_Speed_ USB Core Speed
249 * @{
250 */
251#define USB_OTG_SPEED_HIGH 0
252#define USB_OTG_SPEED_HIGH_IN_FULL 1
253#define USB_OTG_SPEED_LOW 2
254#define USB_OTG_SPEED_FULL 3
255/**
256 * @}
257 */
258
259/** @defgroup USB_Core_PHY_ USB Core PHY
260 * @{
261 */
262#define USB_OTG_ULPI_PHY 1
263#define USB_OTG_EMBEDDED_PHY 2
264/**
265 * @}
266 */
267
268/** @defgroup USB_Core_MPS_ USB Core MPS
269 * @{
270 */
271#define USB_OTG_HS_MAX_PACKET_SIZE 512
272#define USB_OTG_FS_MAX_PACKET_SIZE 64
273#define USB_OTG_MAX_EP0_SIZE 64
274/**
275 * @}
276 */
277
278/** @defgroup USB_Core_Phy_Frequency_ USB Core Phy Frequency
279 * @{
280 */
281#define DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ (0 << 1)
282#define DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ (1 << 1)
283#define DSTS_ENUMSPD_LS_PHY_6MHZ (2 << 1)
284#define DSTS_ENUMSPD_FS_PHY_48MHZ (3 << 1)
285/**
286 * @}
287 */
288
289/** @defgroup USB_CORE_Frame_Interval_ USB CORE Frame Interval
290 * @{
291 */
292#define DCFG_FRAME_INTERVAL_80 0
293#define DCFG_FRAME_INTERVAL_85 1
294#define DCFG_FRAME_INTERVAL_90 2
295#define DCFG_FRAME_INTERVAL_95 3
296/**
297 * @}
298 */
299
300/** @defgroup USB_EP0_MPS_ USB EP0 MPS
301 * @{
302 */
303#define DEP0CTL_MPS_64 0
304#define DEP0CTL_MPS_32 1
305#define DEP0CTL_MPS_16 2
306#define DEP0CTL_MPS_8 3
307/**
308 * @}
309 */
310
311/** @defgroup USB_EP_Speed_ USB EP Speed
312 * @{
313 */
314#define EP_SPEED_LOW 0
315#define EP_SPEED_FULL 1
316#define EP_SPEED_HIGH 2
317/**
318 * @}
319 */
320
321/** @defgroup USB_EP_Type_ USB EP Type
322 * @{
323 */
324#define EP_TYPE_CTRL 0
325#define EP_TYPE_ISOC 1
326#define EP_TYPE_BULK 2
327#define EP_TYPE_INTR 3
328#define EP_TYPE_MSK 3
329/**
330 * @}
331 */
332
333/** @defgroup USB_STS_Defines_ USB STS Defines
334 * @{
335 */
336#define STS_GOUT_NAK 1
337#define STS_DATA_UPDT 2
338#define STS_XFER_COMP 3
339#define STS_SETUP_COMP 4
340#define STS_SETUP_UPDT 6
341/**
342 * @}
343 */
344
345/** @defgroup HCFG_SPEED_Defines_ HCFG SPEED Defines
346 * @{
347 */
348#define HCFG_30_60_MHZ 0
349#define HCFG_48_MHZ 1
350#define HCFG_6_MHZ 2
351/**
352 * @}
353 */
354
355/** @defgroup HPRT0_PRTSPD_SPEED_Defines_ HPRT0 PRTSPD SPEED Defines
356 * @{
357 */
358#define HPRT0_PRTSPD_HIGH_SPEED 0
359#define HPRT0_PRTSPD_FULL_SPEED 1
360#define HPRT0_PRTSPD_LOW_SPEED 2
361/**
362 * @}
363 */
364
365#define HCCHAR_CTRL 0
366#define HCCHAR_ISOC 1
367#define HCCHAR_BULK 2
368#define HCCHAR_INTR 3
369
370#define HC_PID_DATA0 0
371#define HC_PID_DATA2 1
372#define HC_PID_DATA1 2
373#define HC_PID_SETUP 3
374
375#define GRXSTS_PKTSTS_IN 2
376#define GRXSTS_PKTSTS_IN_XFER_COMP 3
377#define GRXSTS_PKTSTS_DATA_TOGGLE_ERR 5
378#define GRXSTS_PKTSTS_CH_HALTED 7
379
380#define USBx_PCGCCTL *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_PCGCCTL_BASE)
381#define USBx_HPRT0 *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_HOST_PORT_BASE)
382
383#define USBx_DEVICE ((USB_OTG_DeviceTypeDef *)((uint32_t )USBx + USB_OTG_DEVICE_BASE))
384#define USBx_INEP(i) ((USB_OTG_INEndpointTypeDef *)((uint32_t)USBx + USB_OTG_IN_ENDPOINT_BASE + (i)*USB_OTG_EP_REG_SIZE))
385#define USBx_OUTEP(i) ((USB_OTG_OUTEndpointTypeDef *)((uint32_t)USBx + USB_OTG_OUT_ENDPOINT_BASE + (i)*USB_OTG_EP_REG_SIZE))
386#define USBx_DFIFO(i) *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_FIFO_BASE + (i) * USB_OTG_FIFO_SIZE)
387
388#define USBx_HOST ((USB_OTG_HostTypeDef *)((uint32_t )USBx + USB_OTG_HOST_BASE))
389#define USBx_HC(i) ((USB_OTG_HostChannelTypeDef *)((uint32_t)USBx + USB_OTG_HOST_CHANNEL_BASE + (i)*USB_OTG_HOST_CHANNEL_SIZE))
390/**
391 * @}
392 */
393/* Exported macro ------------------------------------------------------------*/
394#define USB_MASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK &= ~(__INTERRUPT__))
395#define USB_UNMASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK |= (__INTERRUPT__))
396
397#define CLEAR_IN_EP_INTR(__EPNUM__, __INTERRUPT__) (USBx_INEP(__EPNUM__)->DIEPINT = (__INTERRUPT__))
398#define CLEAR_OUT_EP_INTR(__EPNUM__, __INTERRUPT__) (USBx_OUTEP(__EPNUM__)->DOEPINT = (__INTERRUPT__))
399
400/* Exported functions --------------------------------------------------------*/
401HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef Init);
402HAL_StatusTypeDef USB_DevInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef Init);
403HAL_StatusTypeDef USB_EnableGlobalInt(USB_OTG_GlobalTypeDef *USBx);
404HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx);
405HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx , USB_OTG_ModeTypeDef mode);
406HAL_StatusTypeDef USB_SetDevSpeed(USB_OTG_GlobalTypeDef *USBx , uint8_t speed);
407HAL_StatusTypeDef USB_FlushRxFifo (USB_OTG_GlobalTypeDef *USBx);
408HAL_StatusTypeDef USB_FlushTxFifo (USB_OTG_GlobalTypeDef *USBx, uint32_t num );
409HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
410HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
411HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
412HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
413HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma);
414HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma);
415HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma);
416void * USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len);
417HAL_StatusTypeDef USB_EPSetStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep);
418HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep);
419HAL_StatusTypeDef USB_SetDevAddress (USB_OTG_GlobalTypeDef *USBx, uint8_t address);
420HAL_StatusTypeDef USB_DevConnect (USB_OTG_GlobalTypeDef *USBx);
421HAL_StatusTypeDef USB_DevDisconnect (USB_OTG_GlobalTypeDef *USBx);
422HAL_StatusTypeDef USB_StopDevice(USB_OTG_GlobalTypeDef *USBx);
423HAL_StatusTypeDef USB_ActivateSetup (USB_OTG_GlobalTypeDef *USBx);
424HAL_StatusTypeDef USB_EP0_OutStart(USB_OTG_GlobalTypeDef *USBx, uint8_t dma, uint8_t *psetup);
425uint8_t USB_GetDevSpeed(USB_OTG_GlobalTypeDef *USBx);
426uint32_t USB_GetMode(USB_OTG_GlobalTypeDef *USBx);
427uint32_t USB_ReadInterrupts (USB_OTG_GlobalTypeDef *USBx);
428uint32_t USB_ReadDevAllOutEpInterrupt (USB_OTG_GlobalTypeDef *USBx);
429uint32_t USB_ReadDevOutEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum);
430uint32_t USB_ReadDevAllInEpInterrupt (USB_OTG_GlobalTypeDef *USBx);
431uint32_t USB_ReadDevInEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum);
432void USB_ClearInterrupts (USB_OTG_GlobalTypeDef *USBx, uint32_t interrupt);
433
434HAL_StatusTypeDef USB_HostInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg);
435HAL_StatusTypeDef USB_InitFSLSPClkSel(USB_OTG_GlobalTypeDef *USBx , uint8_t freq);
436HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx);
437HAL_StatusTypeDef USB_DriveVbus (USB_OTG_GlobalTypeDef *USBx, uint8_t state);
438uint32_t USB_GetHostSpeed (USB_OTG_GlobalTypeDef *USBx);
439uint32_t USB_GetCurrentFrame (USB_OTG_GlobalTypeDef *USBx);
440HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx,
441 uint8_t ch_num,
442 uint8_t epnum,
443 uint8_t dev_address,
444 uint8_t speed,
445 uint8_t ep_type,
446 uint16_t mps);
447HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDef *hc, uint8_t dma);
448uint32_t USB_HC_ReadInterrupt (USB_OTG_GlobalTypeDef *USBx);
449HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx , uint8_t hc_num);
450HAL_StatusTypeDef USB_DoPing(USB_OTG_GlobalTypeDef *USBx , uint8_t ch_num);
451HAL_StatusTypeDef USB_StopHost(USB_OTG_GlobalTypeDef *USBx);
452
453/**
454 * @}
455 */
456
457/**
458 * @}
459 */
460#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||
461 STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx */
462#ifdef __cplusplus
463}
464#endif
465
466
467#endif /* __STM32F4xx_LL_USB_H */
468
469/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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