1 | /**
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2 | ******************************************************************************
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3 | * @file stm32f4xx_ll_usb.h
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4 | * @author MCD Application Team
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5 | * @version V1.4.1
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6 | * @date 09-October-2015
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7 | * @brief Header file of USB Core HAL module.
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8 | ******************************************************************************
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9 | * @attention
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10 | *
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11 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
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12 | *
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13 | * Redistribution and use in source and binary forms, with or without modification,
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14 | * are permitted provided that the following conditions are met:
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15 | * 1. Redistributions of source code must retain the above copyright notice,
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16 | * this list of conditions and the following disclaimer.
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17 | * 2. Redistributions in binary form must reproduce the above copyright notice,
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18 | * this list of conditions and the following disclaimer in the documentation
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19 | * and/or other materials provided with the distribution.
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20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
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21 | * may be used to endorse or promote products derived from this software
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22 | * without specific prior written permission.
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23 | *
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24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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34 | *
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35 | ******************************************************************************
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36 | */
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37 |
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38 | /* Define to prevent recursive inclusion -------------------------------------*/
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39 | #ifndef __STM32F4xx_LL_USB_H
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40 | #define __STM32F4xx_LL_USB_H
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41 |
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42 | #ifdef __cplusplus
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43 | extern "C" {
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44 | #endif
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45 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
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46 | defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
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47 | defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || \
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48 | defined(STM32F469xx) || defined(STM32F479xx)
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49 | /* Includes ------------------------------------------------------------------*/
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50 | #include "stm32f4xx_hal_def.h"
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51 |
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52 | /** @addtogroup STM32F4xx_HAL
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53 | * @{
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54 | */
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55 |
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56 | /** @addtogroup USB_Core
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57 | * @{
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58 | */
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59 |
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60 | /* Exported types ------------------------------------------------------------*/
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61 |
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62 | /**
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63 | * @brief USB Mode definition
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64 | */
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65 | typedef enum
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66 | {
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67 | USB_OTG_DEVICE_MODE = 0,
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68 | USB_OTG_HOST_MODE = 1,
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69 | USB_OTG_DRD_MODE = 2
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70 |
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71 | }USB_OTG_ModeTypeDef;
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72 |
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73 | /**
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74 | * @brief URB States definition
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75 | */
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76 | typedef enum {
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77 | URB_IDLE = 0,
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78 | URB_DONE,
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79 | URB_NOTREADY,
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80 | URB_NYET,
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81 | URB_ERROR,
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82 | URB_STALL
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83 |
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84 | }USB_OTG_URBStateTypeDef;
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85 |
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86 | /**
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87 | * @brief Host channel States definition
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88 | */
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89 | typedef enum {
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90 | HC_IDLE = 0,
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91 | HC_XFRC,
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92 | HC_HALTED,
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93 | HC_NAK,
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94 | HC_NYET,
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95 | HC_STALL,
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96 | HC_XACTERR,
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97 | HC_BBLERR,
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98 | HC_DATATGLERR
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99 |
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100 | }USB_OTG_HCStateTypeDef;
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101 |
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102 | /**
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103 | * @brief PCD Initialization Structure definition
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104 | */
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105 | typedef struct
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106 | {
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107 | uint32_t dev_endpoints; /*!< Device Endpoints number.
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108 | This parameter depends on the used USB core.
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109 | This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
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110 |
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111 | uint32_t Host_channels; /*!< Host Channels number.
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112 | This parameter Depends on the used USB core.
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113 | This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
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114 |
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115 | uint32_t speed; /*!< USB Core speed.
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116 | This parameter can be any value of @ref USB_Core_Speed_ */
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117 |
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118 | uint32_t dma_enable; /*!< Enable or disable of the USB embedded DMA. */
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119 |
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120 | uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size.
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121 | This parameter can be any value of @ref USB_EP0_MPS_ */
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122 |
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123 | uint32_t phy_itface; /*!< Select the used PHY interface.
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124 | This parameter can be any value of @ref USB_Core_PHY_ */
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125 |
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126 | uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */
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127 |
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128 | uint32_t low_power_enable; /*!< Enable or disable the low power mode. */
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129 |
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130 | uint32_t lpm_enable; /*!< Enable or disable Link Power Management. */
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131 |
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132 | uint32_t battery_charging_enable; /*!< Enable or disable Battery charging. */
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133 |
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134 | uint32_t vbus_sensing_enable; /*!< Enable or disable the VBUS Sensing feature. */
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135 |
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136 | uint32_t use_dedicated_ep1; /*!< Enable or disable the use of the dedicated EP1 interrupt. */
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137 |
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138 | uint32_t use_external_vbus; /*!< Enable or disable the use of the external VBUS. */
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139 |
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140 | }USB_OTG_CfgTypeDef;
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141 |
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142 | typedef struct
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143 | {
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144 | uint8_t num; /*!< Endpoint number
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145 | This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
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146 |
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147 | uint8_t is_in; /*!< Endpoint direction
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148 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
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149 |
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150 | uint8_t is_stall; /*!< Endpoint stall condition
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151 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
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152 |
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153 | uint8_t type; /*!< Endpoint type
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154 | This parameter can be any value of @ref USB_EP_Type_ */
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155 |
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156 | uint8_t data_pid_start; /*!< Initial data PID
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157 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
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158 |
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159 | uint8_t even_odd_frame; /*!< IFrame parity
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160 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
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161 |
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162 | uint16_t tx_fifo_num; /*!< Transmission FIFO number
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163 | This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
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164 |
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165 | uint32_t maxpacket; /*!< Endpoint Max packet size
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166 | This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
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167 |
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168 | uint8_t *xfer_buff; /*!< Pointer to transfer buffer */
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169 |
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170 | uint32_t dma_addr; /*!< 32 bits aligned transfer buffer address */
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171 |
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172 | uint32_t xfer_len; /*!< Current transfer length */
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173 |
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174 | uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */
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175 |
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176 | }USB_OTG_EPTypeDef;
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177 |
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178 | typedef struct
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179 | {
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180 | uint8_t dev_addr ; /*!< USB device address.
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181 | This parameter must be a number between Min_Data = 1 and Max_Data = 255 */
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182 |
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183 | uint8_t ch_num; /*!< Host channel number.
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184 | This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
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185 |
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186 | uint8_t ep_num; /*!< Endpoint number.
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187 | This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
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188 |
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189 | uint8_t ep_is_in; /*!< Endpoint direction
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190 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
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191 |
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192 | uint8_t speed; /*!< USB Host speed.
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193 | This parameter can be any value of @ref USB_Core_Speed_ */
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194 |
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195 | uint8_t do_ping; /*!< Enable or disable the use of the PING protocol for HS mode. */
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196 |
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197 | uint8_t process_ping; /*!< Execute the PING protocol for HS mode. */
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198 |
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199 | uint8_t ep_type; /*!< Endpoint Type.
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200 | This parameter can be any value of @ref USB_EP_Type_ */
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201 |
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202 | uint16_t max_packet; /*!< Endpoint Max packet size.
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203 | This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
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204 |
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205 | uint8_t data_pid; /*!< Initial data PID.
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206 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
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207 |
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208 | uint8_t *xfer_buff; /*!< Pointer to transfer buffer. */
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209 |
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210 | uint32_t xfer_len; /*!< Current transfer length. */
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211 |
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212 | uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer. */
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213 |
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214 | uint8_t toggle_in; /*!< IN transfer current toggle flag.
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215 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
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216 |
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217 | uint8_t toggle_out; /*!< OUT transfer current toggle flag
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218 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */
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219 |
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220 | uint32_t dma_addr; /*!< 32 bits aligned transfer buffer address. */
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221 |
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222 | uint32_t ErrCnt; /*!< Host channel error count.*/
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223 |
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224 | USB_OTG_URBStateTypeDef urb_state; /*!< URB state.
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225 | This parameter can be any value of @ref USB_OTG_URBStateTypeDef */
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226 |
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227 | USB_OTG_HCStateTypeDef state; /*!< Host Channel state.
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228 | This parameter can be any value of @ref USB_OTG_HCStateTypeDef */
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229 |
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230 | }USB_OTG_HCTypeDef;
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231 |
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232 | /* Exported constants --------------------------------------------------------*/
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233 |
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234 | /** @defgroup PCD_Exported_Constants PCD Exported Constants
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235 | * @{
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236 | */
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237 |
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238 | /** @defgroup USB_Core_Mode_ USB Core Mode
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239 | * @{
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240 | */
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241 | #define USB_OTG_MODE_DEVICE 0
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242 | #define USB_OTG_MODE_HOST 1
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243 | #define USB_OTG_MODE_DRD 2
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244 | /**
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245 | * @}
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246 | */
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247 |
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248 | /** @defgroup USB_Core_Speed_ USB Core Speed
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249 | * @{
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250 | */
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251 | #define USB_OTG_SPEED_HIGH 0
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252 | #define USB_OTG_SPEED_HIGH_IN_FULL 1
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253 | #define USB_OTG_SPEED_LOW 2
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254 | #define USB_OTG_SPEED_FULL 3
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255 | /**
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256 | * @}
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257 | */
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258 |
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259 | /** @defgroup USB_Core_PHY_ USB Core PHY
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260 | * @{
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261 | */
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262 | #define USB_OTG_ULPI_PHY 1
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263 | #define USB_OTG_EMBEDDED_PHY 2
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264 | /**
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265 | * @}
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266 | */
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267 |
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268 | /** @defgroup USB_Core_MPS_ USB Core MPS
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269 | * @{
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270 | */
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271 | #define USB_OTG_HS_MAX_PACKET_SIZE 512
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272 | #define USB_OTG_FS_MAX_PACKET_SIZE 64
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273 | #define USB_OTG_MAX_EP0_SIZE 64
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274 | /**
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275 | * @}
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276 | */
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277 |
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278 | /** @defgroup USB_Core_Phy_Frequency_ USB Core Phy Frequency
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279 | * @{
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280 | */
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281 | #define DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ (0 << 1)
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282 | #define DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ (1 << 1)
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283 | #define DSTS_ENUMSPD_LS_PHY_6MHZ (2 << 1)
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284 | #define DSTS_ENUMSPD_FS_PHY_48MHZ (3 << 1)
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285 | /**
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286 | * @}
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287 | */
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288 |
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289 | /** @defgroup USB_CORE_Frame_Interval_ USB CORE Frame Interval
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290 | * @{
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291 | */
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292 | #define DCFG_FRAME_INTERVAL_80 0
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293 | #define DCFG_FRAME_INTERVAL_85 1
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294 | #define DCFG_FRAME_INTERVAL_90 2
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295 | #define DCFG_FRAME_INTERVAL_95 3
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296 | /**
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297 | * @}
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298 | */
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299 |
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300 | /** @defgroup USB_EP0_MPS_ USB EP0 MPS
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301 | * @{
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302 | */
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303 | #define DEP0CTL_MPS_64 0
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304 | #define DEP0CTL_MPS_32 1
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305 | #define DEP0CTL_MPS_16 2
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306 | #define DEP0CTL_MPS_8 3
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307 | /**
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308 | * @}
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309 | */
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310 |
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311 | /** @defgroup USB_EP_Speed_ USB EP Speed
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312 | * @{
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313 | */
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314 | #define EP_SPEED_LOW 0
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315 | #define EP_SPEED_FULL 1
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316 | #define EP_SPEED_HIGH 2
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317 | /**
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318 | * @}
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319 | */
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320 |
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321 | /** @defgroup USB_EP_Type_ USB EP Type
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322 | * @{
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323 | */
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324 | #define EP_TYPE_CTRL 0
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325 | #define EP_TYPE_ISOC 1
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326 | #define EP_TYPE_BULK 2
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327 | #define EP_TYPE_INTR 3
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328 | #define EP_TYPE_MSK 3
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329 | /**
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330 | * @}
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331 | */
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332 |
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333 | /** @defgroup USB_STS_Defines_ USB STS Defines
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334 | * @{
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335 | */
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336 | #define STS_GOUT_NAK 1
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337 | #define STS_DATA_UPDT 2
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338 | #define STS_XFER_COMP 3
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339 | #define STS_SETUP_COMP 4
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340 | #define STS_SETUP_UPDT 6
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341 | /**
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342 | * @}
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343 | */
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344 |
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345 | /** @defgroup HCFG_SPEED_Defines_ HCFG SPEED Defines
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346 | * @{
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347 | */
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348 | #define HCFG_30_60_MHZ 0
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349 | #define HCFG_48_MHZ 1
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350 | #define HCFG_6_MHZ 2
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351 | /**
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352 | * @}
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353 | */
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354 |
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355 | /** @defgroup HPRT0_PRTSPD_SPEED_Defines_ HPRT0 PRTSPD SPEED Defines
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356 | * @{
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357 | */
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358 | #define HPRT0_PRTSPD_HIGH_SPEED 0
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359 | #define HPRT0_PRTSPD_FULL_SPEED 1
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360 | #define HPRT0_PRTSPD_LOW_SPEED 2
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361 | /**
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362 | * @}
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363 | */
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364 |
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365 | #define HCCHAR_CTRL 0
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366 | #define HCCHAR_ISOC 1
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367 | #define HCCHAR_BULK 2
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368 | #define HCCHAR_INTR 3
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369 |
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370 | #define HC_PID_DATA0 0
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371 | #define HC_PID_DATA2 1
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372 | #define HC_PID_DATA1 2
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373 | #define HC_PID_SETUP 3
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374 |
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375 | #define GRXSTS_PKTSTS_IN 2
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376 | #define GRXSTS_PKTSTS_IN_XFER_COMP 3
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377 | #define GRXSTS_PKTSTS_DATA_TOGGLE_ERR 5
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378 | #define GRXSTS_PKTSTS_CH_HALTED 7
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379 |
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380 | #define USBx_PCGCCTL *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_PCGCCTL_BASE)
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381 | #define USBx_HPRT0 *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_HOST_PORT_BASE)
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382 |
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383 | #define USBx_DEVICE ((USB_OTG_DeviceTypeDef *)((uint32_t )USBx + USB_OTG_DEVICE_BASE))
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384 | #define USBx_INEP(i) ((USB_OTG_INEndpointTypeDef *)((uint32_t)USBx + USB_OTG_IN_ENDPOINT_BASE + (i)*USB_OTG_EP_REG_SIZE))
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385 | #define USBx_OUTEP(i) ((USB_OTG_OUTEndpointTypeDef *)((uint32_t)USBx + USB_OTG_OUT_ENDPOINT_BASE + (i)*USB_OTG_EP_REG_SIZE))
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386 | #define USBx_DFIFO(i) *(__IO uint32_t *)((uint32_t)USBx + USB_OTG_FIFO_BASE + (i) * USB_OTG_FIFO_SIZE)
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387 |
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388 | #define USBx_HOST ((USB_OTG_HostTypeDef *)((uint32_t )USBx + USB_OTG_HOST_BASE))
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389 | #define USBx_HC(i) ((USB_OTG_HostChannelTypeDef *)((uint32_t)USBx + USB_OTG_HOST_CHANNEL_BASE + (i)*USB_OTG_HOST_CHANNEL_SIZE))
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390 | /**
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391 | * @}
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392 | */
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393 | /* Exported macro ------------------------------------------------------------*/
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394 | #define USB_MASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK &= ~(__INTERRUPT__))
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395 | #define USB_UNMASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK |= (__INTERRUPT__))
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396 |
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397 | #define CLEAR_IN_EP_INTR(__EPNUM__, __INTERRUPT__) (USBx_INEP(__EPNUM__)->DIEPINT = (__INTERRUPT__))
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398 | #define CLEAR_OUT_EP_INTR(__EPNUM__, __INTERRUPT__) (USBx_OUTEP(__EPNUM__)->DOEPINT = (__INTERRUPT__))
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399 |
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400 | /* Exported functions --------------------------------------------------------*/
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401 | HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef Init);
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402 | HAL_StatusTypeDef USB_DevInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef Init);
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403 | HAL_StatusTypeDef USB_EnableGlobalInt(USB_OTG_GlobalTypeDef *USBx);
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404 | HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx);
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405 | HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx , USB_OTG_ModeTypeDef mode);
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406 | HAL_StatusTypeDef USB_SetDevSpeed(USB_OTG_GlobalTypeDef *USBx , uint8_t speed);
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407 | HAL_StatusTypeDef USB_FlushRxFifo (USB_OTG_GlobalTypeDef *USBx);
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408 | HAL_StatusTypeDef USB_FlushTxFifo (USB_OTG_GlobalTypeDef *USBx, uint32_t num );
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409 | HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
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410 | HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
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411 | HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
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412 | HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep);
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413 | HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma);
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414 | HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep, uint8_t dma);
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415 | HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma);
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416 | void * USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len);
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417 | HAL_StatusTypeDef USB_EPSetStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep);
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418 | HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef *USBx , USB_OTG_EPTypeDef *ep);
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419 | HAL_StatusTypeDef USB_SetDevAddress (USB_OTG_GlobalTypeDef *USBx, uint8_t address);
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420 | HAL_StatusTypeDef USB_DevConnect (USB_OTG_GlobalTypeDef *USBx);
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421 | HAL_StatusTypeDef USB_DevDisconnect (USB_OTG_GlobalTypeDef *USBx);
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422 | HAL_StatusTypeDef USB_StopDevice(USB_OTG_GlobalTypeDef *USBx);
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423 | HAL_StatusTypeDef USB_ActivateSetup (USB_OTG_GlobalTypeDef *USBx);
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424 | HAL_StatusTypeDef USB_EP0_OutStart(USB_OTG_GlobalTypeDef *USBx, uint8_t dma, uint8_t *psetup);
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425 | uint8_t USB_GetDevSpeed(USB_OTG_GlobalTypeDef *USBx);
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426 | uint32_t USB_GetMode(USB_OTG_GlobalTypeDef *USBx);
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427 | uint32_t USB_ReadInterrupts (USB_OTG_GlobalTypeDef *USBx);
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428 | uint32_t USB_ReadDevAllOutEpInterrupt (USB_OTG_GlobalTypeDef *USBx);
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429 | uint32_t USB_ReadDevOutEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum);
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430 | uint32_t USB_ReadDevAllInEpInterrupt (USB_OTG_GlobalTypeDef *USBx);
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431 | uint32_t USB_ReadDevInEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum);
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432 | void USB_ClearInterrupts (USB_OTG_GlobalTypeDef *USBx, uint32_t interrupt);
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433 |
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434 | HAL_StatusTypeDef USB_HostInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg);
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435 | HAL_StatusTypeDef USB_InitFSLSPClkSel(USB_OTG_GlobalTypeDef *USBx , uint8_t freq);
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436 | HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx);
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437 | HAL_StatusTypeDef USB_DriveVbus (USB_OTG_GlobalTypeDef *USBx, uint8_t state);
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438 | uint32_t USB_GetHostSpeed (USB_OTG_GlobalTypeDef *USBx);
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439 | uint32_t USB_GetCurrentFrame (USB_OTG_GlobalTypeDef *USBx);
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440 | HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx,
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441 | uint8_t ch_num,
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442 | uint8_t epnum,
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443 | uint8_t dev_address,
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444 | uint8_t speed,
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445 | uint8_t ep_type,
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446 | uint16_t mps);
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447 | HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDef *hc, uint8_t dma);
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448 | uint32_t USB_HC_ReadInterrupt (USB_OTG_GlobalTypeDef *USBx);
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449 | HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx , uint8_t hc_num);
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450 | HAL_StatusTypeDef USB_DoPing(USB_OTG_GlobalTypeDef *USBx , uint8_t ch_num);
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451 | HAL_StatusTypeDef USB_StopHost(USB_OTG_GlobalTypeDef *USBx);
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452 |
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453 | /**
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454 | * @}
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455 | */
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456 |
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457 | /**
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458 | * @}
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459 | */
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460 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||
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461 | STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx */
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462 | #ifdef __cplusplus
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463 | }
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464 | #endif
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465 |
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466 |
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467 | #endif /* __STM32F4xx_LL_USB_H */
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468 |
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469 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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