source: asp3_wo_tecs/trunk/arch/arm_m_gcc/stm32f4xx_stm32cube/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_tim_ex.h@ 303

Last change on this file since 303 was 303, checked in by ertl-honda, 7 years ago

nucleo_f401re依存部の追加
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1/**
2 ******************************************************************************
3 * @file stm32f4xx_hal_tim_ex.h
4 * @author MCD Application Team
5 * @version V1.4.1
6 * @date 09-October-2015
7 * @brief Header file of TIM HAL Extension module.
8 ******************************************************************************
9 * @attention
10 *
11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
12 *
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 ******************************************************************************
36 */
37
38/* Define to prevent recursive inclusion -------------------------------------*/
39#ifndef __STM32F4xx_HAL_TIM_EX_H
40#define __STM32F4xx_HAL_TIM_EX_H
41
42#ifdef __cplusplus
43 extern "C" {
44#endif
45
46/* Includes ------------------------------------------------------------------*/
47#include "stm32f4xx_hal_def.h"
48
49/** @addtogroup STM32F4xx_HAL_Driver
50 * @{
51 */
52
53/** @addtogroup TIMEx
54 * @{
55 */
56
57/* Exported types ------------------------------------------------------------*/
58/** @defgroup TIMEx_Exported_Types TIM Exported Types
59 * @{
60 */
61
62/**
63 * @brief TIM Hall sensor Configuration Structure definition
64 */
65
66typedef struct
67{
68
69 uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
70 This parameter can be a value of @ref TIM_Input_Capture_Polarity */
71
72 uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
73 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
74
75 uint32_t IC1Filter; /*!< Specifies the input capture filter.
76 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
77 uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
78 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
79} TIM_HallSensor_InitTypeDef;
80
81/**
82 * @brief TIM Master configuration Structure definition
83 */
84typedef struct {
85 uint32_t MasterOutputTrigger; /*!< Trigger output (TRGO) selection.
86 This parameter can be a value of @ref TIM_Master_Mode_Selection */
87 uint32_t MasterSlaveMode; /*!< Master/slave mode selection.
88 This parameter can be a value of @ref TIM_Master_Slave_Mode */
89}TIM_MasterConfigTypeDef;
90
91/**
92 * @brief TIM Break and Dead time configuration Structure definition
93 */
94typedef struct
95{
96 uint32_t OffStateRunMode; /*!< TIM off state in run mode.
97 This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */
98 uint32_t OffStateIDLEMode; /*!< TIM off state in IDLE mode.
99 This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */
100 uint32_t LockLevel; /*!< TIM Lock level.
101 This parameter can be a value of @ref TIM_Lock_level */
102 uint32_t DeadTime; /*!< TIM dead Time.
103 This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */
104 uint32_t BreakState; /*!< TIM Break State.
105 This parameter can be a value of @ref TIM_Break_Input_enable_disable */
106 uint32_t BreakPolarity; /*!< TIM Break input polarity.
107 This parameter can be a value of @ref TIM_Break_Polarity */
108 uint32_t AutomaticOutput; /*!< TIM Automatic Output Enable state.
109 This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */
110}TIM_BreakDeadTimeConfigTypeDef;
111/**
112 * @}
113 */
114
115/* Exported constants --------------------------------------------------------*/
116/** @defgroup TIMEx_Exported_Constants TIM Exported Constants
117 * @{
118 */
119
120/** @defgroup TIMEx_Remap TIM Remap
121 * @{
122 */
123#define TIM_TIM2_TIM8_TRGO (0x00000000)
124#define TIM_TIM2_ETH_PTP (0x00000400)
125#define TIM_TIM2_USBFS_SOF (0x00000800)
126#define TIM_TIM2_USBHS_SOF (0x00000C00)
127#define TIM_TIM5_GPIO (0x00000000)
128#define TIM_TIM5_LSI (0x00000040)
129#define TIM_TIM5_LSE (0x00000080)
130#define TIM_TIM5_RTC (0x000000C0)
131#define TIM_TIM11_GPIO (0x00000000)
132#define TIM_TIM11_HSE (0x00000002)
133
134#if defined (STM32F446xx)
135#define TIM_TIM11_SPDIFRX (0x00000001)
136#endif /* STM32F446xx */
137/**
138 * @}
139 */
140
141#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
142/** @defgroup TIMEx_SystemBreakInput TIM System Break Input
143 * @{
144 */
145#define TIM_SYSTEMBREAKINPUT_HARDFAULT ((uint32_t)0x00000001) /* Core Lockup lock output(Hardfault) is connected to Break Input of TIM1 and TIM8 */
146#define TIM_SYSTEMBREAKINPUT_PVD ((uint32_t)0x00000004) /* PVD Interrupt is connected to Break Input of TIM1 and TIM8 */
147#define TIM_SYSTEMBREAKINPUT_HARDFAULT_PVD ((uint32_t)0x00000005) /* Core Lockup lock output(Hardfault) and PVD Interrupt are connected to Break Input of TIM1 and TIM8 */
148/**
149 * @}
150 */
151#endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
152
153/**
154 * @}
155 */
156/* Exported macro ------------------------------------------------------------*/
157/* Exported functions --------------------------------------------------------*/
158/** @addtogroup TIMEx_Exported_Functions
159 * @{
160 */
161
162/** @addtogroup TIMEx_Exported_Functions_Group1
163 * @{
164 */
165/* Timer Hall Sensor functions **********************************************/
166HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef* htim, TIM_HallSensor_InitTypeDef* sConfig);
167HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef* htim);
168
169void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef* htim);
170void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef* htim);
171
172 /* Blocking mode: Polling */
173HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef* htim);
174HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef* htim);
175/* Non-Blocking mode: Interrupt */
176HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef* htim);
177HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef* htim);
178/* Non-Blocking mode: DMA */
179HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef* htim, uint32_t *pData, uint16_t Length);
180HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef* htim);
181/**
182 * @}
183 */
184
185/** @addtogroup TIMEx_Exported_Functions_Group2
186 * @{
187 */
188/* Timer Complementary Output Compare functions *****************************/
189/* Blocking mode: Polling */
190HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef* htim, uint32_t Channel);
191HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef* htim, uint32_t Channel);
192
193/* Non-Blocking mode: Interrupt */
194HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
195HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
196
197/* Non-Blocking mode: DMA */
198HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef* htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
199HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef* htim, uint32_t Channel);
200/**
201 * @}
202 */
203
204/** @addtogroup TIMEx_Exported_Functions_Group3
205 * @{
206 */
207/* Timer Complementary PWM functions ****************************************/
208/* Blocking mode: Polling */
209HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef* htim, uint32_t Channel);
210HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef* htim, uint32_t Channel);
211
212/* Non-Blocking mode: Interrupt */
213HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
214HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
215/* Non-Blocking mode: DMA */
216HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef* htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
217HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef* htim, uint32_t Channel);
218/**
219 * @}
220 */
221
222/** @addtogroup TIMEx_Exported_Functions_Group4
223 * @{
224 */
225/* Timer Complementary One Pulse functions **********************************/
226/* Blocking mode: Polling */
227HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
228HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
229
230/* Non-Blocking mode: Interrupt */
231HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
232HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
233/**
234 * @}
235 */
236
237/** @addtogroup TIMEx_Exported_Functions_Group5
238 * @{
239 */
240/* Extension Control functions ************************************************/
241HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource);
242HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource);
243HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource);
244HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef* htim, TIM_MasterConfigTypeDef * sMasterConfig);
245HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef* htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig);
246HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef* htim, uint32_t Remap);
247/**
248 * @}
249 */
250
251/** @addtogroup TIMEx_Exported_Functions_Group6
252 * @{
253 */
254/* Extension Callback *********************************************************/
255void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef* htim);
256void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef* htim);
257void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);
258/**
259 * @}
260 */
261
262/** @addtogroup TIMEx_Exported_Functions_Group7
263 * @{
264 */
265/* Extension Peripheral State functions **************************************/
266HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef* htim);
267/**
268 * @}
269 */
270
271/**
272 * @}
273 */
274
275/* Private types -------------------------------------------------------------*/
276/* Private variables ---------------------------------------------------------*/
277/* Private constants ---------------------------------------------------------*/
278/* Private macros ------------------------------------------------------------*/
279/** @defgroup TIMEx_Private_Macros TIM Private Macros
280 * @{
281 */
282#if defined (STM32F446xx)
283#define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO)||\
284 ((TIM_REMAP) == TIM_TIM2_ETH_PTP)||\
285 ((TIM_REMAP) == TIM_TIM2_USBFS_SOF)||\
286 ((TIM_REMAP) == TIM_TIM2_USBHS_SOF)||\
287 ((TIM_REMAP) == TIM_TIM5_GPIO)||\
288 ((TIM_REMAP) == TIM_TIM5_LSI)||\
289 ((TIM_REMAP) == TIM_TIM5_LSE)||\
290 ((TIM_REMAP) == TIM_TIM5_RTC)||\
291 ((TIM_REMAP) == TIM_TIM11_GPIO)||\
292 ((TIM_REMAP) == TIM_TIM11_SPDIFRX)||\
293 ((TIM_REMAP) == TIM_TIM11_HSE))
294#else
295#define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO)||\
296 ((TIM_REMAP) == TIM_TIM2_ETH_PTP)||\
297 ((TIM_REMAP) == TIM_TIM2_USBFS_SOF)||\
298 ((TIM_REMAP) == TIM_TIM2_USBHS_SOF)||\
299 ((TIM_REMAP) == TIM_TIM5_GPIO)||\
300 ((TIM_REMAP) == TIM_TIM5_LSI)||\
301 ((TIM_REMAP) == TIM_TIM5_LSE)||\
302 ((TIM_REMAP) == TIM_TIM5_RTC)||\
303 ((TIM_REMAP) == TIM_TIM11_GPIO)||\
304 ((TIM_REMAP) == TIM_TIM11_HSE))
305#endif /* STM32F446xx */
306
307#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
308#define IS_TIM_SYSTEMBREAKINPUT(BREAKINPUT) (((BREAKINPUT) == TIM_SYSTEMBREAKINPUT_HARDFAULT)||\
309 ((BREAKINPUT) == TIM_SYSTEMBREAKINPUT_PVD)||\
310 ((BREAKINPUT) == TIM_SYSTEMBREAKINPUT_HARDFAULT_PVD))
311
312#endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx */
313
314#define IS_TIM_DEADTIME(DEADTIME) ((DEADTIME) <= 0xFF)
315/**
316 * @}
317 */
318
319/* Private functions ---------------------------------------------------------*/
320/** @defgroup TIMEx_Private_Functions TIM Private Functions
321 * @{
322 */
323
324/**
325 * @}
326 */
327
328/**
329 * @}
330 */
331
332/**
333 * @}
334 */
335
336#ifdef __cplusplus
337}
338#endif
339
340#endif /* __STM32F4xx_HAL_TIM_EX_H */
341
342/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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