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source: asp3_wo_tecs/trunk/arch/arm_m_gcc/stm32f4xx_stm32cube/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_spi.h@ 303

Last change on this file since 303 was 303, checked in by ertl-honda, 7 years ago
nucleo_f401re依存部の追加
File size: 22.2 KB

Line
1	/**
2	******************************************************************************
3	* @file stm32f4xx_hal_spi.h
4	* @author MCD Application Team
5	* @version V1.4.1
6	* @date 09-October-2015
7	* @brief Header file of SPI HAL module.
8	******************************************************************************
9	* @attention
10	*
11	* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
12	*
13	* Redistribution and use in source and binary forms, with or without modification,
14	* are permitted provided that the following conditions are met:
15	* 1. Redistributions of source code must retain the above copyright notice,
16	* this list of conditions and the following disclaimer.
17	* 2. Redistributions in binary form must reproduce the above copyright notice,
18	* this list of conditions and the following disclaimer in the documentation
19	* and/or other materials provided with the distribution.
20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
21	* may be used to endorse or promote products derived from this software
22	* without specific prior written permission.
23	*
24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34	*
35	******************************************************************************
36	*/
37
38	/* Define to prevent recursive inclusion -------------------------------------*/
39	#ifndef __STM32F4xx_HAL_SPI_H
40	#define __STM32F4xx_HAL_SPI_H
41
42	#ifdef __cplusplus
43	extern "C" {
44	#endif
45
46	/* Includes ------------------------------------------------------------------*/
47	#include "stm32f4xx_hal_def.h"
48
49	/** @addtogroup STM32F4xx_HAL_Driver
50	* @{
51	*/
52
53	/** @addtogroup SPI
54	* @{
55	*/
56
57	/* Exported types ------------------------------------------------------------*/
58	/** @defgroup SPI_Exported_Types SPI Exported Types
59	* @{
60	*/
61
62	/**
63	* @brief SPI Configuration Structure definition
64	*/
65	typedef struct
66	{
67	uint32_t Mode; /*!< Specifies the SPI operating mode.
68	This parameter can be a value of @ref SPI_mode */
69
70	uint32_t Direction; /*!< Specifies the SPI Directional mode state.
71	This parameter can be a value of @ref SPI_Direction_mode */
72
73	uint32_t DataSize; /*!< Specifies the SPI data size.
74	This parameter can be a value of @ref SPI_data_size */
75
76	uint32_t CLKPolarity; /*!< Specifies the serial clock steady state.
77	This parameter can be a value of @ref SPI_Clock_Polarity */
78
79	uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture.
80	This parameter can be a value of @ref SPI_Clock_Phase */
81
82	uint32_t NSS; /*!< Specifies whether the NSS signal is managed by
83	hardware (NSS pin) or by software using the SSI bit.
84	This parameter can be a value of @ref SPI_Slave_Select_management */
85
86	uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
87	used to configure the transmit and receive SCK clock.
88	This parameter can be a value of @ref SPI_BaudRate_Prescaler
89	@note The communication clock is derived from the master
90	clock. The slave clock does not need to be set */
91
92	uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
93	This parameter can be a value of @ref SPI_MSB_LSB_transmission */
94
95	uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not.
96	This parameter can be a value of @ref SPI_TI_mode */
97
98	uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not.
99	This parameter can be a value of @ref SPI_CRC_Calculation */
100
101	uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation.
102	This parameter must be a number between Min_Data = 0 and Max_Data = 65535 */
103
104	}SPI_InitTypeDef;
105
106	/**
107	* @brief HAL SPI State structure definition
108	*/
109	typedef enum
110	{
111	HAL_SPI_STATE_RESET = 0x00, /!< SPI not yet initialized or disabled /
112	HAL_SPI_STATE_READY = 0x01, /!< SPI initialized and ready for use /
113	HAL_SPI_STATE_BUSY = 0x02, /!< SPI process is ongoing /
114	HAL_SPI_STATE_BUSY_TX = 0x12, /!< Data Transmission process is ongoing /
115	HAL_SPI_STATE_BUSY_RX = 0x22, /!< Data Reception process is ongoing /
116	HAL_SPI_STATE_BUSY_TX_RX = 0x32, /!< Data Transmission and Reception process is ongoing /
117	HAL_SPI_STATE_ERROR = 0x03 /!< SPI error state /
118
119	}HAL_SPI_StateTypeDef;
120
121	/**
122	* @brief SPI handle Structure definition
123	*/
124	typedef struct __SPI_HandleTypeDef
125	{
126	SPI_TypeDef Instance; / SPI registers base address */
127
128	SPI_InitTypeDef Init; /* SPI communication parameters */
129
130	uint8_t pTxBuffPtr; / Pointer to SPI Tx transfer Buffer */
131
132	uint16_t TxXferSize; /* SPI Tx transfer size */
133
134	uint16_t TxXferCount; /* SPI Tx Transfer Counter */
135
136	uint8_t pRxBuffPtr; / Pointer to SPI Rx transfer Buffer */
137
138	uint16_t RxXferSize; /* SPI Rx transfer size */
139
140	uint16_t RxXferCount; /* SPI Rx Transfer Counter */
141
142	DMA_HandleTypeDef hdmatx; / SPI Tx DMA handle parameters */
143
144	DMA_HandleTypeDef hdmarx; / SPI Rx DMA handle parameters */
145
146	void (RxISR)(struct __SPI_HandleTypeDef hspi); /* function pointer on Rx ISR */
147
148	void (TxISR)(struct __SPI_HandleTypeDef hspi); /* function pointer on Tx ISR */
149
150	HAL_LockTypeDef Lock; /* SPI locking object */
151
152	__IO HAL_SPI_StateTypeDef State; /* SPI communication state */
153
154	__IO uint32_t ErrorCode; /* SPI Error code */
155
156	}SPI_HandleTypeDef;
157	/**
158	* @}
159	*/
160
161	/* Exported constants --------------------------------------------------------*/
162	/** @defgroup SPI_Exported_Constants SPI Exported Constants
163	* @{
164	*/
165
166	/** @defgroup SPI_Error_Code SPI Error Code
167	* @brief SPI Error Code
168	* @{
169	*/
170	#define HAL_SPI_ERROR_NONE ((uint32_t)0x00000000) /!< No error /
171	#define HAL_SPI_ERROR_MODF ((uint32_t)0x00000001) /!< MODF error /
172	#define HAL_SPI_ERROR_CRC ((uint32_t)0x00000002) /!< CRC error /
173	#define HAL_SPI_ERROR_OVR ((uint32_t)0x00000004) /!< OVR error /
174	#define HAL_SPI_ERROR_FRE ((uint32_t)0x00000008) /!< FRE error /
175	#define HAL_SPI_ERROR_DMA ((uint32_t)0x00000010) /!< DMA transfer error /
176	#define HAL_SPI_ERROR_FLAG ((uint32_t)0x00000020) /!< Flag: RXNE,TXE, BSY /
177	/**
178	* @}
179	*/
180
181	/** @defgroup SPI_mode SPI Mode
182	* @{
183	*/
184	#define SPI_MODE_SLAVE ((uint32_t)0x00000000)
185	#define SPI_MODE_MASTER (SPI_CR1_MSTR \| SPI_CR1_SSI)
186	/**
187	* @}
188	*/
189
190	/** @defgroup SPI_Direction_mode SPI Direction Mode
191	* @{
192	*/
193	#define SPI_DIRECTION_2LINES ((uint32_t)0x00000000)
194	#define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY
195	#define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE
196	/**
197	* @}
198	*/
199
200	/** @defgroup SPI_data_size SPI Data Size
201	* @{
202	*/
203	#define SPI_DATASIZE_8BIT ((uint32_t)0x00000000)
204	#define SPI_DATASIZE_16BIT SPI_CR1_DFF
205	/**
206	* @}
207	*/
208
209	/** @defgroup SPI_Clock_Polarity SPI Clock Polarity
210	* @{
211	*/
212	#define SPI_POLARITY_LOW ((uint32_t)0x00000000)
213	#define SPI_POLARITY_HIGH SPI_CR1_CPOL
214	/**
215	* @}
216	*/
217
218	/** @defgroup SPI_Clock_Phase SPI Clock Phase
219	* @{
220	*/
221	#define SPI_PHASE_1EDGE ((uint32_t)0x00000000)
222	#define SPI_PHASE_2EDGE SPI_CR1_CPHA
223	/**
224	* @}
225	*/
226
227	/** @defgroup SPI_Slave_Select_management SPI Slave Select Management
228	* @{
229	*/
230	#define SPI_NSS_SOFT SPI_CR1_SSM
231	#define SPI_NSS_HARD_INPUT ((uint32_t)0x00000000)
232	#define SPI_NSS_HARD_OUTPUT ((uint32_t)0x00040000)
233	/**
234	* @}
235	*/
236
237	/** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler
238	* @{
239	*/
240	#define SPI_BAUDRATEPRESCALER_2 ((uint32_t)0x00000000)
241	#define SPI_BAUDRATEPRESCALER_4 ((uint32_t)0x00000008)
242	#define SPI_BAUDRATEPRESCALER_8 ((uint32_t)0x00000010)
243	#define SPI_BAUDRATEPRESCALER_16 ((uint32_t)0x00000018)
244	#define SPI_BAUDRATEPRESCALER_32 ((uint32_t)0x00000020)
245	#define SPI_BAUDRATEPRESCALER_64 ((uint32_t)0x00000028)
246	#define SPI_BAUDRATEPRESCALER_128 ((uint32_t)0x00000030)
247	#define SPI_BAUDRATEPRESCALER_256 ((uint32_t)0x00000038)
248	/**
249	* @}
250	*/
251
252	/** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB Transsmission
253	* @{
254	*/
255	#define SPI_FIRSTBIT_MSB ((uint32_t)0x00000000)
256	#define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST
257	/**
258	* @}
259	*/
260
261	/** @defgroup SPI_TI_mode SPI TI Mode
262	* @{
263	*/
264	#define SPI_TIMODE_DISABLE ((uint32_t)0x00000000)
265	#define SPI_TIMODE_ENABLE SPI_CR2_FRF
266	/**
267	* @}
268	*/
269
270	/** @defgroup SPI_CRC_Calculation SPI CRC Calculation
271	* @{
272	*/
273	#define SPI_CRCCALCULATION_DISABLE ((uint32_t)0x00000000)
274	#define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN
275	/**
276	* @}
277	*/
278
279	/** @defgroup SPI_Interrupt_definition SPI Interrupt Definition
280	* @{
281	*/
282	#define SPI_IT_TXE SPI_CR2_TXEIE
283	#define SPI_IT_RXNE SPI_CR2_RXNEIE
284	#define SPI_IT_ERR SPI_CR2_ERRIE
285	/**
286	* @}
287	*/
288
289	/** @defgroup SPI_Flags_definition SPI Flags Definition
290	* @{
291	*/
292	#define SPI_FLAG_RXNE SPI_SR_RXNE
293	#define SPI_FLAG_TXE SPI_SR_TXE
294	#define SPI_FLAG_CRCERR SPI_SR_CRCERR
295	#define SPI_FLAG_MODF SPI_SR_MODF
296	#define SPI_FLAG_OVR SPI_SR_OVR
297	#define SPI_FLAG_BSY SPI_SR_BSY
298	#define SPI_FLAG_FRE SPI_SR_FRE
299	/**
300	* @}
301	*/
302
303	/**
304	* @}
305	*/
306
307	/* Exported macro ------------------------------------------------------------*/
308	/** @defgroup SPI_Exported_Macros SPI Exported Macros
309	* @{
310	*/
311	/** @brief Reset SPI handle state
312	* @param __HANDLE__: specifies the SPI handle.
313	* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
314	* @retval None
315	*/
316	#define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET)
317
318	/** @brief Enable or disable the specified SPI interrupts.
319	* @param __HANDLE__: specifies the SPI handle.
320	* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
321	* @param __INTERRUPT__: specifies the interrupt source to enable or disable.
322	* This parameter can be one of the following values:
323	* @arg SPI_IT_TXE: Tx buffer empty interrupt enable
324	* @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
325	* @arg SPI_IT_ERR: Error interrupt enable
326	* @retval None
327	*/
328	#define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 \|= (__INTERRUPT__))
329	#define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__)))
330
331	/** @brief Check if the specified SPI interrupt source is enabled or disabled.
332	* @param __HANDLE__: specifies the SPI handle.
333	* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
334	* @param __INTERRUPT__: specifies the SPI interrupt source to check.
335	* This parameter can be one of the following values:
336	* @arg SPI_IT_TXE: Tx buffer empty interrupt enable
337	* @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
338	* @arg SPI_IT_ERR: Error interrupt enable
339	* @retval The new state of __IT__ (TRUE or FALSE).
340	*/
341	#define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
342
343	/** @brief Check whether the specified SPI flag is set or not.
344	* @param __HANDLE__: specifies the SPI handle.
345	* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
346	* @param __FLAG__: specifies the flag to check.
347	* This parameter can be one of the following values:
348	* @arg SPI_FLAG_RXNE: Receive buffer not empty flag
349	* @arg SPI_FLAG_TXE: Transmit buffer empty flag
350	* @arg SPI_FLAG_CRCERR: CRC error flag
351	* @arg SPI_FLAG_MODF: Mode fault flag
352	* @arg SPI_FLAG_OVR: Overrun flag
353	* @arg SPI_FLAG_BSY: Busy flag
354	* @arg SPI_FLAG_FRE: Frame format error flag
355	* @retval The new state of __FLAG__ (TRUE or FALSE).
356	*/
357	#define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
358
359	/** @brief Clear the SPI CRCERR pending flag.
360	* @param __HANDLE__: specifies the SPI handle.
361	* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
362	* @retval None
363	*/
364	#define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = ~(SPI_FLAG_CRCERR))
365
366	/** @brief Clear the SPI MODF pending flag.
367	* @param __HANDLE__: specifies the SPI handle.
368	* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
369	* @retval None
370	*/
371	#define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \
372	do{ \
373	__IO uint32_t tmpreg; \
374	tmpreg = (__HANDLE__)->Instance->SR; \
375	(__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE); \
376	UNUSED(tmpreg); \
377	} while(0)
378
379	/** @brief Clear the SPI OVR pending flag.
380	* @param __HANDLE__: specifies the SPI handle.
381	* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
382	* @retval None
383	*/
384	#define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \
385	do{ \
386	__IO uint32_t tmpreg; \
387	tmpreg = (__HANDLE__)->Instance->DR; \
388	tmpreg = (__HANDLE__)->Instance->SR; \
389	UNUSED(tmpreg); \
390	} while(0)
391
392	/** @brief Clear the SPI FRE pending flag.
393	* @param __HANDLE__: specifies the SPI handle.
394	* This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
395	* @retval None
396	*/
397	#define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) \
398	do{ \
399	__IO uint32_t tmpreg; \
400	tmpreg = (__HANDLE__)->Instance->SR; \
401	UNUSED(tmpreg); \
402	}while(0)
403
404	/** @brief Enable SPI
405	* @param __HANDLE__: specifies the SPI Handle.
406	* @retval None
407	*/
408	#define __HAL_SPI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 \|= SPI_CR1_SPE)
409
410	/** @brief Disable SPI
411	* @param __HANDLE__: specifies the SPI Handle.
412	* @retval None
413	*/
414	#define __HAL_SPI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SPI_CR1_SPE)
415	/**
416	* @}
417	*/
418
419	/* Exported functions --------------------------------------------------------*/
420	/** @addtogroup SPI_Exported_Functions
421	* @{
422	*/
423
424	/** @addtogroup SPI_Exported_Functions_Group1
425	* @{
426	*/
427	/* Initialization/de-initialization functions **********************************/
428	HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi);
429	HAL_StatusTypeDef HAL_SPI_DeInit (SPI_HandleTypeDef *hspi);
430	void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi);
431	void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi);
432	/**
433	* @}
434	*/
435
436	/** @addtogroup SPI_Exported_Functions_Group2
437	* @{
438	*/
439	/* I/O operation functions *****************************************************/
440	HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef hspi, uint8_t pData, uint16_t Size, uint32_t Timeout);
441	HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef hspi, uint8_t pData, uint16_t Size, uint32_t Timeout);
442	HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef hspi, uint8_t pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
443	HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef hspi, uint8_t pData, uint16_t Size);
444	HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef hspi, uint8_t pData, uint16_t Size);
445	HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef hspi, uint8_t pTxData, uint8_t *pRxData, uint16_t Size);
446	HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef hspi, uint8_t pData, uint16_t Size);
447	HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef hspi, uint8_t pData, uint16_t Size);
448	HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef hspi, uint8_t pTxData, uint8_t *pRxData, uint16_t Size);
449	HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi);
450	HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi);
451	HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi);
452
453	void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi);
454	void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi);
455	void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi);
456	void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi);
457	void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi);
458	void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi);
459	void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi);
460	void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi);
461	/**
462	* @}
463	*/
464
465	/** @addtogroup SPI_Exported_Functions_Group3
466	* @{
467	*/
468	/* Peripheral State and Control functions **************************************/
469	HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi);
470	uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi);
471
472	/**
473	* @}
474	*/
475
476	/**
477	* @}
478	*/
479
480	/* Private types -------------------------------------------------------------*/
481	/* Private variables ---------------------------------------------------------*/
482	/* Private constants ---------------------------------------------------------*/
483	/** @defgroup SPI_Private_Constants SPI Private Constants
484	* @{
485	*/
486	/**
487	* @}
488	*/
489
490	/* Private macros ------------------------------------------------------------*/
491	/** @defgroup SPI_Private_Macros SPI Private Macros
492	* @{
493	*/
494
495	#define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) \|\| \
496	((MODE) == SPI_MODE_MASTER))
497
498
499	#define IS_SPI_DIRECTION_MODE(MODE) (((MODE) == SPI_DIRECTION_2LINES) \|\| \
500	((MODE) == SPI_DIRECTION_2LINES_RXONLY) \|\| \
501	((MODE) == SPI_DIRECTION_1LINE))
502
503	#define IS_SPI_DIRECTION_2LINES_OR_1LINE(MODE) (((MODE) == SPI_DIRECTION_2LINES) \|\| \
504	((MODE) == SPI_DIRECTION_1LINE))
505
506	#define IS_SPI_DIRECTION_2LINES(MODE) ((MODE) == SPI_DIRECTION_2LINES)
507
508	#define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DATASIZE_16BIT) \|\| \
509	((DATASIZE) == SPI_DATASIZE_8BIT))
510
511	#define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_POLARITY_LOW) \|\| \
512	((CPOL) == SPI_POLARITY_HIGH))
513
514	#define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_PHASE_1EDGE) \|\| \
515	((CPHA) == SPI_PHASE_2EDGE))
516
517	#define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_SOFT) \|\| \
518	((NSS) == SPI_NSS_HARD_INPUT) \|\| \
519	((NSS) == SPI_NSS_HARD_OUTPUT))
520
521	#define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2) \|\| \
522	((PRESCALER) == SPI_BAUDRATEPRESCALER_4) \|\| \
523	((PRESCALER) == SPI_BAUDRATEPRESCALER_8) \|\| \
524	((PRESCALER) == SPI_BAUDRATEPRESCALER_16) \|\| \
525	((PRESCALER) == SPI_BAUDRATEPRESCALER_32) \|\| \
526	((PRESCALER) == SPI_BAUDRATEPRESCALER_64) \|\| \
527	((PRESCALER) == SPI_BAUDRATEPRESCALER_128) \|\| \
528	((PRESCALER) == SPI_BAUDRATEPRESCALER_256))
529
530	#define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FIRSTBIT_MSB) \|\| \
531	((BIT) == SPI_FIRSTBIT_LSB))
532
533	#define IS_SPI_TIMODE(MODE) (((MODE) == SPI_TIMODE_DISABLE) \|\| \
534	((MODE) == SPI_TIMODE_ENABLE))
535
536	#define IS_SPI_CRC_CALCULATION(CALCULATION) (((CALCULATION) == SPI_CRCCALCULATION_DISABLE) \|\| \
537	((CALCULATION) == SPI_CRCCALCULATION_ENABLE))
538
539	#define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (((POLYNOMIAL) >= 0x1) && ((POLYNOMIAL) <= 0xFFFF))
540
541	#define SPI_1LINE_TX(__HANDLE__) ((__HANDLE__)->Instance->CR1 \|= SPI_CR1_BIDIOE)
542
543	#define SPI_1LINE_RX(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SPI_CR1_BIDIOE)
544
545	#define SPI_RESET_CRC(__HANDLE__) do{(__HANDLE__)->Instance->CR1 &= (~SPI_CR1_CRCEN);\
546	(__HANDLE__)->Instance->CR1 \|= SPI_CR1_CRCEN;}while(0)
547	/**
548	* @}
549	*/
550
551	/* Private functions ---------------------------------------------------------*/
552	/** @defgroup SPI_Private_Functions SPI Private Functions
553	* @{
554	*/
555
556	/**
557	* @}
558	*/
559
560	/**
561	* @}
562	*/
563
564	/**
565	* @}
566	*/
567
568
569	#ifdef __cplusplus
570	}
571	#endif
572
573	#endif /* __STM32F4xx_HAL_SPI_H */
574
575	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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