source: asp3_wo_tecs/trunk/arch/arm_m_gcc/stm32f4xx_stm32cube/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sdram.h@ 303

Last change on this file since 303 was 303, checked in by ertl-honda, 7 years ago

nucleo_f401re依存部の追加
File size: 7.6 KB
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1/**
2 ******************************************************************************
3 * @file stm32f4xx_hal_sdram.h
4 * @author MCD Application Team
5 * @version V1.4.1
6 * @date 09-October-2015
7 * @brief Header file of SDRAM HAL module.
8 ******************************************************************************
9 * @attention
10 *
11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
12 *
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 ******************************************************************************
36 */
37
38/* Define to prevent recursive inclusion -------------------------------------*/
39#ifndef __STM32F4xx_HAL_SDRAM_H
40#define __STM32F4xx_HAL_SDRAM_H
41
42#ifdef __cplusplus
43 extern "C" {
44#endif
45
46#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
47 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
48
49/* Includes ------------------------------------------------------------------*/
50#include "stm32f4xx_ll_fmc.h"
51
52/** @addtogroup STM32F4xx_HAL_Driver
53 * @{
54 */
55
56/** @addtogroup SDRAM
57 * @{
58 */
59
60/* Exported typedef ----------------------------------------------------------*/
61/** @defgroup SDRAM_Exported_Types SDRAM Exported Types
62 * @{
63 */
64
65/**
66 * @brief HAL SDRAM State structure definition
67 */
68typedef enum
69{
70 HAL_SDRAM_STATE_RESET = 0x00, /*!< SDRAM not yet initialized or disabled */
71 HAL_SDRAM_STATE_READY = 0x01, /*!< SDRAM initialized and ready for use */
72 HAL_SDRAM_STATE_BUSY = 0x02, /*!< SDRAM internal process is ongoing */
73 HAL_SDRAM_STATE_ERROR = 0x03, /*!< SDRAM error state */
74 HAL_SDRAM_STATE_WRITE_PROTECTED = 0x04, /*!< SDRAM device write protected */
75 HAL_SDRAM_STATE_PRECHARGED = 0x05 /*!< SDRAM device precharged */
76
77}HAL_SDRAM_StateTypeDef;
78
79/**
80 * @brief SDRAM handle Structure definition
81 */
82typedef struct
83{
84 FMC_SDRAM_TypeDef *Instance; /*!< Register base address */
85
86 FMC_SDRAM_InitTypeDef Init; /*!< SDRAM device configuration parameters */
87
88 __IO HAL_SDRAM_StateTypeDef State; /*!< SDRAM access state */
89
90 HAL_LockTypeDef Lock; /*!< SDRAM locking object */
91
92 DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */
93
94}SDRAM_HandleTypeDef;
95/**
96 * @}
97 */
98
99/* Exported constants --------------------------------------------------------*/
100/* Exported macro ------------------------------------------------------------*/
101/** @defgroup SDRAM_Exported_Macros SDRAM Exported Macros
102 * @{
103 */
104
105/** @brief Reset SDRAM handle state
106 * @param __HANDLE__: specifies the SDRAM handle.
107 * @retval None
108 */
109#define __HAL_SDRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SDRAM_STATE_RESET)
110/**
111 * @}
112 */
113
114/* Exported functions --------------------------------------------------------*/
115/** @addtogroup SDRAM_Exported_Functions SDRAM Exported Functions
116 * @{
117 */
118
119/** @addtogroup SDRAM_Exported_Functions_Group1
120 * @{
121 */
122
123/* Initialization/de-initialization functions *********************************/
124HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing);
125HAL_StatusTypeDef HAL_SDRAM_DeInit(SDRAM_HandleTypeDef *hsdram);
126void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram);
127void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram);
128
129void HAL_SDRAM_IRQHandler(SDRAM_HandleTypeDef *hsdram);
130void HAL_SDRAM_RefreshErrorCallback(SDRAM_HandleTypeDef *hsdram);
131void HAL_SDRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
132void HAL_SDRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
133/**
134 * @}
135 */
136
137/** @addtogroup SDRAM_Exported_Functions_Group2
138 * @{
139 */
140/* I/O operation functions ****************************************************/
141HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
142HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
143HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
144HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
145HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
146HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
147
148HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t * pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
149HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
150/**
151 * @}
152 */
153
154/** @addtogroup SDRAM_Exported_Functions_Group3
155 * @{
156 */
157/* SDRAM Control functions *****************************************************/
158HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Enable(SDRAM_HandleTypeDef *hsdram);
159HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef *hsdram);
160HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout);
161HAL_StatusTypeDef HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef *hsdram, uint32_t RefreshRate);
162HAL_StatusTypeDef HAL_SDRAM_SetAutoRefreshNumber(SDRAM_HandleTypeDef *hsdram, uint32_t AutoRefreshNumber);
163uint32_t HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram);
164/**
165 * @}
166 */
167
168/** @addtogroup SDRAM_Exported_Functions_Group4
169 * @{
170 */
171/* SDRAM State functions ********************************************************/
172HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram);
173/**
174 * @}
175 */
176
177/**
178 * @}
179 */
180
181/**
182 * @}
183 */
184
185#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
186
187/**
188 * @}
189 */
190
191#ifdef __cplusplus
192}
193#endif
194
195#endif /* __STM32F4xx_HAL_SDRAM_H */
196
197/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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