source: asp3_wo_tecs/trunk/arch/arm_m_gcc/stm32f4xx_stm32cube/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_sd.h@ 303

Last change on this file since 303 was 303, checked in by ertl-honda, 7 years ago

nucleo_f401re依存部の追加

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1/**
2 ******************************************************************************
3 * @file stm32f4xx_hal_sd.h
4 * @author MCD Application Team
5 * @version V1.4.1
6 * @date 09-October-2015
7 * @brief Header file of SD HAL module.
8 ******************************************************************************
9 * @attention
10 *
11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
12 *
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 ******************************************************************************
36 */
37
38/* Define to prevent recursive inclusion -------------------------------------*/
39#ifndef __STM32F4xx_HAL_SD_H
40#define __STM32F4xx_HAL_SD_H
41
42#ifdef __cplusplus
43 extern "C" {
44#endif
45#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
46 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
47 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || \
48 defined(STM32F469xx) || defined(STM32F479xx)
49/* Includes ------------------------------------------------------------------*/
50#include "stm32f4xx_ll_sdmmc.h"
51
52/** @addtogroup STM32F4xx_HAL_Driver
53 * @{
54 */
55
56/** @defgroup SD SD
57 * @brief SD HAL module driver
58 * @{
59 */
60
61/* Exported types ------------------------------------------------------------*/
62/** @defgroup SD_Exported_Types SD Exported Types
63 * @{
64 */
65
66/** @defgroup SD_Exported_Types_Group1 SD Handle Structure definition
67 * @{
68 */
69#define SD_InitTypeDef SDIO_InitTypeDef
70#define SD_TypeDef SDIO_TypeDef
71
72typedef struct
73{
74 SD_TypeDef *Instance; /*!< SDIO register base address */
75
76 SD_InitTypeDef Init; /*!< SD required parameters */
77
78 HAL_LockTypeDef Lock; /*!< SD locking object */
79
80 uint32_t CardType; /*!< SD card type */
81
82 uint32_t RCA; /*!< SD relative card address */
83
84 uint32_t CSD[4]; /*!< SD card specific data table */
85
86 uint32_t CID[4]; /*!< SD card identification number table */
87
88 __IO uint32_t SdTransferCplt; /*!< SD transfer complete flag in non blocking mode */
89
90 __IO uint32_t SdTransferErr; /*!< SD transfer error flag in non blocking mode */
91
92 __IO uint32_t DmaTransferCplt; /*!< SD DMA transfer complete flag */
93
94 __IO uint32_t SdOperation; /*!< SD transfer operation (read/write) */
95
96 DMA_HandleTypeDef *hdmarx; /*!< SD Rx DMA handle parameters */
97
98 DMA_HandleTypeDef *hdmatx; /*!< SD Tx DMA handle parameters */
99
100}SD_HandleTypeDef;
101/**
102 * @}
103 */
104
105/** @defgroup SD_Exported_Types_Group2 Card Specific Data: CSD Register
106 * @{
107 */
108typedef struct
109{
110 __IO uint8_t CSDStruct; /*!< CSD structure */
111 __IO uint8_t SysSpecVersion; /*!< System specification version */
112 __IO uint8_t Reserved1; /*!< Reserved */
113 __IO uint8_t TAAC; /*!< Data read access time 1 */
114 __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */
115 __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */
116 __IO uint16_t CardComdClasses; /*!< Card command classes */
117 __IO uint8_t RdBlockLen; /*!< Max. read data block length */
118 __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */
119 __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */
120 __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */
121 __IO uint8_t DSRImpl; /*!< DSR implemented */
122 __IO uint8_t Reserved2; /*!< Reserved */
123 __IO uint32_t DeviceSize; /*!< Device Size */
124 __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */
125 __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */
126 __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */
127 __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */
128 __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */
129 __IO uint8_t EraseGrSize; /*!< Erase group size */
130 __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */
131 __IO uint8_t WrProtectGrSize; /*!< Write protect group size */
132 __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */
133 __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */
134 __IO uint8_t WrSpeedFact; /*!< Write speed factor */
135 __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */
136 __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */
137 __IO uint8_t Reserved3; /*!< Reserved */
138 __IO uint8_t ContentProtectAppli; /*!< Content protection application */
139 __IO uint8_t FileFormatGrouop; /*!< File format group */
140 __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */
141 __IO uint8_t PermWrProtect; /*!< Permanent write protection */
142 __IO uint8_t TempWrProtect; /*!< Temporary write protection */
143 __IO uint8_t FileFormat; /*!< File format */
144 __IO uint8_t ECC; /*!< ECC code */
145 __IO uint8_t CSD_CRC; /*!< CSD CRC */
146 __IO uint8_t Reserved4; /*!< Always 1 */
147
148}HAL_SD_CSDTypedef;
149/**
150 * @}
151 */
152
153/** @defgroup SD_Exported_Types_Group3 Card Identification Data: CID Register
154 * @{
155 */
156typedef struct
157{
158 __IO uint8_t ManufacturerID; /*!< Manufacturer ID */
159 __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */
160 __IO uint32_t ProdName1; /*!< Product Name part1 */
161 __IO uint8_t ProdName2; /*!< Product Name part2 */
162 __IO uint8_t ProdRev; /*!< Product Revision */
163 __IO uint32_t ProdSN; /*!< Product Serial Number */
164 __IO uint8_t Reserved1; /*!< Reserved1 */
165 __IO uint16_t ManufactDate; /*!< Manufacturing Date */
166 __IO uint8_t CID_CRC; /*!< CID CRC */
167 __IO uint8_t Reserved2; /*!< Always 1 */
168
169}HAL_SD_CIDTypedef;
170/**
171 * @}
172 */
173
174/** @defgroup SD_Exported_Types_Group4 SD Card Status returned by ACMD13
175 * @{
176 */
177typedef struct
178{
179 __IO uint8_t DAT_BUS_WIDTH; /*!< Shows the currently defined data bus width */
180 __IO uint8_t SECURED_MODE; /*!< Card is in secured mode of operation */
181 __IO uint16_t SD_CARD_TYPE; /*!< Carries information about card type */
182 __IO uint32_t SIZE_OF_PROTECTED_AREA; /*!< Carries information about the capacity of protected area */
183 __IO uint8_t SPEED_CLASS; /*!< Carries information about the speed class of the card */
184 __IO uint8_t PERFORMANCE_MOVE; /*!< Carries information about the card's performance move */
185 __IO uint8_t AU_SIZE; /*!< Carries information about the card's allocation unit size */
186 __IO uint16_t ERASE_SIZE; /*!< Determines the number of AUs to be erased in one operation */
187 __IO uint8_t ERASE_TIMEOUT; /*!< Determines the timeout for any number of AU erase */
188 __IO uint8_t ERASE_OFFSET; /*!< Carries information about the erase offset */
189
190}HAL_SD_CardStatusTypedef;
191/**
192 * @}
193 */
194
195/** @defgroup SD_Exported_Types_Group5 SD Card information structure
196 * @{
197 */
198typedef struct
199{
200 HAL_SD_CSDTypedef SD_csd; /*!< SD card specific data register */
201 HAL_SD_CIDTypedef SD_cid; /*!< SD card identification number register */
202 uint64_t CardCapacity; /*!< Card capacity */
203 uint32_t CardBlockSize; /*!< Card block size */
204 uint16_t RCA; /*!< SD relative card address */
205 uint8_t CardType; /*!< SD card type */
206
207}HAL_SD_CardInfoTypedef;
208/**
209 * @}
210 */
211
212/** @defgroup SD_Exported_Types_Group6 SD Error status enumeration Structure definition
213 * @{
214 */
215typedef enum
216{
217/**
218 * @brief SD specific error defines
219 */
220 SD_CMD_CRC_FAIL = (1), /*!< Command response received (but CRC check failed) */
221 SD_DATA_CRC_FAIL = (2), /*!< Data block sent/received (CRC check failed) */
222 SD_CMD_RSP_TIMEOUT = (3), /*!< Command response timeout */
223 SD_DATA_TIMEOUT = (4), /*!< Data timeout */
224 SD_TX_UNDERRUN = (5), /*!< Transmit FIFO underrun */
225 SD_RX_OVERRUN = (6), /*!< Receive FIFO overrun */
226 SD_START_BIT_ERR = (7), /*!< Start bit not detected on all data signals in wide bus mode */
227 SD_CMD_OUT_OF_RANGE = (8), /*!< Command's argument was out of range. */
228 SD_ADDR_MISALIGNED = (9), /*!< Misaligned address */
229 SD_BLOCK_LEN_ERR = (10), /*!< Transferred block length is not allowed for the card or the number of transferred bytes does not match the block length */
230 SD_ERASE_SEQ_ERR = (11), /*!< An error in the sequence of erase command occurs. */
231 SD_BAD_ERASE_PARAM = (12), /*!< An invalid selection for erase groups */
232 SD_WRITE_PROT_VIOLATION = (13), /*!< Attempt to program a write protect block */
233 SD_LOCK_UNLOCK_FAILED = (14), /*!< Sequence or password error has been detected in unlock command or if there was an attempt to access a locked card */
234 SD_COM_CRC_FAILED = (15), /*!< CRC check of the previous command failed */
235 SD_ILLEGAL_CMD = (16), /*!< Command is not legal for the card state */
236 SD_CARD_ECC_FAILED = (17), /*!< Card internal ECC was applied but failed to correct the data */
237 SD_CC_ERROR = (18), /*!< Internal card controller error */
238 SD_GENERAL_UNKNOWN_ERROR = (19), /*!< General or unknown error */
239 SD_STREAM_READ_UNDERRUN = (20), /*!< The card could not sustain data transfer in stream read operation. */
240 SD_STREAM_WRITE_OVERRUN = (21), /*!< The card could not sustain data programming in stream mode */
241 SD_CID_CSD_OVERWRITE = (22), /*!< CID/CSD overwrite error */
242 SD_WP_ERASE_SKIP = (23), /*!< Only partial address space was erased */
243 SD_CARD_ECC_DISABLED = (24), /*!< Command has been executed without using internal ECC */
244 SD_ERASE_RESET = (25), /*!< Erase sequence was cleared before executing because an out of erase sequence command was received */
245 SD_AKE_SEQ_ERROR = (26), /*!< Error in sequence of authentication. */
246 SD_INVALID_VOLTRANGE = (27),
247 SD_ADDR_OUT_OF_RANGE = (28),
248 SD_SWITCH_ERROR = (29),
249 SD_SDIO_DISABLED = (30),
250 SD_SDIO_FUNCTION_BUSY = (31),
251 SD_SDIO_FUNCTION_FAILED = (32),
252 SD_SDIO_UNKNOWN_FUNCTION = (33),
253
254/**
255 * @brief Standard error defines
256 */
257 SD_INTERNAL_ERROR = (34),
258 SD_NOT_CONFIGURED = (35),
259 SD_REQUEST_PENDING = (36),
260 SD_REQUEST_NOT_APPLICABLE = (37),
261 SD_INVALID_PARAMETER = (38),
262 SD_UNSUPPORTED_FEATURE = (39),
263 SD_UNSUPPORTED_HW = (40),
264 SD_ERROR = (41),
265 SD_OK = (0)
266
267}HAL_SD_ErrorTypedef;
268/**
269 * @}
270 */
271
272/** @defgroup SD_Exported_Types_Group7 SD Transfer state enumeration structure
273 * @{
274 */
275typedef enum
276{
277 SD_TRANSFER_OK = 0, /*!< Transfer success */
278 SD_TRANSFER_BUSY = 1, /*!< Transfer is occurring */
279 SD_TRANSFER_ERROR = 2 /*!< Transfer failed */
280
281}HAL_SD_TransferStateTypedef;
282/**
283 * @}
284 */
285
286/** @defgroup SD_Exported_Types_Group8 SD Card State enumeration structure
287 * @{
288 */
289typedef enum
290{
291 SD_CARD_READY = ((uint32_t)0x00000001), /*!< Card state is ready */
292 SD_CARD_IDENTIFICATION = ((uint32_t)0x00000002), /*!< Card is in identification state */
293 SD_CARD_STANDBY = ((uint32_t)0x00000003), /*!< Card is in standby state */
294 SD_CARD_TRANSFER = ((uint32_t)0x00000004), /*!< Card is in transfer state */
295 SD_CARD_SENDING = ((uint32_t)0x00000005), /*!< Card is sending an operation */
296 SD_CARD_RECEIVING = ((uint32_t)0x00000006), /*!< Card is receiving operation information */
297 SD_CARD_PROGRAMMING = ((uint32_t)0x00000007), /*!< Card is in programming state */
298 SD_CARD_DISCONNECTED = ((uint32_t)0x00000008), /*!< Card is disconnected */
299 SD_CARD_ERROR = ((uint32_t)0x000000FF) /*!< Card is in error state */
300
301}HAL_SD_CardStateTypedef;
302/**
303 * @}
304 */
305
306/** @defgroup SD_Exported_Types_Group9 SD Operation enumeration structure
307 * @{
308 */
309typedef enum
310{
311 SD_READ_SINGLE_BLOCK = 0, /*!< Read single block operation */
312 SD_READ_MULTIPLE_BLOCK = 1, /*!< Read multiple blocks operation */
313 SD_WRITE_SINGLE_BLOCK = 2, /*!< Write single block operation */
314 SD_WRITE_MULTIPLE_BLOCK = 3 /*!< Write multiple blocks operation */
315
316}HAL_SD_OperationTypedef;
317/**
318 * @}
319 */
320
321/**
322 * @}
323 */
324
325/* Exported constants --------------------------------------------------------*/
326/** @defgroup SD_Exported_Constants SD Exported Constants
327 * @{
328 */
329
330/**
331 * @brief SD Commands Index
332 */
333#define SD_CMD_GO_IDLE_STATE ((uint8_t)0) /*!< Resets the SD memory card. */
334#define SD_CMD_SEND_OP_COND ((uint8_t)1) /*!< Sends host capacity support information and activates the card's initialization process. */
335#define SD_CMD_ALL_SEND_CID ((uint8_t)2) /*!< Asks any card connected to the host to send the CID numbers on the CMD line. */
336#define SD_CMD_SET_REL_ADDR ((uint8_t)3) /*!< Asks the card to publish a new relative address (RCA). */
337#define SD_CMD_SET_DSR ((uint8_t)4) /*!< Programs the DSR of all cards. */
338#define SD_CMD_SDIO_SEN_OP_COND ((uint8_t)5) /*!< Sends host capacity support information (HCS) and asks the accessed card to send its
339 operating condition register (OCR) content in the response on the CMD line. */
340#define SD_CMD_HS_SWITCH ((uint8_t)6) /*!< Checks switchable function (mode 0) and switch card function (mode 1). */
341#define SD_CMD_SEL_DESEL_CARD ((uint8_t)7) /*!< Selects the card by its own relative address and gets deselected by any other address */
342#define SD_CMD_HS_SEND_EXT_CSD ((uint8_t)8) /*!< Sends SD Memory Card interface condition, which includes host supply voltage information
343 and asks the card whether card supports voltage. */
344#define SD_CMD_SEND_CSD ((uint8_t)9) /*!< Addressed card sends its card specific data (CSD) on the CMD line. */
345#define SD_CMD_SEND_CID ((uint8_t)10) /*!< Addressed card sends its card identification (CID) on the CMD line. */
346#define SD_CMD_READ_DAT_UNTIL_STOP ((uint8_t)11) /*!< SD card doesn't support it. */
347#define SD_CMD_STOP_TRANSMISSION ((uint8_t)12) /*!< Forces the card to stop transmission. */
348#define SD_CMD_SEND_STATUS ((uint8_t)13) /*!< Addressed card sends its status register. */
349#define SD_CMD_HS_BUSTEST_READ ((uint8_t)14)
350#define SD_CMD_GO_INACTIVE_STATE ((uint8_t)15) /*!< Sends an addressed card into the inactive state. */
351#define SD_CMD_SET_BLOCKLEN ((uint8_t)16) /*!< Sets the block length (in bytes for SDSC) for all following block commands
352 (read, write, lock). Default block length is fixed to 512 Bytes. Not effective
353 for SDHS and SDXC. */
354#define SD_CMD_READ_SINGLE_BLOCK ((uint8_t)17) /*!< Reads single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of
355 fixed 512 bytes in case of SDHC and SDXC. */
356#define SD_CMD_READ_MULT_BLOCK ((uint8_t)18) /*!< Continuously transfers data blocks from card to host until interrupted by
357 STOP_TRANSMISSION command. */
358#define SD_CMD_HS_BUSTEST_WRITE ((uint8_t)19) /*!< 64 bytes tuning pattern is sent for SDR50 and SDR104. */
359#define SD_CMD_WRITE_DAT_UNTIL_STOP ((uint8_t)20) /*!< Speed class control command. */
360#define SD_CMD_SET_BLOCK_COUNT ((uint8_t)23) /*!< Specify block count for CMD18 and CMD25. */
361#define SD_CMD_WRITE_SINGLE_BLOCK ((uint8_t)24) /*!< Writes single block of size selected by SET_BLOCKLEN in case of SDSC, and a block of
362 fixed 512 bytes in case of SDHC and SDXC. */
363#define SD_CMD_WRITE_MULT_BLOCK ((uint8_t)25) /*!< Continuously writes blocks of data until a STOP_TRANSMISSION follows. */
364#define SD_CMD_PROG_CID ((uint8_t)26) /*!< Reserved for manufacturers. */
365#define SD_CMD_PROG_CSD ((uint8_t)27) /*!< Programming of the programmable bits of the CSD. */
366#define SD_CMD_SET_WRITE_PROT ((uint8_t)28) /*!< Sets the write protection bit of the addressed group. */
367#define SD_CMD_CLR_WRITE_PROT ((uint8_t)29) /*!< Clears the write protection bit of the addressed group. */
368#define SD_CMD_SEND_WRITE_PROT ((uint8_t)30) /*!< Asks the card to send the status of the write protection bits. */
369#define SD_CMD_SD_ERASE_GRP_START ((uint8_t)32) /*!< Sets the address of the first write block to be erased. (For SD card only). */
370#define SD_CMD_SD_ERASE_GRP_END ((uint8_t)33) /*!< Sets the address of the last write block of the continuous range to be erased. */
371#define SD_CMD_ERASE_GRP_START ((uint8_t)35) /*!< Sets the address of the first write block to be erased. Reserved for each command
372 system set by switch function command (CMD6). */
373#define SD_CMD_ERASE_GRP_END ((uint8_t)36) /*!< Sets the address of the last write block of the continuous range to be erased.
374 Reserved for each command system set by switch function command (CMD6). */
375#define SD_CMD_ERASE ((uint8_t)38) /*!< Reserved for SD security applications. */
376#define SD_CMD_FAST_IO ((uint8_t)39) /*!< SD card doesn't support it (Reserved). */
377#define SD_CMD_GO_IRQ_STATE ((uint8_t)40) /*!< SD card doesn't support it (Reserved). */
378#define SD_CMD_LOCK_UNLOCK ((uint8_t)42) /*!< Sets/resets the password or lock/unlock the card. The size of the data block is set by
379 the SET_BLOCK_LEN command. */
380#define SD_CMD_APP_CMD ((uint8_t)55) /*!< Indicates to the card that the next command is an application specific command rather
381 than a standard command. */
382#define SD_CMD_GEN_CMD ((uint8_t)56) /*!< Used either to transfer a data block to the card or to get a data block from the card
383 for general purpose/application specific commands. */
384#define SD_CMD_NO_CMD ((uint8_t)64)
385
386/**
387 * @brief Following commands are SD Card Specific commands.
388 * SDIO_APP_CMD should be sent before sending these commands.
389 */
390#define SD_CMD_APP_SD_SET_BUSWIDTH ((uint8_t)6) /*!< (ACMD6) Defines the data bus width to be used for data transfer. The allowed data bus
391 widths are given in SCR register. */
392#define SD_CMD_SD_APP_STATUS ((uint8_t)13) /*!< (ACMD13) Sends the SD status. */
393#define SD_CMD_SD_APP_SEND_NUM_WRITE_BLOCKS ((uint8_t)22) /*!< (ACMD22) Sends the number of the written (without errors) write blocks. Responds with
394 32bit+CRC data block. */
395#define SD_CMD_SD_APP_OP_COND ((uint8_t)41) /*!< (ACMD41) Sends host capacity support information (HCS) and asks the accessed card to
396 send its operating condition register (OCR) content in the response on the CMD line. */
397#define SD_CMD_SD_APP_SET_CLR_CARD_DETECT ((uint8_t)42) /*!< (ACMD42) Connects/Disconnects the 50 KOhm pull-up resistor on CD/DAT3 (pin 1) of the card. */
398#define SD_CMD_SD_APP_SEND_SCR ((uint8_t)51) /*!< Reads the SD Configuration Register (SCR). */
399#define SD_CMD_SDIO_RW_DIRECT ((uint8_t)52) /*!< For SD I/O card only, reserved for security specification. */
400#define SD_CMD_SDIO_RW_EXTENDED ((uint8_t)53) /*!< For SD I/O card only, reserved for security specification. */
401
402/**
403 * @brief Following commands are SD Card Specific security commands.
404 * SD_CMD_APP_CMD should be sent before sending these commands.
405 */
406#define SD_CMD_SD_APP_GET_MKB ((uint8_t)43) /*!< For SD card only */
407#define SD_CMD_SD_APP_GET_MID ((uint8_t)44) /*!< For SD card only */
408#define SD_CMD_SD_APP_SET_CER_RN1 ((uint8_t)45) /*!< For SD card only */
409#define SD_CMD_SD_APP_GET_CER_RN2 ((uint8_t)46) /*!< For SD card only */
410#define SD_CMD_SD_APP_SET_CER_RES2 ((uint8_t)47) /*!< For SD card only */
411#define SD_CMD_SD_APP_GET_CER_RES1 ((uint8_t)48) /*!< For SD card only */
412#define SD_CMD_SD_APP_SECURE_READ_MULTIPLE_BLOCK ((uint8_t)18) /*!< For SD card only */
413#define SD_CMD_SD_APP_SECURE_WRITE_MULTIPLE_BLOCK ((uint8_t)25) /*!< For SD card only */
414#define SD_CMD_SD_APP_SECURE_ERASE ((uint8_t)38) /*!< For SD card only */
415#define SD_CMD_SD_APP_CHANGE_SECURE_AREA ((uint8_t)49) /*!< For SD card only */
416#define SD_CMD_SD_APP_SECURE_WRITE_MKB ((uint8_t)48) /*!< For SD card only */
417
418/**
419 * @brief Supported SD Memory Cards
420 */
421#define STD_CAPACITY_SD_CARD_V1_1 ((uint32_t)0x00000000)
422#define STD_CAPACITY_SD_CARD_V2_0 ((uint32_t)0x00000001)
423#define HIGH_CAPACITY_SD_CARD ((uint32_t)0x00000002)
424#define MULTIMEDIA_CARD ((uint32_t)0x00000003)
425#define SECURE_DIGITAL_IO_CARD ((uint32_t)0x00000004)
426#define HIGH_SPEED_MULTIMEDIA_CARD ((uint32_t)0x00000005)
427#define SECURE_DIGITAL_IO_COMBO_CARD ((uint32_t)0x00000006)
428#define HIGH_CAPACITY_MMC_CARD ((uint32_t)0x00000007)
429/**
430 * @}
431 */
432
433/* Exported macro ------------------------------------------------------------*/
434/** @defgroup SD_Exported_macros SD Exported Macros
435 * @brief macros to handle interrupts and specific clock configurations
436 * @{
437 */
438
439/**
440 * @brief Enable the SD device.
441 * @retval None
442 */
443#define __HAL_SD_SDIO_ENABLE() __SDIO_ENABLE()
444
445/**
446 * @brief Disable the SD device.
447 * @retval None
448 */
449#define __HAL_SD_SDIO_DISABLE() __SDIO_DISABLE()
450
451/**
452 * @brief Enable the SDIO DMA transfer.
453 * @retval None
454 */
455#define __HAL_SD_SDIO_DMA_ENABLE() __SDIO_DMA_ENABLE()
456
457/**
458 * @brief Disable the SDIO DMA transfer.
459 * @retval None
460 */
461#define __HAL_SD_SDIO_DMA_DISABLE() __SDIO_DMA_DISABLE()
462
463/**
464 * @brief Enable the SD device interrupt.
465 * @param __HANDLE__: SD Handle
466 * @param __INTERRUPT__: specifies the SDIO interrupt sources to be enabled.
467 * This parameter can be one or a combination of the following values:
468 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
469 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
470 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
471 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
472 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
473 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
474 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
475 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
476 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
477 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
478 * bus mode interrupt
479 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
480 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
481 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
482 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
483 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
484 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
485 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
486 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
487 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
488 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
489 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
490 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
491 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
492 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
493 * @retval None
494 */
495#define __HAL_SD_SDIO_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
496
497/**
498 * @brief Disable the SD device interrupt.
499 * @param __HANDLE__: SD Handle
500 * @param __INTERRUPT__: specifies the SDIO interrupt sources to be disabled.
501 * This parameter can be one or a combination of the following values:
502 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
503 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
504 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
505 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
506 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
507 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
508 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
509 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
510 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
511 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
512 * bus mode interrupt
513 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
514 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
515 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
516 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
517 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
518 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
519 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
520 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
521 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
522 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
523 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
524 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
525 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
526 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
527 * @retval None
528 */
529#define __HAL_SD_SDIO_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDIO_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__))
530
531/**
532 * @brief Check whether the specified SD flag is set or not.
533 * @param __HANDLE__: SD Handle
534 * @param __FLAG__: specifies the flag to check.
535 * This parameter can be one of the following values:
536 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
537 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
538 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout
539 * @arg SDIO_FLAG_DTIMEOUT: Data timeout
540 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
541 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
542 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
543 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
544 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
545 * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide bus mode.
546 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
547 * @arg SDIO_FLAG_CMDACT: Command transfer in progress
548 * @arg SDIO_FLAG_TXACT: Data transmit in progress
549 * @arg SDIO_FLAG_RXACT: Data receive in progress
550 * @arg SDIO_FLAG_TXFIFOHE: Transmit FIFO Half Empty
551 * @arg SDIO_FLAG_RXFIFOHF: Receive FIFO Half Full
552 * @arg SDIO_FLAG_TXFIFOF: Transmit FIFO full
553 * @arg SDIO_FLAG_RXFIFOF: Receive FIFO full
554 * @arg SDIO_FLAG_TXFIFOE: Transmit FIFO empty
555 * @arg SDIO_FLAG_RXFIFOE: Receive FIFO empty
556 * @arg SDIO_FLAG_TXDAVL: Data available in transmit FIFO
557 * @arg SDIO_FLAG_RXDAVL: Data available in receive FIFO
558 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
559 * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61
560 * @retval The new state of SD FLAG (SET or RESET).
561 */
562#define __HAL_SD_SDIO_GET_FLAG(__HANDLE__, __FLAG__) __SDIO_GET_FLAG((__HANDLE__)->Instance, (__FLAG__))
563
564/**
565 * @brief Clear the SD's pending flags.
566 * @param __HANDLE__: SD Handle
567 * @param __FLAG__: specifies the flag to clear.
568 * This parameter can be one or a combination of the following values:
569 * @arg SDIO_FLAG_CCRCFAIL: Command response received (CRC check failed)
570 * @arg SDIO_FLAG_DCRCFAIL: Data block sent/received (CRC check failed)
571 * @arg SDIO_FLAG_CTIMEOUT: Command response timeout
572 * @arg SDIO_FLAG_DTIMEOUT: Data timeout
573 * @arg SDIO_FLAG_TXUNDERR: Transmit FIFO underrun error
574 * @arg SDIO_FLAG_RXOVERR: Received FIFO overrun error
575 * @arg SDIO_FLAG_CMDREND: Command response received (CRC check passed)
576 * @arg SDIO_FLAG_CMDSENT: Command sent (no response required)
577 * @arg SDIO_FLAG_DATAEND: Data end (data counter, SDIDCOUNT, is zero)
578 * @arg SDIO_FLAG_STBITERR: Start bit not detected on all data signals in wide bus mode
579 * @arg SDIO_FLAG_DBCKEND: Data block sent/received (CRC check passed)
580 * @arg SDIO_FLAG_SDIOIT: SD I/O interrupt received
581 * @arg SDIO_FLAG_CEATAEND: CE-ATA command completion signal received for CMD61
582 * @retval None
583 */
584#define __HAL_SD_SDIO_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDIO_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__))
585
586/**
587 * @brief Check whether the specified SD interrupt has occurred or not.
588 * @param __HANDLE__: SD Handle
589 * @param __INTERRUPT__: specifies the SDIO interrupt source to check.
590 * This parameter can be one of the following values:
591 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
592 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
593 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
594 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
595 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
596 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
597 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
598 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
599 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIDCOUNT, is zero) interrupt
600 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
601 * bus mode interrupt
602 * @arg SDIO_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt
603 * @arg SDIO_IT_CMDACT: Command transfer in progress interrupt
604 * @arg SDIO_IT_TXACT: Data transmit in progress interrupt
605 * @arg SDIO_IT_RXACT: Data receive in progress interrupt
606 * @arg SDIO_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt
607 * @arg SDIO_IT_RXFIFOHF: Receive FIFO Half Full interrupt
608 * @arg SDIO_IT_TXFIFOF: Transmit FIFO full interrupt
609 * @arg SDIO_IT_RXFIFOF: Receive FIFO full interrupt
610 * @arg SDIO_IT_TXFIFOE: Transmit FIFO empty interrupt
611 * @arg SDIO_IT_RXFIFOE: Receive FIFO empty interrupt
612 * @arg SDIO_IT_TXDAVL: Data available in transmit FIFO interrupt
613 * @arg SDIO_IT_RXDAVL: Data available in receive FIFO interrupt
614 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
615 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61 interrupt
616 * @retval The new state of SD IT (SET or RESET).
617 */
618#define __HAL_SD_SDIO_GET_IT (__HANDLE__, __INTERRUPT__) __SDIO_GET_IT ((__HANDLE__)->Instance, __INTERRUPT__)
619
620/**
621 * @brief Clear the SD's interrupt pending bits.
622 * @param __HANDLE__ : SD Handle
623 * @param __INTERRUPT__: specifies the interrupt pending bit to clear.
624 * This parameter can be one or a combination of the following values:
625 * @arg SDIO_IT_CCRCFAIL: Command response received (CRC check failed) interrupt
626 * @arg SDIO_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt
627 * @arg SDIO_IT_CTIMEOUT: Command response timeout interrupt
628 * @arg SDIO_IT_DTIMEOUT: Data timeout interrupt
629 * @arg SDIO_IT_TXUNDERR: Transmit FIFO underrun error interrupt
630 * @arg SDIO_IT_RXOVERR: Received FIFO overrun error interrupt
631 * @arg SDIO_IT_CMDREND: Command response received (CRC check passed) interrupt
632 * @arg SDIO_IT_CMDSENT: Command sent (no response required) interrupt
633 * @arg SDIO_IT_DATAEND: Data end (data counter, SDIO_DCOUNT, is zero) interrupt
634 * @arg SDIO_IT_STBITERR: Start bit not detected on all data signals in wide
635 * bus mode interrupt
636 * @arg SDIO_IT_SDIOIT: SD I/O interrupt received interrupt
637 * @arg SDIO_IT_CEATAEND: CE-ATA command completion signal received for CMD61
638 * @retval None
639 */
640#define __HAL_SD_SDIO_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDIO_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__))
641/**
642 * @}
643 */
644
645/* Exported functions --------------------------------------------------------*/
646/** @defgroup SD_Exported_Functions SD Exported Functions
647 * @{
648 */
649
650/** @defgroup SD_Exported_Functions_Group1 Initialization and de-initialization functions
651 * @{
652 */
653HAL_SD_ErrorTypedef HAL_SD_Init(SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypedef *SDCardInfo);
654HAL_StatusTypeDef HAL_SD_DeInit (SD_HandleTypeDef *hsd);
655void HAL_SD_MspInit(SD_HandleTypeDef *hsd);
656void HAL_SD_MspDeInit(SD_HandleTypeDef *hsd);
657/**
658 * @}
659 */
660
661/** @defgroup SD_Exported_Functions_Group2 I/O operation functions
662 * @{
663 */
664/* Blocking mode: Polling */
665HAL_SD_ErrorTypedef HAL_SD_ReadBlocks(SD_HandleTypeDef *hsd, uint32_t *pReadBuffer, uint64_t ReadAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
666HAL_SD_ErrorTypedef HAL_SD_WriteBlocks(SD_HandleTypeDef *hsd, uint32_t *pWriteBuffer, uint64_t WriteAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
667HAL_SD_ErrorTypedef HAL_SD_Erase(SD_HandleTypeDef *hsd, uint64_t startaddr, uint64_t endaddr);
668
669/* Non-Blocking mode: Interrupt */
670void HAL_SD_IRQHandler(SD_HandleTypeDef *hsd);
671
672/* Callback in non blocking modes (DMA) */
673void HAL_SD_DMA_RxCpltCallback(DMA_HandleTypeDef *hdma);
674void HAL_SD_DMA_RxErrorCallback(DMA_HandleTypeDef *hdma);
675void HAL_SD_DMA_TxCpltCallback(DMA_HandleTypeDef *hdma);
676void HAL_SD_DMA_TxErrorCallback(DMA_HandleTypeDef *hdma);
677void HAL_SD_XferCpltCallback(SD_HandleTypeDef *hsd);
678void HAL_SD_XferErrorCallback(SD_HandleTypeDef *hsd);
679
680/* Non-Blocking mode: DMA */
681HAL_SD_ErrorTypedef HAL_SD_ReadBlocks_DMA(SD_HandleTypeDef *hsd, uint32_t *pReadBuffer, uint64_t ReadAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
682HAL_SD_ErrorTypedef HAL_SD_WriteBlocks_DMA(SD_HandleTypeDef *hsd, uint32_t *pWriteBuffer, uint64_t WriteAddr, uint32_t BlockSize, uint32_t NumberOfBlocks);
683HAL_SD_ErrorTypedef HAL_SD_CheckWriteOperation(SD_HandleTypeDef *hsd, uint32_t Timeout);
684HAL_SD_ErrorTypedef HAL_SD_CheckReadOperation(SD_HandleTypeDef *hsd, uint32_t Timeout);
685/**
686 * @}
687 */
688
689/** @defgroup SD_Exported_Functions_Group3 Peripheral Control functions
690 * @{
691 */
692HAL_SD_ErrorTypedef HAL_SD_Get_CardInfo(SD_HandleTypeDef *hsd, HAL_SD_CardInfoTypedef *pCardInfo);
693HAL_SD_ErrorTypedef HAL_SD_WideBusOperation_Config(SD_HandleTypeDef *hsd, uint32_t WideMode);
694HAL_SD_ErrorTypedef HAL_SD_StopTransfer(SD_HandleTypeDef *hsd);
695HAL_SD_ErrorTypedef HAL_SD_HighSpeed (SD_HandleTypeDef *hsd);
696/**
697 * @}
698 */
699
700/* Peripheral State functions ************************************************/
701/** @defgroup SD_Exported_Functions_Group4 Peripheral State functions
702 * @{
703 */
704HAL_SD_ErrorTypedef HAL_SD_SendSDStatus(SD_HandleTypeDef *hsd, uint32_t *pSDstatus);
705HAL_SD_ErrorTypedef HAL_SD_GetCardStatus(SD_HandleTypeDef *hsd, HAL_SD_CardStatusTypedef *pCardStatus);
706HAL_SD_TransferStateTypedef HAL_SD_GetStatus(SD_HandleTypeDef *hsd);
707/**
708 * @}
709 */
710
711/**
712 * @}
713 */
714
715/* Private types -------------------------------------------------------------*/
716/** @defgroup SD_Private_Types SD Private Types
717 * @{
718 */
719
720/**
721 * @}
722 */
723
724/* Private defines -----------------------------------------------------------*/
725/** @defgroup SD_Private_Defines SD Private Defines
726 * @{
727 */
728
729/**
730 * @}
731 */
732
733/* Private variables ---------------------------------------------------------*/
734/** @defgroup SD_Private_Variables SD Private Variables
735 * @{
736 */
737
738/**
739 * @}
740 */
741
742/* Private constants ---------------------------------------------------------*/
743/** @defgroup SD_Private_Constants SD Private Constants
744 * @{
745 */
746
747/**
748 * @}
749 */
750
751/* Private macros ------------------------------------------------------------*/
752/** @defgroup SD_Private_Macros SD Private Macros
753 * @{
754 */
755
756/**
757 * @}
758 */
759
760/* Private functions prototypes ----------------------------------------------*/
761/** @defgroup SD_Private_Functions_Prototypes SD Private Functions Prototypes
762 * @{
763 */
764
765/**
766 * @}
767 */
768
769/* Private functions ---------------------------------------------------------*/
770/** @defgroup SD_Private_Functions SD Private Functions
771 * @{
772 */
773
774/**
775 * @}
776 */
777
778/**
779 * @}
780 */
781
782/**
783 * @}
784 */
785#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||
786 STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx */
787#ifdef __cplusplus
788}
789#endif
790
791#endif /* __STM32F4xx_HAL_SD_H */
792
793/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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