source: asp3_wo_tecs/trunk/arch/arm_m_gcc/stm32f4xx_stm32cube/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr_ex.h@ 303

Last change on this file since 303 was 303, checked in by ertl-honda, 7 years ago

nucleo_f401re依存部の追加
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1/**
2 ******************************************************************************
3 * @file stm32f4xx_hal_pwr_ex.h
4 * @author MCD Application Team
5 * @version V1.4.1
6 * @date 09-October-2015
7 * @brief Header file of PWR HAL Extension module.
8 ******************************************************************************
9 * @attention
10 *
11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
12 *
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 ******************************************************************************
36 */
37
38/* Define to prevent recursive inclusion -------------------------------------*/
39#ifndef __STM32F4xx_HAL_PWR_EX_H
40#define __STM32F4xx_HAL_PWR_EX_H
41
42#ifdef __cplusplus
43 extern "C" {
44#endif
45
46/* Includes ------------------------------------------------------------------*/
47#include "stm32f4xx_hal_def.h"
48
49/** @addtogroup STM32F4xx_HAL_Driver
50 * @{
51 */
52
53/** @addtogroup PWREx
54 * @{
55 */
56
57/* Exported types ------------------------------------------------------------*/
58/* Exported constants --------------------------------------------------------*/
59/** @defgroup PWREx_Exported_Constants PWREx Exported Constants
60 * @{
61 */
62#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
63 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
64
65/** @defgroup PWREx_Regulator_state_in_UnderDrive_mode PWREx Regulator state in UnderDrive mode
66 * @{
67 */
68#define PWR_MAINREGULATOR_UNDERDRIVE_ON PWR_CR_MRUDS
69#define PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON ((uint32_t)(PWR_CR_LPDS | PWR_CR_LPUDS))
70/**
71 * @}
72 */
73
74/** @defgroup PWREx_Over_Under_Drive_Flag PWREx Over Under Drive Flag
75 * @{
76 */
77#define PWR_FLAG_ODRDY PWR_CSR_ODRDY
78#define PWR_FLAG_ODSWRDY PWR_CSR_ODSWRDY
79#define PWR_FLAG_UDRDY PWR_CSR_UDSWRDY
80/**
81 * @}
82 */
83#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
84
85/** @defgroup PWREx_Regulator_Voltage_Scale PWREx Regulator Voltage Scale
86 * @{
87 */
88#if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx)
89#define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR_VOS /* Scale 1 mode(default value at reset): the maximum value of fHCLK = 168 MHz. */
90#define PWR_REGULATOR_VOLTAGE_SCALE2 ((uint32_t)0x00000000) /* Scale 2 mode: the maximum value of fHCLK = 144 MHz. */
91#else
92#define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR_VOS /* Scale 1 mode(default value at reset): the maximum value of fHCLK is 168 MHz. It can be extended to
93 180 MHz by activating the over-drive mode. */
94#define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_CR_VOS_1 /* Scale 2 mode: the maximum value of fHCLK is 144 MHz. It can be extended to
95 168 MHz by activating the over-drive mode. */
96#define PWR_REGULATOR_VOLTAGE_SCALE3 PWR_CR_VOS_0 /* Scale 3 mode: the maximum value of fHCLK is 120 MHz. */
97#endif /* STM32F405xx || STM32F407xx || STM32F415xx || STM32F417xx */
98/**
99 * @}
100 */
101#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F446xx)
102/** @defgroup PWREx_WakeUp_Pins PWREx WakeUp Pins
103 * @{
104 */
105#define PWR_WAKEUP_PIN2 ((uint32_t)0x00000080)
106#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
107#define PWR_WAKEUP_PIN3 ((uint32_t)0x00000040)
108#endif /* STM32F410xx */
109/**
110 * @}
111 */
112#endif /* STM32F410xx || STM32F446xx */
113
114/**
115 * @}
116 */
117
118/* Exported macro ------------------------------------------------------------*/
119/** @defgroup PWREx_Exported_Constants PWREx Exported Constants
120 * @{
121 */
122
123#if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx)
124/** @brief macros configure the main internal regulator output voltage.
125 * @param __REGULATOR__: specifies the regulator output voltage to achieve
126 * a tradeoff between performance and power consumption when the device does
127 * not operate at the maximum frequency (refer to the datasheets for more details).
128 * This parameter can be one of the following values:
129 * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode
130 * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode
131 * @retval None
132 */
133#define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) do { \
134 __IO uint32_t tmpreg; \
135 MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__)); \
136 /* Delay after an RCC peripheral clock enabling */ \
137 tmpreg = READ_BIT(PWR->CR, PWR_CR_VOS); \
138 UNUSED(tmpreg); \
139 } while(0)
140#else
141/** @brief macros configure the main internal regulator output voltage.
142 * @param __REGULATOR__: specifies the regulator output voltage to achieve
143 * a tradeoff between performance and power consumption when the device does
144 * not operate at the maximum frequency (refer to the datasheets for more details).
145 * This parameter can be one of the following values:
146 * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode
147 * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode
148 * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode
149 * @retval None
150 */
151#define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) do { \
152 __IO uint32_t tmpreg; \
153 MODIFY_REG(PWR->CR, PWR_CR_VOS, (__REGULATOR__)); \
154 /* Delay after an RCC peripheral clock enabling */ \
155 tmpreg = READ_BIT(PWR->CR, PWR_CR_VOS); \
156 UNUSED(tmpreg); \
157 } while(0)
158#endif /* STM32F405xx || STM32F407xx || STM32F415xx || STM32F417xx */
159
160#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
161 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
162/** @brief Macros to enable or disable the Over drive mode.
163 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
164 */
165#define __HAL_PWR_OVERDRIVE_ENABLE() (*(__IO uint32_t *) CR_ODEN_BB = ENABLE)
166#define __HAL_PWR_OVERDRIVE_DISABLE() (*(__IO uint32_t *) CR_ODEN_BB = DISABLE)
167
168/** @brief Macros to enable or disable the Over drive switching.
169 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
170 */
171#define __HAL_PWR_OVERDRIVESWITCHING_ENABLE() (*(__IO uint32_t *) CR_ODSWEN_BB = ENABLE)
172#define __HAL_PWR_OVERDRIVESWITCHING_DISABLE() (*(__IO uint32_t *) CR_ODSWEN_BB = DISABLE)
173
174/** @brief Macros to enable or disable the Under drive mode.
175 * @note This mode is enabled only with STOP low power mode.
176 * In this mode, the 1.2V domain is preserved in reduced leakage mode. This
177 * mode is only available when the main regulator or the low power regulator
178 * is in low voltage mode.
179 * @note If the Under-drive mode was enabled, it is automatically disabled after
180 * exiting Stop mode.
181 * When the voltage regulator operates in Under-drive mode, an additional
182 * startup delay is induced when waking up from Stop mode.
183 */
184#define __HAL_PWR_UNDERDRIVE_ENABLE() (PWR->CR |= (uint32_t)PWR_CR_UDEN)
185#define __HAL_PWR_UNDERDRIVE_DISABLE() (PWR->CR &= (uint32_t)(~PWR_CR_UDEN))
186
187/** @brief Check PWR flag is set or not.
188 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
189 * @param __FLAG__: specifies the flag to check.
190 * This parameter can be one of the following values:
191 * @arg PWR_FLAG_ODRDY: This flag indicates that the Over-drive mode
192 * is ready
193 * @arg PWR_FLAG_ODSWRDY: This flag indicates that the Over-drive mode
194 * switching is ready
195 * @arg PWR_FLAG_UDRDY: This flag indicates that the Under-drive mode
196 * is enabled in Stop mode
197 * @retval The new state of __FLAG__ (TRUE or FALSE).
198 */
199#define __HAL_PWR_GET_ODRUDR_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
200
201/** @brief Clear the Under-Drive Ready flag.
202 * @note These macros can be used only for STM32F42xx/STM3243xx devices.
203 */
204#define __HAL_PWR_CLEAR_ODRUDR_FLAG() (PWR->CSR |= PWR_FLAG_UDRDY)
205
206#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
207/**
208 * @}
209 */
210
211/* Exported functions --------------------------------------------------------*/
212/** @addtogroup PWREx_Exported_Functions PWREx Exported Functions
213 * @{
214 */
215
216/** @addtogroup PWREx_Exported_Functions_Group1
217 * @{
218 */
219void HAL_PWREx_EnableFlashPowerDown(void);
220void HAL_PWREx_DisableFlashPowerDown(void);
221HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg(void);
222HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void);
223uint32_t HAL_PWREx_GetVoltageRange(void);
224HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling);
225
226#if defined(STM32F469xx) || defined(STM32F479xx)
227void HAL_PWREx_EnableWakeUpPinPolarityRisingEdge(void);
228void HAL_PWREx_EnableWakeUpPinPolarityFallingEdge(void);
229#endif /* STM32F469xx || STM32F479xx */
230
231#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F401xC) ||\
232 defined(STM32F401xE) || defined(STM32F411xE)
233void HAL_PWREx_EnableMainRegulatorLowVoltage(void);
234void HAL_PWREx_DisableMainRegulatorLowVoltage(void);
235void HAL_PWREx_EnableLowRegulatorLowVoltage(void);
236void HAL_PWREx_DisableLowRegulatorLowVoltage(void);
237#endif /* STM32F410xx || STM32F401xC || STM32F401xE || STM32F411xE */
238
239#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F446xx) ||\
240 defined(STM32F469xx) || defined(STM32F479xx)
241HAL_StatusTypeDef HAL_PWREx_EnableOverDrive(void);
242HAL_StatusTypeDef HAL_PWREx_DisableOverDrive(void);
243HAL_StatusTypeDef HAL_PWREx_EnterUnderDriveSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
244#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
245
246/**
247 * @}
248 */
249
250/**
251 * @}
252 */
253/* Private types -------------------------------------------------------------*/
254/* Private variables ---------------------------------------------------------*/
255/* Private constants ---------------------------------------------------------*/
256/** @defgroup PWREx_Private_Constants PWREx Private Constants
257 * @{
258 */
259
260/** @defgroup PWREx_register_alias_address PWREx Register alias address
261 * @{
262 */
263/* ------------- PWR registers bit address in the alias region ---------------*/
264/* --- CR Register ---*/
265/* Alias word address of FPDS bit */
266#define FPDS_BIT_NUMBER POSITION_VAL(PWR_CR_FPDS)
267#define CR_FPDS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (FPDS_BIT_NUMBER * 4))
268
269/* Alias word address of ODEN bit */
270#define ODEN_BIT_NUMBER POSITION_VAL(PWR_CR_ODEN)
271#define CR_ODEN_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (ODEN_BIT_NUMBER * 4))
272
273/* Alias word address of ODSWEN bit */
274#define ODSWEN_BIT_NUMBER POSITION_VAL(PWR_CR_ODSWEN)
275#define CR_ODSWEN_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (ODSWEN_BIT_NUMBER * 4))
276
277/* Alias word address of MRLVDS bit */
278#define MRLVDS_BIT_NUMBER POSITION_VAL(PWR_CR_MRLVDS)
279#define CR_MRLVDS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (MRLVDS_BIT_NUMBER * 4))
280
281/* Alias word address of LPLVDS bit */
282#define LPLVDS_BIT_NUMBER POSITION_VAL(PWR_CR_LPLVDS)
283#define CR_LPLVDS_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32) + (LPLVDS_BIT_NUMBER * 4))
284
285 /**
286 * @}
287 */
288
289/** @defgroup PWREx_CSR_register_alias PWRx CSR Register alias address
290 * @{
291 */
292/* --- CSR Register ---*/
293/* Alias word address of BRE bit */
294#define BRE_BIT_NUMBER POSITION_VAL(PWR_CSR_BRE)
295#define CSR_BRE_BB (uint32_t)(PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32) + (BRE_BIT_NUMBER * 4))
296
297#if defined(STM32F469xx) || defined(STM32F479xx)
298/* Alias word address of WUPP bit */
299#define WUPP_BIT_NUMBER POSITION_VAL(PWR_CSR_WUPP)
300#define CSR_WUPP_BB (PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32) + (WUPP_BIT_NUMBER * 4))
301#endif /* STM32F469xx || STM32F479xx */
302/**
303 * @}
304 */
305
306/**
307 * @}
308 */
309
310/* Private macros ------------------------------------------------------------*/
311/** @defgroup PWREx_Private_Macros PWREx Private Macros
312 * @{
313 */
314
315/** @defgroup PWREx_IS_PWR_Definitions PWREx Private macros to check input parameters
316 * @{
317 */
318#if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
319 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
320#define IS_PWR_REGULATOR_UNDERDRIVE(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_UNDERDRIVE_ON) || \
321 ((REGULATOR) == PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON))
322#endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
323
324#if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx)
325#define IS_PWR_VOLTAGE_SCALING_RANGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
326 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2))
327#else
328#define IS_PWR_VOLTAGE_SCALING_RANGE(VOLTAGE) (((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
329 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE2) || \
330 ((VOLTAGE) == PWR_REGULATOR_VOLTAGE_SCALE3))
331#endif /* STM32F405xx || STM32F407xx || STM32F415xx || STM32F417xx */
332
333#if defined(STM32F446xx)
334#define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || ((PIN) == PWR_WAKEUP_PIN2))
335#elif defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx)
336#define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || ((PIN) == PWR_WAKEUP_PIN2) || \
337 ((PIN) == PWR_WAKEUP_PIN3))
338#else
339#define IS_PWR_WAKEUP_PIN(PIN) ((PIN) == PWR_WAKEUP_PIN1)
340#endif /* STM32F446xx */
341/**
342 * @}
343 */
344
345/**
346 * @}
347 */
348
349/**
350 * @}
351 */
352
353/**
354 * @}
355 */
356
357#ifdef __cplusplus
358}
359#endif
360
361
362#endif /* __STM32F4xx_HAL_PWR_EX_H */
363
364/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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