source: asp3_wo_tecs/trunk/arch/arm_m_gcc/stm32f4xx_stm32cube/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_iwdg.h@ 303

Last change on this file since 303 was 303, checked in by ertl-honda, 7 years ago

nucleo_f401re依存部の追加

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1/**
2 ******************************************************************************
3 * @file stm32f4xx_hal_iwdg.h
4 * @author MCD Application Team
5 * @version V1.4.1
6 * @date 09-October-2015
7 * @brief Header file of IWDG HAL module.
8 ******************************************************************************
9 * @attention
10 *
11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
12 *
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 ******************************************************************************
36 */
37
38/* Define to prevent recursive inclusion -------------------------------------*/
39#ifndef __STM32F4xx_HAL_IWDG_H
40#define __STM32F4xx_HAL_IWDG_H
41
42#ifdef __cplusplus
43 extern "C" {
44#endif
45
46/* Includes ------------------------------------------------------------------*/
47#include "stm32f4xx_hal_def.h"
48
49/** @addtogroup STM32F4xx_HAL_Driver
50 * @{
51 */
52
53/** @addtogroup IWDG
54 * @{
55 */
56
57/* Exported types ------------------------------------------------------------*/
58/** @defgroup IWDG_Exported_Types IWDG Exported Types
59 * @{
60 */
61
62/**
63 * @brief IWDG HAL State Structure definition
64 */
65typedef enum
66{
67 HAL_IWDG_STATE_RESET = 0x00, /*!< IWDG not yet initialized or disabled */
68 HAL_IWDG_STATE_READY = 0x01, /*!< IWDG initialized and ready for use */
69 HAL_IWDG_STATE_BUSY = 0x02, /*!< IWDG internal process is ongoing */
70 HAL_IWDG_STATE_TIMEOUT = 0x03, /*!< IWDG timeout state */
71 HAL_IWDG_STATE_ERROR = 0x04 /*!< IWDG error state */
72}HAL_IWDG_StateTypeDef;
73
74/**
75 * @brief IWDG Init structure definition
76 */
77typedef struct
78{
79 uint32_t Prescaler; /*!< Select the prescaler of the IWDG.
80 This parameter can be a value of @ref IWDG_Prescaler */
81
82 uint32_t Reload; /*!< Specifies the IWDG down-counter reload value.
83 This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
84}IWDG_InitTypeDef;
85
86/**
87 * @brief IWDG Handle Structure definition
88 */
89typedef struct
90{
91 IWDG_TypeDef *Instance; /*!< Register base address */
92
93 IWDG_InitTypeDef Init; /*!< IWDG required parameters */
94
95 HAL_LockTypeDef Lock; /*!< IWDG Locking object */
96
97 __IO HAL_IWDG_StateTypeDef State; /*!< IWDG communication state */
98}IWDG_HandleTypeDef;
99
100/**
101 * @}
102 */
103
104/* Exported constants --------------------------------------------------------*/
105/** @defgroup IWDG_Exported_Constants IWDG Exported Constants
106 * @{
107 */
108
109/** @defgroup IWDG_Registers_BitMask IWDG Registers BitMask
110 * @brief IWDG registers bit mask
111 * @{
112 */
113/* --- KR Register ---*/
114/* KR register bit mask */
115#define IWDG_KEY_RELOAD ((uint32_t)0xAAAA) /*!< IWDG Reload Counter Enable */
116#define IWDG_KEY_ENABLE ((uint32_t)0xCCCC) /*!< IWDG Peripheral Enable */
117#define IWDG_KEY_WRITE_ACCESS_ENABLE ((uint32_t)0x5555) /*!< IWDG KR Write Access Enable */
118#define IWDG_KEY_WRITE_ACCESS_DISABLE ((uint32_t)0x0000) /*!< IWDG KR Write Access Disable */
119/**
120 * @}
121 */
122
123/** @defgroup IWDG_Flag_definition IWDG Flag definition
124 * @{
125 */
126#define IWDG_FLAG_PVU ((uint32_t)IWDG_SR_PVU) /*!< Watchdog counter prescaler value update Flag */
127#define IWDG_FLAG_RVU ((uint32_t)IWDG_SR_RVU) /*!< Watchdog counter reload value update Flag */
128/**
129 * @}
130 */
131
132/** @defgroup IWDG_Prescaler IWDG Prescaler
133 * @{
134 */
135#define IWDG_PRESCALER_4 ((uint8_t)0x00) /*!< IWDG prescaler set to 4 */
136#define IWDG_PRESCALER_8 ((uint8_t)(IWDG_PR_PR_0)) /*!< IWDG prescaler set to 8 */
137#define IWDG_PRESCALER_16 ((uint8_t)(IWDG_PR_PR_1)) /*!< IWDG prescaler set to 16 */
138#define IWDG_PRESCALER_32 ((uint8_t)(IWDG_PR_PR_1 | IWDG_PR_PR_0)) /*!< IWDG prescaler set to 32 */
139#define IWDG_PRESCALER_64 ((uint8_t)(IWDG_PR_PR_2)) /*!< IWDG prescaler set to 64 */
140#define IWDG_PRESCALER_128 ((uint8_t)(IWDG_PR_PR_2 | IWDG_PR_PR_0)) /*!< IWDG prescaler set to 128 */
141#define IWDG_PRESCALER_256 ((uint8_t)(IWDG_PR_PR_2 | IWDG_PR_PR_1)) /*!< IWDG prescaler set to 256 */
142/**
143 * @}
144 */
145
146/**
147 * @}
148 */
149
150/* Exported macros -----------------------------------------------------------*/
151/** @defgroup IWDG_Exported_Macros IWDG Exported Macros
152 * @{
153 */
154
155/** @brief Reset IWDG handle state
156 * @param __HANDLE__: IWDG handle.
157 * @retval None
158 */
159#define __HAL_IWDG_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_IWDG_STATE_RESET)
160
161/**
162 * @brief Enables the IWDG peripheral.
163 * @param __HANDLE__: IWDG handle
164 * @retval None
165 */
166#define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE)
167
168/**
169 * @brief Reloads IWDG counter with value defined in the reload register
170 * (write access to IWDG_PR and IWDG_RLR registers disabled).
171 * @param __HANDLE__: IWDG handle
172 * @retval None
173 */
174#define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD)
175
176/**
177 * @brief Gets the selected IWDG's flag status.
178 * @param __HANDLE__: IWDG handle
179 * @param __FLAG__: specifies the flag to check.
180 * This parameter can be one of the following values:
181 * @arg IWDG_FLAG_PVU: Watchdog counter reload value update flag
182 * @arg IWDG_FLAG_RVU: Watchdog counter prescaler value flag
183 * @retval The new state of __FLAG__ (TRUE or FALSE).
184 */
185#define __HAL_IWDG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
186
187/**
188 * @}
189 */
190
191/* Exported functions --------------------------------------------------------*/
192/** @addtogroup IWDG_Exported_Functions
193 * @{
194 */
195
196/** @addtogroup IWDG_Exported_Functions_Group1
197 * @{
198 */
199/* Initialization/de-initialization functions ********************************/
200HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg);
201void HAL_IWDG_MspInit(IWDG_HandleTypeDef *hiwdg);
202/**
203 * @}
204 */
205
206/** @addtogroup IWDG_Exported_Functions_Group2
207 * @{
208 */
209/* I/O operation functions ****************************************************/
210HAL_StatusTypeDef HAL_IWDG_Start(IWDG_HandleTypeDef *hiwdg);
211HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
212/**
213 * @}
214 */
215
216/** @addtogroup IWDG_Exported_Functions_Group3
217 * @{
218 */
219/* Peripheral State functions ************************************************/
220HAL_IWDG_StateTypeDef HAL_IWDG_GetState(IWDG_HandleTypeDef *hiwdg);
221
222/**
223 * @}
224 */
225
226/**
227 * @}
228 */
229
230/* Private macro -------------------------------------------------------------*/
231/** @defgroup IWDG_Private_Macros IWDG Private Macros
232 * @{
233 */
234
235/**
236 * @brief Enables write access to IWDG_PR and IWDG_RLR registers.
237 * @param __HANDLE__: IWDG handle
238 * @retval None
239 */
240#define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE)
241
242/**
243 * @brief Disables write access to IWDG_PR and IWDG_RLR registers.
244 * @param __HANDLE__: IWDG handle
245 * @retval None
246 */
247#define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE)
248
249
250#define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \
251 ((__PRESCALER__) == IWDG_PRESCALER_8) || \
252 ((__PRESCALER__) == IWDG_PRESCALER_16) || \
253 ((__PRESCALER__) == IWDG_PRESCALER_32) || \
254 ((__PRESCALER__) == IWDG_PRESCALER_64) || \
255 ((__PRESCALER__) == IWDG_PRESCALER_128)|| \
256 ((__PRESCALER__) == IWDG_PRESCALER_256))
257
258
259#define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= 0xFFF)
260
261/**
262 * @}
263 */
264
265/* Private define ------------------------------------------------------------*/
266 /** @defgroup IWDG_Private_Constants IWDG Private Constants
267 * @{
268 */
269
270/**
271 * @}
272 */
273
274/**
275 * @}
276 */
277
278/**
279 * @}
280 */
281
282#ifdef __cplusplus
283}
284#endif
285
286#endif /* __STM32F4xx_HAL_IWDG_H */
287
288/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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