source: asp3_wo_tecs/trunk/arch/arm_m_gcc/stm32f4xx_stm32cube/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_i2s.h@ 303

Last change on this file since 303 was 303, checked in by ertl-honda, 7 years ago

nucleo_f401re依存部の追加
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1/**
2 ******************************************************************************
3 * @file stm32f4xx_hal_i2s.h
4 * @author MCD Application Team
5 * @version V1.4.1
6 * @date 09-October-2015
7 * @brief Header file of I2S HAL module.
8 ******************************************************************************
9 * @attention
10 *
11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
12 *
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 ******************************************************************************
36 */
37
38/* Define to prevent recursive inclusion -------------------------------------*/
39#ifndef __STM32F4xx_HAL_I2S_H
40#define __STM32F4xx_HAL_I2S_H
41
42#ifdef __cplusplus
43 extern "C" {
44#endif
45
46/* Includes ------------------------------------------------------------------*/
47#include "stm32f4xx_hal_def.h"
48
49/** @addtogroup STM32F4xx_HAL_Driver
50 * @{
51 */
52
53/** @addtogroup I2S
54 * @{
55 */
56
57/* Exported types ------------------------------------------------------------*/
58/** @defgroup I2S_Exported_Types I2S Exported Types
59 * @{
60 */
61
62/**
63 * @brief I2S Init structure definition
64 */
65typedef struct
66{
67 uint32_t Mode; /*!< Specifies the I2S operating mode.
68 This parameter can be a value of @ref I2S_Mode */
69
70 uint32_t Standard; /*!< Specifies the standard used for the I2S communication.
71 This parameter can be a value of @ref I2S_Standard */
72
73 uint32_t DataFormat; /*!< Specifies the data format for the I2S communication.
74 This parameter can be a value of @ref I2S_Data_Format */
75
76 uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
77 This parameter can be a value of @ref I2S_MCLK_Output */
78
79 uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
80 This parameter can be a value of @ref I2S_Audio_Frequency */
81
82 uint32_t CPOL; /*!< Specifies the idle state of the I2S clock.
83 This parameter can be a value of @ref I2S_Clock_Polarity */
84
85 uint32_t ClockSource; /*!< Specifies the I2S Clock Source.
86 This parameter can be a value of @ref I2S_Clock_Source */
87
88 uint32_t FullDuplexMode; /*!< Specifies the I2S FullDuplex mode.
89 This parameter can be a value of @ref I2S_FullDuplex_Mode */
90
91}I2S_InitTypeDef;
92
93/**
94 * @brief HAL State structures definition
95 */
96typedef enum
97{
98 HAL_I2S_STATE_RESET = 0x00, /*!< I2S not yet initialized or disabled */
99 HAL_I2S_STATE_READY = 0x01, /*!< I2S initialized and ready for use */
100 HAL_I2S_STATE_BUSY = 0x02, /*!< I2S internal process is ongoing */
101 HAL_I2S_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
102 HAL_I2S_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
103 HAL_I2S_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */
104 HAL_I2S_STATE_TIMEOUT = 0x03, /*!< I2S timeout state */
105 HAL_I2S_STATE_ERROR = 0x04 /*!< I2S error state */
106
107}HAL_I2S_StateTypeDef;
108
109/**
110 * @brief I2S handle Structure definition
111 */
112typedef struct
113{
114 SPI_TypeDef *Instance; /* I2S registers base address */
115
116 I2S_InitTypeDef Init; /* I2S communication parameters */
117
118 uint16_t *pTxBuffPtr; /* Pointer to I2S Tx transfer buffer */
119
120 __IO uint16_t TxXferSize; /* I2S Tx transfer size */
121
122 __IO uint16_t TxXferCount; /* I2S Tx transfer Counter */
123
124 uint16_t *pRxBuffPtr; /* Pointer to I2S Rx transfer buffer */
125
126 __IO uint16_t RxXferSize; /* I2S Rx transfer size */
127
128 __IO uint16_t RxXferCount; /* I2S Rx transfer counter */
129
130 DMA_HandleTypeDef *hdmatx; /* I2S Tx DMA handle parameters */
131
132 DMA_HandleTypeDef *hdmarx; /* I2S Rx DMA handle parameters */
133
134 __IO HAL_LockTypeDef Lock; /* I2S locking object */
135
136 __IO HAL_I2S_StateTypeDef State; /* I2S communication state */
137
138 __IO uint32_t ErrorCode; /* I2S Error code */
139
140}I2S_HandleTypeDef;
141/**
142 * @}
143 */
144
145/* Exported constants --------------------------------------------------------*/
146/** @defgroup I2S_Exported_Constants I2S Exported Constants
147 * @{
148 */
149
150/** @defgroup I2S_Error_Code I2S Error Code
151 * @brief I2S Error Code
152 * @{
153 */
154#define HAL_I2S_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
155#define HAL_I2S_ERROR_UDR ((uint32_t)0x00000001) /*!< I2S Underrun error */
156#define HAL_I2S_ERROR_OVR ((uint32_t)0x00000002) /*!< I2S Overrun error */
157#define HAL_I2SEX_ERROR_UDR ((uint32_t)0x00000004) /*!< I2S extended Underrun error */
158#define HAL_I2SEX_ERROR_OVR ((uint32_t)0x00000008) /*!< I2S extended Overrun error */
159#define HAL_I2S_ERROR_FRE ((uint32_t)0x00000010) /*!< I2S Frame format error */
160#define HAL_I2S_ERROR_DMA ((uint32_t)0x00000020) /*!< DMA transfer error */
161/**
162 * @}
163 */
164
165/** @defgroup I2S_Mode I2S Mode
166 * @{
167 */
168#define I2S_MODE_SLAVE_TX ((uint32_t)0x00000000)
169#define I2S_MODE_SLAVE_RX ((uint32_t)0x00000100)
170#define I2S_MODE_MASTER_TX ((uint32_t)0x00000200)
171#define I2S_MODE_MASTER_RX ((uint32_t)0x00000300)
172/**
173 * @}
174 */
175
176/** @defgroup I2S_Standard I2S Standard
177 * @{
178 */
179#define I2S_STANDARD_PHILIPS ((uint32_t)0x00000000)
180#define I2S_STANDARD_MSB ((uint32_t)0x00000010)
181#define I2S_STANDARD_LSB ((uint32_t)0x00000020)
182#define I2S_STANDARD_PCM_SHORT ((uint32_t)0x00000030)
183#define I2S_STANDARD_PCM_LONG ((uint32_t)0x000000B0)
184/**
185 * @}
186 */
187
188/** @defgroup I2S_Data_Format I2S Data Format
189 * @{
190 */
191#define I2S_DATAFORMAT_16B ((uint32_t)0x00000000)
192#define I2S_DATAFORMAT_16B_EXTENDED ((uint32_t)0x00000001)
193#define I2S_DATAFORMAT_24B ((uint32_t)0x00000003)
194#define I2S_DATAFORMAT_32B ((uint32_t)0x00000005)
195/**
196 * @}
197 */
198
199/** @defgroup I2S_MCLK_Output I2S Mclk Output
200 * @{
201 */
202#define I2S_MCLKOUTPUT_ENABLE ((uint32_t)SPI_I2SPR_MCKOE)
203#define I2S_MCLKOUTPUT_DISABLE ((uint32_t)0x00000000)
204/**
205 * @}
206 */
207
208/** @defgroup I2S_Audio_Frequency I2S Audio Frequency
209 * @{
210 */
211#define I2S_AUDIOFREQ_192K ((uint32_t)192000)
212#define I2S_AUDIOFREQ_96K ((uint32_t)96000)
213#define I2S_AUDIOFREQ_48K ((uint32_t)48000)
214#define I2S_AUDIOFREQ_44K ((uint32_t)44100)
215#define I2S_AUDIOFREQ_32K ((uint32_t)32000)
216#define I2S_AUDIOFREQ_22K ((uint32_t)22050)
217#define I2S_AUDIOFREQ_16K ((uint32_t)16000)
218#define I2S_AUDIOFREQ_11K ((uint32_t)11025)
219#define I2S_AUDIOFREQ_8K ((uint32_t)8000)
220#define I2S_AUDIOFREQ_DEFAULT ((uint32_t)2)
221/**
222 * @}
223 */
224
225/** @defgroup I2S_FullDuplex_Mode I2S FullDuplex Mode
226 * @{
227 */
228#define I2S_FULLDUPLEXMODE_DISABLE ((uint32_t)0x00000000)
229#define I2S_FULLDUPLEXMODE_ENABLE ((uint32_t)0x00000001)
230/**
231 * @}
232 */
233
234/** @defgroup I2S_Clock_Polarity I2S Clock Polarity
235 * @{
236 */
237#define I2S_CPOL_LOW ((uint32_t)0x00000000)
238#define I2S_CPOL_HIGH ((uint32_t)SPI_I2SCFGR_CKPOL)
239/**
240 * @}
241 */
242
243/** @defgroup I2S_Interrupts_Definition I2S Interrupts Definition
244 * @{
245 */
246#define I2S_IT_TXE SPI_CR2_TXEIE
247#define I2S_IT_RXNE SPI_CR2_RXNEIE
248#define I2S_IT_ERR SPI_CR2_ERRIE
249/**
250 * @}
251 */
252
253/** @defgroup I2S_Flags_Definition I2S Flags Definition
254 * @{
255 */
256#define I2S_FLAG_TXE SPI_SR_TXE
257#define I2S_FLAG_RXNE SPI_SR_RXNE
258
259#define I2S_FLAG_UDR SPI_SR_UDR
260#define I2S_FLAG_OVR SPI_SR_OVR
261#define I2S_FLAG_FRE SPI_SR_FRE
262
263#define I2S_FLAG_CHSIDE SPI_SR_CHSIDE
264#define I2S_FLAG_BSY SPI_SR_BSY
265/**
266 * @}
267 */
268
269/**
270 * @}
271 */
272
273/* Exported macro ------------------------------------------------------------*/
274/** @defgroup I2S_Exported_Macros I2S Exported Macros
275 * @{
276 */
277
278/** @brief Reset I2S handle state
279 * @param __HANDLE__: specifies the I2S Handle.
280 * @retval None
281 */
282#define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET)
283
284/** @brief Enable or disable the specified SPI peripheral (in I2S mode).
285 * @param __HANDLE__: specifies the I2S Handle.
286 * @retval None
287 */
288#define __HAL_I2S_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR |= SPI_I2SCFGR_I2SE)
289#define __HAL_I2S_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR &= ~SPI_I2SCFGR_I2SE)
290
291/** @brief Enable or disable the specified I2S interrupts.
292 * @param __HANDLE__: specifies the I2S Handle.
293 * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
294 * This parameter can be one of the following values:
295 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
296 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
297 * @arg I2S_IT_ERR: Error interrupt enable
298 * @retval None
299 */
300#define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
301#define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= ~(__INTERRUPT__))
302
303/** @brief Checks if the specified I2S interrupt source is enabled or disabled.
304 * @param __HANDLE__: specifies the I2S Handle.
305 * This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral.
306 * @param __INTERRUPT__: specifies the I2S interrupt source to check.
307 * This parameter can be one of the following values:
308 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
309 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
310 * @arg I2S_IT_ERR: Error interrupt enable
311 * @retval The new state of __IT__ (TRUE or FALSE).
312 */
313#define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
314
315/** @brief Checks whether the specified I2S flag is set or not.
316 * @param __HANDLE__: specifies the I2S Handle.
317 * @param __FLAG__: specifies the flag to check.
318 * This parameter can be one of the following values:
319 * @arg I2S_FLAG_RXNE: Receive buffer not empty flag
320 * @arg I2S_FLAG_TXE: Transmit buffer empty flag
321 * @arg I2S_FLAG_UDR: Underrun flag
322 * @arg I2S_FLAG_OVR: Overrun flag
323 * @arg I2S_FLAG_FRE: Frame error flag
324 * @arg I2S_FLAG_CHSIDE: Channel Side flag
325 * @arg I2S_FLAG_BSY: Busy flag
326 * @retval The new state of __FLAG__ (TRUE or FALSE).
327 */
328#define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
329
330/** @brief Clears the I2S OVR pending flag.
331 * @param __HANDLE__: specifies the I2S Handle.
332 * @retval None
333 */
334#define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) \
335 do{ \
336 __IO uint32_t tmpreg; \
337 tmpreg = (__HANDLE__)->Instance->DR; \
338 tmpreg = (__HANDLE__)->Instance->SR; \
339 UNUSED(tmpreg); \
340 } while(0)
341
342/** @brief Clears the I2S UDR pending flag.
343 * @param __HANDLE__: specifies the I2S Handle.
344 * @retval None
345 */
346#define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) \
347 do{ \
348 __IO uint32_t tmpreg; \
349 tmpreg = (__HANDLE__)->Instance->SR; \
350 UNUSED(tmpreg); \
351 } while(0)
352/**
353 * @}
354 */
355
356/* Include I2S Extension module */
357#include "stm32f4xx_hal_i2s_ex.h"
358
359/* Exported functions --------------------------------------------------------*/
360/** @addtogroup I2S_Exported_Functions
361 * @{
362 */
363
364/** @addtogroup I2S_Exported_Functions_Group1
365 * @{
366 */
367/* Initialization/de-initialization functions **********************************/
368HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s);
369HAL_StatusTypeDef HAL_I2S_DeInit (I2S_HandleTypeDef *hi2s);
370void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s);
371void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s);
372/**
373 * @}
374 */
375
376/** @addtogroup I2S_Exported_Functions_Group2
377 * @{
378 */
379/* I/O operation functions *****************************************************/
380/* Blocking mode: Polling */
381HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
382HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
383
384 /* Non-Blocking mode: Interrupt */
385HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
386HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
387void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s);
388
389/* Non-Blocking mode: DMA */
390HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
391HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
392
393HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s);
394HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s);
395HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s);
396
397/* Peripheral Control and State functions **************************************/
398HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s);
399uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s);
400
401/* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
402void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
403void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s);
404void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
405void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s);
406void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s);
407/**
408 * @}
409 */
410
411/**
412 * @}
413 */
414
415/* Private types -------------------------------------------------------------*/
416/* Private variables ---------------------------------------------------------*/
417/* Private constants ---------------------------------------------------------*/
418/** @defgroup I2S_Private_Constants I2S Private Constants
419 * @{
420 */
421
422/**
423 * @}
424 */
425
426/* Private macros ------------------------------------------------------------*/
427/** @defgroup I2S_Private_Macros I2S Private Macros
428 * @{
429 */
430#define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) || \
431 ((MODE) == I2S_MODE_SLAVE_RX) || \
432 ((MODE) == I2S_MODE_MASTER_TX) || \
433 ((MODE) == I2S_MODE_MASTER_RX))
434
435#define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILIPS) || \
436 ((STANDARD) == I2S_STANDARD_MSB) || \
437 ((STANDARD) == I2S_STANDARD_LSB) || \
438 ((STANDARD) == I2S_STANDARD_PCM_SHORT) || \
439 ((STANDARD) == I2S_STANDARD_PCM_LONG))
440
441#define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B) || \
442 ((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) || \
443 ((FORMAT) == I2S_DATAFORMAT_24B) || \
444 ((FORMAT) == I2S_DATAFORMAT_32B))
445
446#define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) || \
447 ((OUTPUT) == I2S_MCLKOUTPUT_DISABLE))
448
449#define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K) && \
450 ((FREQ) <= I2S_AUDIOFREQ_192K)) || \
451 ((FREQ) == I2S_AUDIOFREQ_DEFAULT))
452
453#define IS_I2S_FULLDUPLEX_MODE(MODE) (((MODE) == I2S_FULLDUPLEXMODE_DISABLE) || \
454 ((MODE) == I2S_FULLDUPLEXMODE_ENABLE))
455
456#define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \
457 ((CPOL) == I2S_CPOL_HIGH))
458
459/**
460 * @}
461 */
462
463/* Private functions ---------------------------------------------------------*/
464/** @defgroup I2S_Private_Functions I2S Private Functions
465 * @{
466 */
467void I2S_DMATxCplt(DMA_HandleTypeDef *hdma);
468void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
469void I2S_DMARxCplt(DMA_HandleTypeDef *hdma);
470void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
471void I2S_DMAError(DMA_HandleTypeDef *hdma);
472HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t Status, uint32_t Timeout);
473HAL_StatusTypeDef I2S_Transmit_IT(I2S_HandleTypeDef *hi2s);
474HAL_StatusTypeDef I2S_Receive_IT(I2S_HandleTypeDef *hi2s);
475/**
476 * @}
477 */
478
479/**
480 * @}
481 */
482
483/**
484 * @}
485 */
486
487#ifdef __cplusplus
488}
489#endif
490
491
492#endif /* __STM32F4xx_HAL_I2S_H */
493
494/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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