source: asp3_wo_tecs/trunk/arch/arm_m_gcc/stm32f4xx_stm32cube/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_fmpi2c.h@ 303

Last change on this file since 303 was 303, checked in by ertl-honda, 7 years ago

nucleo_f401re依存部の追加
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1/**
2 ******************************************************************************
3 * @file stm32f4xx_hal_fmpi2c.h
4 * @author MCD Application Team
5 * @version V1.4.1
6 * @date 09-October-2015
7 * @brief Header file of FMPI2C HAL module.
8 ******************************************************************************
9 * @attention
10 *
11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
12 *
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 ******************************************************************************
36 */
37
38/* Define to prevent recursive inclusion -------------------------------------*/
39#ifndef __STM32F4xx_HAL_FMPI2C_H
40#define __STM32F4xx_HAL_FMPI2C_H
41
42#ifdef __cplusplus
43 extern "C" {
44#endif
45
46#if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F446xx)
47
48/* Includes ------------------------------------------------------------------*/
49#include "stm32f4xx_hal_def.h"
50
51/** @addtogroup STM32F4xx_HAL_Driver
52 * @{
53 */
54
55/** @addtogroup FMPI2C
56 * @{
57 */
58
59/* Exported types ------------------------------------------------------------*/
60/** @defgroup FMPI2C_Exported_Types FMPI2C Exported Types
61 * @{
62 */
63
64/**
65 * @brief FMPI2C Configuration Structure definition
66 */
67typedef struct
68{
69 uint32_t Timing; /*!< Specifies the FMPI2C_TIMINGR_register value.
70 This parameter calculated by referring to FMPI2C initialization
71 section in Reference manual */
72
73 uint32_t OwnAddress1; /*!< Specifies the first device own address.
74 This parameter can be a 7-bit or 10-bit address. */
75
76 uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected.
77 This parameter can be a value of @ref FMPI2C_addressing_mode */
78
79 uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected.
80 This parameter can be a value of @ref FMPI2C_dual_addressing_mode */
81
82 uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected
83 This parameter can be a 7-bit address. */
84
85 uint32_t OwnAddress2Masks; /*!< Specifies the acknoledge mask address second device own address if dual addressing mode is selected
86 This parameter can be a value of @ref FMPI2C_own_address2_masks */
87
88 uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected.
89 This parameter can be a value of @ref FMPI2C_general_call_addressing_mode */
90
91 uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected.
92 This parameter can be a value of @ref FMPI2C_nostretch_mode */
93
94}FMPI2C_InitTypeDef;
95
96/**
97 * @brief HAL State structures definition
98 */
99typedef enum
100{
101 HAL_FMPI2C_STATE_RESET = 0x00, /*!< FMPI2C not yet initialized or disabled */
102 HAL_FMPI2C_STATE_READY = 0x01, /*!< FMPI2C initialized and ready for use */
103 HAL_FMPI2C_STATE_BUSY = 0x02, /*!< FMPI2C internal process is ongoing */
104 HAL_FMPI2C_STATE_MASTER_BUSY_TX = 0x12, /*!< Master Data Transmission process is ongoing */
105 HAL_FMPI2C_STATE_MASTER_BUSY_RX = 0x22, /*!< Master Data Reception process is ongoing */
106 HAL_FMPI2C_STATE_SLAVE_BUSY_TX = 0x32, /*!< Slave Data Transmission process is ongoing */
107 HAL_FMPI2C_STATE_SLAVE_BUSY_RX = 0x42, /*!< Slave Data Reception process is ongoing */
108 HAL_FMPI2C_STATE_MEM_BUSY_TX = 0x52, /*!< Memory Data Transmission process is ongoing */
109 HAL_FMPI2C_STATE_MEM_BUSY_RX = 0x62, /*!< Memory Data Reception process is ongoing */
110 HAL_FMPI2C_STATE_TIMEOUT = 0x03, /*!< Timeout state */
111 HAL_FMPI2C_STATE_ERROR = 0x04 /*!< Reception process is ongoing */
112}HAL_FMPI2C_StateTypeDef;
113
114/**
115 * @brief HAL FMPI2C Error Code structure definition
116 */
117typedef enum
118{
119 HAL_FMPI2C_ERROR_NONE = 0x00, /*!< No error */
120 HAL_FMPI2C_ERROR_BERR = 0x01, /*!< BERR error */
121 HAL_FMPI2C_ERROR_ARLO = 0x02, /*!< ARLO error */
122 HAL_FMPI2C_ERROR_AF = 0x04, /*!< ACKF error */
123 HAL_FMPI2C_ERROR_OVR = 0x08, /*!< OVR error */
124 HAL_FMPI2C_ERROR_DMA = 0x10, /*!< DMA transfer error */
125 HAL_FMPI2C_ERROR_TIMEOUT = 0x20, /*!< Timeout error */
126 HAL_FMPI2C_ERROR_SIZE = 0x40 /*!< Size Management error */
127}HAL_FMPI2C_ErrorTypeDef;
128
129/**
130 * @brief FMPI2C handle Structure definition
131 */
132typedef struct
133{
134 FMPI2C_TypeDef *Instance; /*!< FMPI2C registers base address */
135
136 FMPI2C_InitTypeDef Init; /*!< FMPI2C communication parameters */
137
138 uint8_t *pBuffPtr; /*!< Pointer to FMPI2C transfer buffer */
139
140 uint16_t XferSize; /*!< FMPI2C transfer size */
141
142 __IO uint16_t XferCount; /*!< FMPI2C transfer counter */
143
144 DMA_HandleTypeDef *hdmatx; /*!< FMPI2C Tx DMA handle parameters */
145
146 DMA_HandleTypeDef *hdmarx; /*!< FMPI2C Rx DMA handle parameters */
147
148 HAL_LockTypeDef Lock; /*!< FMPI2C locking object */
149
150 __IO HAL_FMPI2C_StateTypeDef State; /*!< FMPI2C communication state */
151
152 __IO HAL_FMPI2C_ErrorTypeDef ErrorCode; /* FMPI2C Error code */
153
154}FMPI2C_HandleTypeDef;
155/**
156 * @}
157 */
158
159/* Exported constants --------------------------------------------------------*/
160
161/** @defgroup FMPI2C_Exported_Constants FMPI2C Exported Constants
162 * @{
163 */
164
165/** @defgroup FMPI2C_addressing_mode FMPI2C addressing mode
166 * @{
167 */
168#define FMPI2C_ADDRESSINGMODE_7BIT ((uint32_t)0x00000001)
169#define FMPI2C_ADDRESSINGMODE_10BIT ((uint32_t)0x00000002)
170
171/**
172 * @}
173 */
174
175/** @defgroup FMPI2C_dual_addressing_mode FMPI2C dual addressing mode
176 * @{
177 */
178
179#define FMPI2C_DUALADDRESS_DISABLE ((uint32_t)0x00000000)
180#define FMPI2C_DUALADDRESS_ENABLE FMPI2C_OAR2_OA2EN
181
182/**
183 * @}
184 */
185
186/** @defgroup FMPI2C_own_address2_masks FMPI2C own address2 masks
187 * @{
188 */
189
190#define FMPI2C_OA2_NOMASK ((uint8_t)0x00)
191#define FMPI2C_OA2_MASK01 ((uint8_t)0x01)
192#define FMPI2C_OA2_MASK02 ((uint8_t)0x02)
193#define FMPI2C_OA2_MASK03 ((uint8_t)0x03)
194#define FMPI2C_OA2_MASK04 ((uint8_t)0x04)
195#define FMPI2C_OA2_MASK05 ((uint8_t)0x05)
196#define FMPI2C_OA2_MASK06 ((uint8_t)0x06)
197#define FMPI2C_OA2_MASK07 ((uint8_t)0x07)
198
199/**
200 * @}
201 */
202
203/** @defgroup FMPI2C_general_call_addressing_mode FMPI2C general call addressing mode
204 * @{
205 */
206#define FMPI2C_GENERALCALL_DISABLE ((uint32_t)0x00000000)
207#define FMPI2C_GENERALCALL_ENABLE FMPI2C_CR1_GCEN
208
209/**
210 * @}
211 */
212
213/** @defgroup FMPI2C_nostretch_mode FMPI2C nostretch mode
214 * @{
215 */
216#define FMPI2C_NOSTRETCH_DISABLE ((uint32_t)0x00000000)
217#define FMPI2C_NOSTRETCH_ENABLE FMPI2C_CR1_NOSTRETCH
218
219/**
220 * @}
221 */
222
223/** @defgroup FMPI2C_Memory_Address_Size FMPI2C Memory Address Size
224 * @{
225 */
226#define FMPI2C_MEMADD_SIZE_8BIT ((uint32_t)0x00000001)
227#define FMPI2C_MEMADD_SIZE_16BIT ((uint32_t)0x00000002)
228
229/**
230 * @}
231 */
232
233/** @defgroup FMPI2C_ReloadEndMode_definition FMPI2C ReloadEndMode definition
234 * @{
235 */
236
237#define FMPI2C_RELOAD_MODE FMPI2C_CR2_RELOAD
238#define FMPI2C_AUTOEND_MODE FMPI2C_CR2_AUTOEND
239#define FMPI2C_SOFTEND_MODE ((uint32_t)0x00000000)
240
241/**
242 * @}
243 */
244
245/** @defgroup FMPI2C_StartStopMode_definition FMPI2C StartStopMode definition
246 * @{
247 */
248
249#define FMPI2C_NO_STARTSTOP ((uint32_t)0x00000000)
250#define FMPI2C_GENERATE_STOP FMPI2C_CR2_STOP
251#define FMPI2C_GENERATE_START_READ (uint32_t)(FMPI2C_CR2_START | FMPI2C_CR2_RD_WRN)
252#define FMPI2C_GENERATE_START_WRITE FMPI2C_CR2_START
253
254/**
255 * @}
256 */
257
258/** @defgroup FMPI2C_Interrupt_configuration_definition FMPI2C Interrupt configuration definition
259 * @brief FMPI2C Interrupt definition
260 * Elements values convention: 0xXXXXXXXX
261 * - XXXXXXXX : Interrupt control mask
262 * @{
263 */
264#define FMPI2C_IT_ERRI FMPI2C_CR1_ERRIE
265#define FMPI2C_IT_TCI FMPI2C_CR1_TCIE
266#define FMPI2C_IT_STOPI FMPI2C_CR1_STOPIE
267#define FMPI2C_IT_NACKI FMPI2C_CR1_NACKIE
268#define FMPI2C_IT_ADDRI FMPI2C_CR1_ADDRIE
269#define FMPI2C_IT_RXI FMPI2C_CR1_RXIE
270#define FMPI2C_IT_TXI FMPI2C_CR1_TXIE
271
272/**
273 * @}
274 */
275
276
277/** @defgroup FMPI2C_Flag_definition FMPI2C Flag definition
278 * @{
279 */
280
281#define FMPI2C_FLAG_TXE FMPI2C_ISR_TXE
282#define FMPI2C_FLAG_TXIS FMPI2C_ISR_TXIS
283#define FMPI2C_FLAG_RXNE FMPI2C_ISR_RXNE
284#define FMPI2C_FLAG_ADDR FMPI2C_ISR_ADDR
285#define FMPI2C_FLAG_AF FMPI2C_ISR_NACKF
286#define FMPI2C_FLAG_STOPF FMPI2C_ISR_STOPF
287#define FMPI2C_FLAG_TC FMPI2C_ISR_TC
288#define FMPI2C_FLAG_TCR FMPI2C_ISR_TCR
289#define FMPI2C_FLAG_BERR FMPI2C_ISR_BERR
290#define FMPI2C_FLAG_ARLO FMPI2C_ISR_ARLO
291#define FMPI2C_FLAG_OVR FMPI2C_ISR_OVR
292#define FMPI2C_FLAG_PECERR FMPI2C_ISR_PECERR
293#define FMPI2C_FLAG_TIMEOUT FMPI2C_ISR_TIMEOUT
294#define FMPI2C_FLAG_ALERT FMPI2C_ISR_ALERT
295#define FMPI2C_FLAG_BUSY FMPI2C_ISR_BUSY
296#define FMPI2C_FLAG_DIR FMPI2C_ISR_DIR
297
298/**
299 * @}
300 */
301
302/**
303 * @}
304 */
305
306/* Exported macro ------------------------------------------------------------*/
307/** @defgroup FMPI2C_Exported_Macros FMPI2C Exported Macros
308 * @{
309 */
310
311/** @brief Reset FMPI2C handle state
312 * @param __HANDLE__: specifies the FMPI2C Handle.
313 * This parameter can be FMPI2C where x: 1 or 2 to select the FMPI2C peripheral.
314 * @retval None
315 */
316#define __HAL_FMPI2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_FMPI2C_STATE_RESET)
317
318/** @brief Enables or disables the specified FMPI2C interrupts.
319 * @param __HANDLE__: specifies the FMPI2C Handle.
320 * This parameter can be FMPI2C where x: 1 or 2 to select the FMPI2C peripheral.
321 * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
322 * This parameter can be one of the following values:
323 * @arg FMPI2C_IT_ERRI: Errors interrupt enable
324 * @arg FMPI2C_IT_TCI: Transfer complete interrupt enable
325 * @arg FMPI2C_IT_STOPI: STOP detection interrupt enable
326 * @arg FMPI2C_IT_NACKI: NACK received interrupt enable
327 * @arg FMPI2C_IT_ADDRI: Address match interrupt enable
328 * @arg FMPI2C_IT_RXI: RX interrupt enable
329 * @arg FMPI2C_IT_TXI: TX interrupt enable
330 *
331 * @retval None
332 */
333
334#define __HAL_FMPI2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))
335#define __HAL_FMPI2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))
336
337/** @brief Checks if the specified FMPI2C interrupt source is enabled or disabled.
338 * @param __HANDLE__: specifies the FMPI2C Handle.
339 * This parameter can be FMPI2C where x: 1 or 2 to select the FMPI2C peripheral.
340 * @param __INTERRUPT__: specifies the FMPI2C interrupt source to check.
341 * This parameter can be one of the following values:
342 * @arg FMPI2C_IT_ERRI: Errors interrupt enable
343 * @arg FMPI2C_IT_TCI: Transfer complete interrupt enable
344 * @arg FMPI2C_IT_STOPI: STOP detection interrupt enable
345 * @arg FMPI2C_IT_NACKI: NACK received interrupt enable
346 * @arg FMPI2C_IT_ADDRI: Address match interrupt enable
347 * @arg FMPI2C_IT_RXI: RX interrupt enable
348 * @arg FMPI2C_IT_TXI: TX interrupt enable
349 *
350 * @retval The new state of __IT__ (TRUE or FALSE).
351 */
352#define __HAL_FMPI2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
353
354/** @brief Checks whether the specified FMPI2C flag is set or not.
355 * @param __HANDLE__: specifies the FMPI2C Handle.
356 * This parameter can be FMPI2C where x: 1 or 2 to select the FMPI2C peripheral.
357 * @param __FLAG__: specifies the flag to check.
358 * This parameter can be one of the following values:
359 * @arg FMPI2C_FLAG_TXE: Transmit data register empty
360 * @arg FMPI2C_FLAG_TXIS: Transmit interrupt status
361 * @arg FMPI2C_FLAG_RXNE: Receive data register not empty
362 * @arg FMPI2C_FLAG_ADDR: Address matched (slave mode)
363 * @arg FMPI2C_FLAG_AF: Acknowledge failure received flag
364 * @arg FMPI2C_FLAG_STOPF: STOP detection flag
365 * @arg FMPI2C_FLAG_TC: Transfer complete (master mode)
366 * @arg FMPI2C_FLAG_TCR: Transfer complete reload
367 * @arg FMPI2C_FLAG_BERR: Bus error
368 * @arg FMPI2C_FLAG_ARLO: Arbitration lost
369 * @arg FMPI2C_FLAG_OVR: Overrun/Underrun
370 * @arg FMPI2C_FLAG_PECERR: PEC error in reception
371 * @arg FMPI2C_FLAG_TIMEOUT: Timeout or Tlow detection flag
372 * @arg FMPI2C_FLAG_ALERT: SMBus alert
373 * @arg FMPI2C_FLAG_BUSY: Bus busy
374 * @arg FMPI2C_FLAG_DIR: Transfer direction (slave mode)
375 *
376 * @retval The new state of __FLAG__ (TRUE or FALSE).
377 */
378#define __HAL_FMPI2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & ((__FLAG__) & FMPI2C_FLAG_MASK)) == ((__FLAG__) & FMPI2C_FLAG_MASK)))
379
380/** @brief Clears the FMPI2C pending flags which are cleared by writing 1 in a specific bit.
381 * @param __HANDLE__: specifies the FMPI2C Handle.
382 * This parameter can be FMPI2C where x: 1 or 2 to select the FMPI2C peripheral.
383 * @param __FLAG__: specifies the flag to clear.
384 * This parameter can be any combination of the following values:
385 * @arg FMPI2C_FLAG_ADDR: Address matched (slave mode)
386 * @arg FMPI2C_FLAG_AF: Acknowledge failure received flag
387 * @arg FMPI2C_FLAG_STOPF: STOP detection flag
388 * @arg FMPI2C_FLAG_BERR: Bus error
389 * @arg FMPI2C_FLAG_ARLO: Arbitration lost
390 * @arg FMPI2C_FLAG_OVR: Overrun/Underrun
391 * @arg FMPI2C_FLAG_PECERR: PEC error in reception
392 * @arg FMPI2C_FLAG_TIMEOUT: Timeout or Tlow detection flag
393 * @arg FMPI2C_FLAG_ALERT: SMBus alert
394 *
395 * @retval None
396 */
397#define __HAL_FMPI2C_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = ((__FLAG__) & FMPI2C_FLAG_MASK))
398
399
400#define __HAL_FMPI2C_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= FMPI2C_CR1_PE)
401#define __HAL_FMPI2C_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~FMPI2C_CR1_PE)
402
403#define __HAL_FMPI2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(FMPI2C_CR2_SADD | FMPI2C_CR2_HEAD10R | FMPI2C_CR2_NBYTES | FMPI2C_CR2_RELOAD | FMPI2C_CR2_RD_WRN)))
404
405#define __HAL_FMPI2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00))) >> 8)))
406#define __HAL_FMPI2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FF))))
407
408#define __HAL_FMPI2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == FMPI2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (FMPI2C_CR2_SADD)) | (FMPI2C_CR2_START) | (FMPI2C_CR2_AUTOEND)) & (~FMPI2C_CR2_RD_WRN)) : \
409 (uint32_t)((((uint32_t)(__ADDRESS__) & (FMPI2C_CR2_SADD)) | (FMPI2C_CR2_ADD10) | (FMPI2C_CR2_START)) & (~FMPI2C_CR2_RD_WRN)))
410
411#define IS_FMPI2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= (uint32_t)0x000003FF)
412#define IS_FMPI2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FF)
413
414/**
415 * @}
416 */
417
418/* Include FMPI2C HAL Extension module */
419#include "stm32f4xx_hal_fmpi2c_ex.h"
420
421/* Exported functions --------------------------------------------------------*/
422/** @addtogroup FMPI2C_Exported_Functions
423 * @{
424 */
425
426/** @addtogroup FMPI2C_Exported_Functions_Group1
427 * @{
428 */
429
430/* Initialization/de-initialization functions**********************************/
431HAL_StatusTypeDef HAL_FMPI2C_Init(FMPI2C_HandleTypeDef *hFMPI2C);
432HAL_StatusTypeDef HAL_FMPI2C_DeInit (FMPI2C_HandleTypeDef *hFMPI2C);
433void HAL_FMPI2C_MspInit(FMPI2C_HandleTypeDef *hFMPI2C);
434void HAL_FMPI2C_MspDeInit(FMPI2C_HandleTypeDef *hFMPI2C);
435
436/**
437 * @}
438 */
439
440/** @addtogroup FMPI2C_Exported_Functions_Group2
441 * @{
442 */
443
444/* I/O operation functions ***************************************************/
445 /******* Blocking mode: Polling */
446HAL_StatusTypeDef HAL_FMPI2C_Master_Transmit(FMPI2C_HandleTypeDef *hFMPI2C, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
447HAL_StatusTypeDef HAL_FMPI2C_Master_Receive(FMPI2C_HandleTypeDef *hFMPI2C, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
448HAL_StatusTypeDef HAL_FMPI2C_Slave_Transmit(FMPI2C_HandleTypeDef *hFMPI2C, uint8_t *pData, uint16_t Size, uint32_t Timeout);
449HAL_StatusTypeDef HAL_FMPI2C_Slave_Receive(FMPI2C_HandleTypeDef *hFMPI2C, uint8_t *pData, uint16_t Size, uint32_t Timeout);
450HAL_StatusTypeDef HAL_FMPI2C_Mem_Write(FMPI2C_HandleTypeDef *hFMPI2C, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
451HAL_StatusTypeDef HAL_FMPI2C_Mem_Read(FMPI2C_HandleTypeDef *hFMPI2C, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
452HAL_StatusTypeDef HAL_FMPI2C_IsDeviceReady(FMPI2C_HandleTypeDef *hFMPI2C, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
453
454 /******* Non-Blocking mode: Interrupt */
455HAL_StatusTypeDef HAL_FMPI2C_Master_Transmit_IT(FMPI2C_HandleTypeDef *hFMPI2C, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
456HAL_StatusTypeDef HAL_FMPI2C_Master_Receive_IT(FMPI2C_HandleTypeDef *hFMPI2C, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
457HAL_StatusTypeDef HAL_FMPI2C_Slave_Transmit_IT(FMPI2C_HandleTypeDef *hFMPI2C, uint8_t *pData, uint16_t Size);
458HAL_StatusTypeDef HAL_FMPI2C_Slave_Receive_IT(FMPI2C_HandleTypeDef *hFMPI2C, uint8_t *pData, uint16_t Size);
459HAL_StatusTypeDef HAL_FMPI2C_Mem_Write_IT(FMPI2C_HandleTypeDef *hFMPI2C, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
460HAL_StatusTypeDef HAL_FMPI2C_Mem_Read_IT(FMPI2C_HandleTypeDef *hFMPI2C, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
461
462 /******* Non-Blocking mode: DMA */
463HAL_StatusTypeDef HAL_FMPI2C_Master_Transmit_DMA(FMPI2C_HandleTypeDef *hFMPI2C, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
464HAL_StatusTypeDef HAL_FMPI2C_Master_Receive_DMA(FMPI2C_HandleTypeDef *hFMPI2C, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
465HAL_StatusTypeDef HAL_FMPI2C_Slave_Transmit_DMA(FMPI2C_HandleTypeDef *hFMPI2C, uint8_t *pData, uint16_t Size);
466HAL_StatusTypeDef HAL_FMPI2C_Slave_Receive_DMA(FMPI2C_HandleTypeDef *hFMPI2C, uint8_t *pData, uint16_t Size);
467HAL_StatusTypeDef HAL_FMPI2C_Mem_Write_DMA(FMPI2C_HandleTypeDef *hFMPI2C, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
468HAL_StatusTypeDef HAL_FMPI2C_Mem_Read_DMA(FMPI2C_HandleTypeDef *hFMPI2C, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
469
470 /******* FMPI2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
471void HAL_FMPI2C_EV_IRQHandler(FMPI2C_HandleTypeDef *hFMPI2C);
472void HAL_FMPI2C_ER_IRQHandler(FMPI2C_HandleTypeDef *hFMPI2C);
473void HAL_FMPI2C_MasterTxCpltCallback(FMPI2C_HandleTypeDef *hFMPI2C);
474void HAL_FMPI2C_MasterRxCpltCallback(FMPI2C_HandleTypeDef *hFMPI2C);
475void HAL_FMPI2C_SlaveTxCpltCallback(FMPI2C_HandleTypeDef *hFMPI2C);
476void HAL_FMPI2C_SlaveRxCpltCallback(FMPI2C_HandleTypeDef *hFMPI2C);
477void HAL_FMPI2C_MemTxCpltCallback(FMPI2C_HandleTypeDef *hFMPI2C);
478void HAL_FMPI2C_MemRxCpltCallback(FMPI2C_HandleTypeDef *hFMPI2C);
479void HAL_FMPI2C_ErrorCallback(FMPI2C_HandleTypeDef *hFMPI2C);
480/**
481 * @}
482 */
483
484/** @addtogroup FMPI2C_Exported_Functions_Group3
485 * @{
486 */
487
488/* Peripheral State functions ************************************************/
489HAL_FMPI2C_StateTypeDef HAL_FMPI2C_GetState(FMPI2C_HandleTypeDef *hFMPI2C);
490uint32_t HAL_FMPI2C_GetError(FMPI2C_HandleTypeDef *hFMPI2C);
491
492/**
493 * @}
494 */
495
496/**
497 * @}
498 */
499
500/* Private types -------------------------------------------------------------*/
501
502/* Private variables ---------------------------------------------------------*/
503/* Private constants ---------------------------------------------------------*/
504/** @defgroup FMPI2C_Private_Constants FMPI2C Private Constants
505 * @{
506 */
507#define FMPI2C_FLAG_MASK ((uint32_t)0x0001FFFF)
508/**
509 * @}
510 */
511
512/* Private macros ------------------------------------------------------------*/
513/** @defgroup FMPI2C_Private_Macros FMPI2C Private Macros
514 * @{
515 */
516
517#define IS_FMPI2C_ADDRESSING_MODE(MODE) (((MODE) == FMPI2C_ADDRESSINGMODE_7BIT) || \
518 ((MODE) == FMPI2C_ADDRESSINGMODE_10BIT))
519
520#define IS_FMPI2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == FMPI2C_DUALADDRESS_DISABLE) || \
521 ((ADDRESS) == FMPI2C_DUALADDRESS_ENABLE))
522
523#define IS_FMPI2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == FMPI2C_OA2_NOMASK) || \
524 ((MASK) == FMPI2C_OA2_MASK01) || \
525 ((MASK) == FMPI2C_OA2_MASK02) || \
526 ((MASK) == FMPI2C_OA2_MASK03) || \
527 ((MASK) == FMPI2C_OA2_MASK04) || \
528 ((MASK) == FMPI2C_OA2_MASK05) || \
529 ((MASK) == FMPI2C_OA2_MASK06) || \
530 ((MASK) == FMPI2C_OA2_MASK07))
531
532#define IS_FMPI2C_GENERAL_CALL(CALL) (((CALL) == FMPI2C_GENERALCALL_DISABLE) || \
533 ((CALL) == FMPI2C_GENERALCALL_ENABLE))
534
535#define IS_FMPI2C_NO_STRETCH(STRETCH) (((STRETCH) == FMPI2C_NOSTRETCH_DISABLE) || \
536 ((STRETCH) == FMPI2C_NOSTRETCH_ENABLE))
537
538#define IS_FMPI2C_MEMADD_SIZE(SIZE) (((SIZE) == FMPI2C_MEMADD_SIZE_8BIT) || \
539 ((SIZE) == FMPI2C_MEMADD_SIZE_16BIT))
540
541#define IS_TRANSFER_MODE(MODE) (((MODE) == FMPI2C_RELOAD_MODE) || \
542 ((MODE) == FMPI2C_AUTOEND_MODE) || \
543 ((MODE) == FMPI2C_SOFTEND_MODE))
544
545#define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == FMPI2C_GENERATE_STOP) || \
546 ((REQUEST) == FMPI2C_GENERATE_START_READ) || \
547 ((REQUEST) == FMPI2C_GENERATE_START_WRITE) || \
548 ((REQUEST) == FMPI2C_NO_STARTSTOP))
549
550/**
551 * @}
552 */
553/* Private functions ---------------------------------------------------------*/
554/** @defgroup FMPI2C_Private_Functions FMPI2C Private Functions
555 * @brief FMPI2C private functions
556 * @{
557 */
558/**
559 * @}
560 */
561
562/**
563 * @}
564 */
565
566/**
567 * @}
568 */
569#endif /* STM32F410xx || STM32F446xx */
570#ifdef __cplusplus
571}
572#endif
573
574
575#endif /* __STM32F4xx_HAL_FMPI2C_H */
576
577/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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