source: asp3_wo_tecs/trunk/arch/arm_m_gcc/stm32f4xx_stm32cube/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_dac.h@ 303

Last change on this file since 303 was 303, checked in by ertl-honda, 7 years ago

nucleo_f401re依存部の追加
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1/**
2 ******************************************************************************
3 * @file stm32f4xx_hal_dac.h
4 * @author MCD Application Team
5 * @version V1.4.1
6 * @date 09-October-2015
7 * @brief Header file of DAC HAL module.
8 ******************************************************************************
9 * @attention
10 *
11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
12 *
13 * Redistribution and use in source and binary forms, with or without modification,
14 * are permitted provided that the following conditions are met:
15 * 1. Redistributions of source code must retain the above copyright notice,
16 * this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright notice,
18 * this list of conditions and the following disclaimer in the documentation
19 * and/or other materials provided with the distribution.
20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
21 * may be used to endorse or promote products derived from this software
22 * without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 ******************************************************************************
36 */
37
38/* Define to prevent recursive inclusion -------------------------------------*/
39#ifndef __STM32F4xx_HAL_DAC_H
40#define __STM32F4xx_HAL_DAC_H
41
42#ifdef __cplusplus
43 extern "C" {
44#endif
45
46#if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) ||\
47 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
48 defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F446xx) ||\
49 defined(STM32F469xx) || defined(STM32F479xx)
50
51/* Includes ------------------------------------------------------------------*/
52#include "stm32f4xx_hal_def.h"
53
54/** @addtogroup STM32F4xx_HAL_Driver
55 * @{
56 */
57
58/** @addtogroup DAC
59 * @{
60 */
61
62/* Exported types ------------------------------------------------------------*/
63/** @defgroup DAC_Exported_Types DAC Exported Types
64 * @{
65 */
66
67/**
68 * @brief HAL State structures definition
69 */
70typedef enum
71{
72 HAL_DAC_STATE_RESET = 0x00, /*!< DAC not yet initialized or disabled */
73 HAL_DAC_STATE_READY = 0x01, /*!< DAC initialized and ready for use */
74 HAL_DAC_STATE_BUSY = 0x02, /*!< DAC internal processing is ongoing */
75 HAL_DAC_STATE_TIMEOUT = 0x03, /*!< DAC timeout state */
76 HAL_DAC_STATE_ERROR = 0x04 /*!< DAC error state */
77}HAL_DAC_StateTypeDef;
78
79/**
80 * @brief DAC handle Structure definition
81 */
82typedef struct
83{
84 DAC_TypeDef *Instance; /*!< Register base address */
85
86 __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */
87
88 HAL_LockTypeDef Lock; /*!< DAC locking object */
89
90 DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */
91
92 DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */
93
94 __IO uint32_t ErrorCode; /*!< DAC Error code */
95
96}DAC_HandleTypeDef;
97
98/**
99 * @brief DAC Configuration regular Channel structure definition
100 */
101typedef struct
102{
103 uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel.
104 This parameter can be a value of @ref DAC_trigger_selection */
105
106 uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled.
107 This parameter can be a value of @ref DAC_output_buffer */
108}DAC_ChannelConfTypeDef;
109/**
110 * @}
111 */
112
113/* Exported constants --------------------------------------------------------*/
114/** @defgroup DAC_Exported_Constants DAC Exported Constants
115 * @{
116 */
117
118/** @defgroup DAC_Error_Code DAC Error Code
119 * @{
120 */
121#define HAL_DAC_ERROR_NONE 0x00 /*!< No error */
122#define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01 /*!< DAC channel1 DAM underrun error */
123#define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02 /*!< DAC channel2 DAM underrun error */
124#define HAL_DAC_ERROR_DMA 0x04 /*!< DMA error */
125/**
126 * @}
127 */
128
129/** @defgroup DAC_trigger_selection DAC Trigger Selection
130 * @{
131 */
132
133#define DAC_TRIGGER_NONE ((uint32_t)0x00000000) /*!< Conversion is automatic once the DAC1_DHRxxxx register
134 has been loaded, and not by external trigger */
135#define DAC_TRIGGER_T2_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TEN1)) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */
136#define DAC_TRIGGER_T4_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */
137#define DAC_TRIGGER_T5_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */
138#define DAC_TRIGGER_T6_TRGO ((uint32_t)DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */
139#define DAC_TRIGGER_T7_TRGO ((uint32_t)(DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */
140#define DAC_TRIGGER_T8_TRGO ((uint32_t)(DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel */
141
142#define DAC_TRIGGER_EXT_IT9 ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */
143#define DAC_TRIGGER_SOFTWARE ((uint32_t)(DAC_CR_TSEL1 | DAC_CR_TEN1)) /*!< Conversion started by software trigger for DAC channel */
144/**
145 * @}
146 */
147
148/** @defgroup DAC_output_buffer DAC Output Buffer
149 * @{
150 */
151#define DAC_OUTPUTBUFFER_ENABLE ((uint32_t)0x00000000)
152#define DAC_OUTPUTBUFFER_DISABLE ((uint32_t)DAC_CR_BOFF1)
153/**
154 * @}
155 */
156
157/** @defgroup DAC_Channel_selection DAC Channel Selection
158 * @{
159 */
160#define DAC_CHANNEL_1 ((uint32_t)0x00000000)
161#define DAC_CHANNEL_2 ((uint32_t)0x00000010)
162/**
163 * @}
164 */
165
166/** @defgroup DAC_data_alignment DAC Data Alignment
167 * @{
168 */
169#define DAC_ALIGN_12B_R ((uint32_t)0x00000000)
170#define DAC_ALIGN_12B_L ((uint32_t)0x00000004)
171#define DAC_ALIGN_8B_R ((uint32_t)0x00000008)
172/**
173 * @}
174 */
175
176/** @defgroup DAC_flags_definition DAC Flags Definition
177 * @{
178 */
179#define DAC_FLAG_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1)
180#define DAC_FLAG_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2)
181/**
182 * @}
183 */
184
185/** @defgroup DAC_IT_definition DAC IT Definition
186 * @{
187 */
188#define DAC_IT_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1)
189#define DAC_IT_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2)
190/**
191 * @}
192 */
193
194/**
195 * @}
196 */
197
198/* Exported macro ------------------------------------------------------------*/
199/** @defgroup DAC_Exported_Macros DAC Exported Macros
200 * @{
201 */
202
203/** @brief Reset DAC handle state
204 * @param __HANDLE__: specifies the DAC handle.
205 * @retval None
206 */
207#define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET)
208
209/** @brief Enable the DAC channel
210 * @param __HANDLE__: specifies the DAC handle.
211 * @param __DAC_Channel__: specifies the DAC channel
212 * @retval None
213 */
214#define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << (__DAC_Channel__)))
215
216/** @brief Disable the DAC channel
217 * @param __HANDLE__: specifies the DAC handle
218 * @param __DAC_Channel__: specifies the DAC channel.
219 * @retval None
220 */
221#define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << (__DAC_Channel__)))
222
223/** @brief Enable the DAC interrupt
224 * @param __HANDLE__: specifies the DAC handle
225 * @param __INTERRUPT__: specifies the DAC interrupt.
226 * @retval None
227 */
228#define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__))
229
230/** @brief Disable the DAC interrupt
231 * @param __HANDLE__: specifies the DAC handle
232 * @param __INTERRUPT__: specifies the DAC interrupt.
233 * @retval None
234 */
235#define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__))
236
237/** @brief Checks if the specified DAC interrupt source is enabled or disabled.
238 * @param __HANDLE__: DAC handle
239 * @param __INTERRUPT__: DAC interrupt source to check
240 * This parameter can be any combination of the following values:
241 * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
242 * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt
243 * @retval State of interruption (SET or RESET)
244 */
245#define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__))
246
247/** @brief Get the selected DAC's flag status.
248 * @param __HANDLE__: specifies the DAC handle.
249 * @param __FLAG__: specifies the flag to clear.
250 * This parameter can be any combination of the following values:
251 * @arg DAC_FLAG_DMAUDR1: DMA underrun 1 flag
252 * @arg DAC_FLAG_DMAUDR2: DMA underrun 2 flag
253 * @retval None
254 */
255#define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
256
257/** @brief Clear the DAC's flag.
258 * @param __HANDLE__: specifies the DAC handle.
259 * @param __FLAG__: specifies the flag to clear.
260 * This parameter can be any combination of the following values:
261 * @arg DAC_FLAG_DMAUDR1: DMA underrun 1 flag
262 * @arg DAC_FLAG_DMAUDR2: DMA underrun 2 flag
263 * @retval None
264 */
265#define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__))
266/**
267 * @}
268 */
269
270/* Include DAC HAL Extension module */
271#include "stm32f4xx_hal_dac_ex.h"
272
273/* Exported functions --------------------------------------------------------*/
274/** @addtogroup DAC_Exported_Functions
275 * @{
276 */
277
278/** @addtogroup DAC_Exported_Functions_Group1
279 * @{
280 */
281/* Initialization/de-initialization functions *********************************/
282HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac);
283HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac);
284void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac);
285void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac);
286/**
287 * @}
288 */
289
290/** @addtogroup DAC_Exported_Functions_Group2
291 * @{
292 */
293/* I/O operation functions ****************************************************/
294HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel);
295HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel);
296HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment);
297HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel);
298uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel);
299/**
300 * @}
301 */
302
303/** @addtogroup DAC_Exported_Functions_Group3
304 * @{
305 */
306/* Peripheral Control functions ***********************************************/
307HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel);
308HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data);
309/**
310 * @}
311 */
312
313/** @addtogroup DAC_Exported_Functions_Group4
314 * @{
315 */
316/* Peripheral State functions *************************************************/
317HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac);
318void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac);
319uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac);
320
321void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac);
322void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac);
323void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac);
324void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac);
325/**
326 * @}
327 */
328
329/**
330 * @}
331 */
332/* Private types -------------------------------------------------------------*/
333/* Private variables ---------------------------------------------------------*/
334/* Private constants ---------------------------------------------------------*/
335/** @defgroup DAC_Private_Constants DAC Private Constants
336 * @{
337 */
338
339/**
340 * @}
341 */
342
343/* Private macros ------------------------------------------------------------*/
344/** @defgroup DAC_Private_Macros DAC Private Macros
345 * @{
346 */
347#define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0)
348#define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \
349 ((ALIGN) == DAC_ALIGN_12B_L) || \
350 ((ALIGN) == DAC_ALIGN_8B_R))
351#define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \
352 ((CHANNEL) == DAC_CHANNEL_2))
353#define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \
354 ((STATE) == DAC_OUTPUTBUFFER_DISABLE))
355
356#define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \
357 ((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \
358 ((TRIGGER) == DAC_TRIGGER_T8_TRGO) || \
359 ((TRIGGER) == DAC_TRIGGER_T7_TRGO) || \
360 ((TRIGGER) == DAC_TRIGGER_T5_TRGO) || \
361 ((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \
362 ((TRIGGER) == DAC_TRIGGER_T4_TRGO) || \
363 ((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \
364 ((TRIGGER) == DAC_TRIGGER_SOFTWARE))
365
366/** @brief Set DHR12R1 alignment
367 * @param __ALIGNMENT__: specifies the DAC alignment
368 * @retval None
369 */
370#define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000008) + (__ALIGNMENT__))
371
372/** @brief Set DHR12R2 alignment
373 * @param __ALIGNMENT__: specifies the DAC alignment
374 * @retval None
375 */
376#define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000014) + (__ALIGNMENT__))
377
378/** @brief Set DHR12RD alignment
379 * @param __ALIGNMENT__: specifies the DAC alignment
380 * @retval None
381 */
382#define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000020) + (__ALIGNMENT__))
383
384/**
385 * @}
386 */
387
388/* Private functions ---------------------------------------------------------*/
389/** @defgroup DAC_Private_Functions DAC Private Functions
390 * @{
391 */
392/**
393 * @}
394 */
395#endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx ||\
396 STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||\
397 STM32F410xx || STM32F446xx || STM32F469xx || STM32F479xx */
398
399/**
400 * @}
401 */
402
403/**
404 * @}
405 */
406
407#ifdef __cplusplus
408}
409#endif
410
411#endif /*__STM32F4xx_HAL_DAC_H */
412
413/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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