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source: asp3_wo_tecs/trunk/arch/arm_m_gcc/stm32f4xx_stm32cube/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_can.h@ 303

Last change on this file since 303 was 303, checked in by ertl-honda, 7 years ago
nucleo_f401re依存部の追加
File size: 34.8 KB

Line
1	/**
2	******************************************************************************
3	* @file stm32f4xx_hal_can.h
4	* @author MCD Application Team
5	* @version V1.4.1
6	* @date 09-October-2015
7	* @brief Header file of CAN HAL module.
8	******************************************************************************
9	* @attention
10	*
11	* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
12	*
13	* Redistribution and use in source and binary forms, with or without modification,
14	* are permitted provided that the following conditions are met:
15	* 1. Redistributions of source code must retain the above copyright notice,
16	* this list of conditions and the following disclaimer.
17	* 2. Redistributions in binary form must reproduce the above copyright notice,
18	* this list of conditions and the following disclaimer in the documentation
19	* and/or other materials provided with the distribution.
20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
21	* may be used to endorse or promote products derived from this software
22	* without specific prior written permission.
23	*
24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34	*
35	******************************************************************************
36	*/
37
38	/* Define to prevent recursive inclusion -------------------------------------*/
39	#ifndef __STM32F4xx_HAL_CAN_H
40	#define __STM32F4xx_HAL_CAN_H
41
42	#ifdef __cplusplus
43	extern "C" {
44	#endif
45
46	#if defined(STM32F405xx) \|\| defined(STM32F415xx) \|\| defined(STM32F407xx) \|\| defined(STM32F417xx) \|\|\
47	defined(STM32F427xx) \|\| defined(STM32F437xx) \|\| defined(STM32F429xx) \|\| defined(STM32F439xx) \|\|\
48	defined(STM32F446xx) \|\| defined(STM32F469xx) \|\| defined(STM32F479xx)
49	/* Includes ------------------------------------------------------------------*/
50	#include "stm32f4xx_hal_def.h"
51
52	/** @addtogroup STM32F4xx_HAL_Driver
53	* @{
54	*/
55
56	/** @addtogroup CAN
57	* @{
58	*/
59
60	/* Exported types ------------------------------------------------------------*/
61	/** @defgroup CAN_Exported_Types CAN Exported Types
62	* @{
63	*/
64
65	/**
66	* @brief HAL State structures definition
67	*/
68	typedef enum
69	{
70	HAL_CAN_STATE_RESET = 0x00, /!< CAN not yet initialized or disabled /
71	HAL_CAN_STATE_READY = 0x01, /!< CAN initialized and ready for use /
72	HAL_CAN_STATE_BUSY = 0x02, /!< CAN process is ongoing /
73	HAL_CAN_STATE_BUSY_TX = 0x12, /!< CAN process is ongoing /
74	HAL_CAN_STATE_BUSY_RX = 0x22, /!< CAN process is ongoing /
75	HAL_CAN_STATE_BUSY_TX_RX = 0x32, /!< CAN process is ongoing /
76	HAL_CAN_STATE_TIMEOUT = 0x03, /!< Timeout state /
77	HAL_CAN_STATE_ERROR = 0x04 /!< CAN error state /
78
79	}HAL_CAN_StateTypeDef;
80
81	/**
82	* @brief CAN init structure definition
83	*/
84	typedef struct
85	{
86	uint32_t Prescaler; /*!< Specifies the length of a time quantum.
87	This parameter must be a number between Min_Data = 1 and Max_Data = 1024 */
88
89	uint32_t Mode; /*!< Specifies the CAN operating mode.
90	This parameter can be a value of @ref CAN_operating_mode */
91
92	uint32_t SJW; /*!< Specifies the maximum number of time quanta
93	the CAN hardware is allowed to lengthen or
94	shorten a bit to perform resynchronization.
95	This parameter can be a value of @ref CAN_synchronisation_jump_width */
96
97	uint32_t BS1; /*!< Specifies the number of time quanta in Bit Segment 1.
98	This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_1 */
99
100	uint32_t BS2; /*!< Specifies the number of time quanta in Bit Segment 2.
101	This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_2 */
102
103	uint32_t TTCM; /*!< Enable or disable the time triggered communication mode.
104	This parameter can be set to ENABLE or DISABLE. */
105
106	uint32_t ABOM; /*!< Enable or disable the automatic bus-off management.
107	This parameter can be set to ENABLE or DISABLE */
108
109	uint32_t AWUM; /*!< Enable or disable the automatic wake-up mode.
110	This parameter can be set to ENABLE or DISABLE */
111
112	uint32_t NART; /*!< Enable or disable the non-automatic retransmission mode.
113	This parameter can be set to ENABLE or DISABLE */
114
115	uint32_t RFLM; /*!< Enable or disable the receive FIFO Locked mode.
116	This parameter can be set to ENABLE or DISABLE */
117
118	uint32_t TXFP; /*!< Enable or disable the transmit FIFO priority.
119	This parameter can be set to ENABLE or DISABLE */
120	}CAN_InitTypeDef;
121
122	/**
123	* @brief CAN filter configuration structure definition
124	*/
125	typedef struct
126	{
127	uint32_t FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit
128	configuration, first one for a 16-bit configuration).
129	This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
130
131	uint32_t FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit
132	configuration, second one for a 16-bit configuration).
133	This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
134
135	uint32_t FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number,
136	according to the mode (MSBs for a 32-bit configuration,
137	first one for a 16-bit configuration).
138	This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
139
140	uint32_t FilterMaskIdLow; /*!< Specifies the filter mask number or identification number,
141	according to the mode (LSBs for a 32-bit configuration,
142	second one for a 16-bit configuration).
143	This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
144
145	uint32_t FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1) which will be assigned to the filter.
146	This parameter can be a value of @ref CAN_filter_FIFO */
147
148	uint32_t FilterNumber; /*!< Specifies the filter which will be initialized.
149	This parameter must be a number between Min_Data = 0 and Max_Data = 27 */
150
151	uint32_t FilterMode; /*!< Specifies the filter mode to be initialized.
152	This parameter can be a value of @ref CAN_filter_mode */
153
154	uint32_t FilterScale; /*!< Specifies the filter scale.
155	This parameter can be a value of @ref CAN_filter_scale */
156
157	uint32_t FilterActivation; /*!< Enable or disable the filter.
158	This parameter can be set to ENABLE or DISABLE. */
159
160	uint32_t BankNumber; /*!< Select the start slave bank filter.
161	This parameter must be a number between Min_Data = 0 and Max_Data = 28 */
162
163	}CAN_FilterConfTypeDef;
164
165	/**
166	* @brief CAN Tx message structure definition
167	*/
168	typedef struct
169	{
170	uint32_t StdId; /*!< Specifies the standard identifier.
171	This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */
172
173	uint32_t ExtId; /*!< Specifies the extended identifier.
174	This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */
175
176	uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted.
177	This parameter can be a value of @ref CAN_Identifier_Type */
178
179	uint32_t RTR; /*!< Specifies the type of frame for the message that will be transmitted.
180	This parameter can be a value of @ref CAN_remote_transmission_request */
181
182	uint32_t DLC; /*!< Specifies the length of the frame that will be transmitted.
183	This parameter must be a number between Min_Data = 0 and Max_Data = 8 */
184
185	uint8_t Data[8]; /*!< Contains the data to be transmitted.
186	This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
187
188	}CanTxMsgTypeDef;
189
190	/**
191	* @brief CAN Rx message structure definition
192	*/
193	typedef struct
194	{
195	uint32_t StdId; /*!< Specifies the standard identifier.
196	This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */
197
198	uint32_t ExtId; /*!< Specifies the extended identifier.
199	This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */
200
201	uint32_t IDE; /*!< Specifies the type of identifier for the message that will be received.
202	This parameter can be a value of @ref CAN_Identifier_Type */
203
204	uint32_t RTR; /*!< Specifies the type of frame for the received message.
205	This parameter can be a value of @ref CAN_remote_transmission_request */
206
207	uint32_t DLC; /*!< Specifies the length of the frame that will be received.
208	This parameter must be a number between Min_Data = 0 and Max_Data = 8 */
209
210	uint8_t Data[8]; /*!< Contains the data to be received.
211	This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
212
213	uint32_t FMI; /*!< Specifies the index of the filter the message stored in the mailbox passes through.
214	This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
215
216	uint32_t FIFONumber; /*!< Specifies the receive FIFO number.
217	This parameter can be CAN_FIFO0 or CAN_FIFO1 */
218
219	}CanRxMsgTypeDef;
220
221	/**
222	* @brief CAN handle Structure definition
223	*/
224	typedef struct
225	{
226	CAN_TypeDef Instance; /!< Register base address */
227
228	CAN_InitTypeDef Init; /!< CAN required parameters /
229
230	CanTxMsgTypeDef* pTxMsg; /!< Pointer to transmit structure /
231
232	CanRxMsgTypeDef* pRxMsg; /!< Pointer to reception structure /
233
234	__IO HAL_CAN_StateTypeDef State; /!< CAN communication state /
235
236	HAL_LockTypeDef Lock; /!< CAN locking object /
237
238	__IO uint32_t ErrorCode; /!< CAN Error code /
239
240	}CAN_HandleTypeDef;
241
242	/**
243	* @}
244	*/
245
246	/* Exported constants --------------------------------------------------------*/
247	/** @defgroup CAN_Exported_Constants CAN Exported Constants
248	* @{
249	*/
250
251	/** @defgroup HAL_CAN_Error_Code HAL CAN Error Code
252	* @{
253	*/
254	#define HAL_CAN_ERROR_NONE 0x00 /!< No error /
255	#define HAL_CAN_ERROR_EWG 0x01 /!< EWG error /
256	#define HAL_CAN_ERROR_EPV 0x02 /!< EPV error /
257	#define HAL_CAN_ERROR_BOF 0x04 /!< BOF error /
258	#define HAL_CAN_ERROR_STF 0x08 /!< Stuff error /
259	#define HAL_CAN_ERROR_FOR 0x10 /!< Form error /
260	#define HAL_CAN_ERROR_ACK 0x20 /!< Acknowledgment error /
261	#define HAL_CAN_ERROR_BR 0x40 /!< Bit recessive /
262	#define HAL_CAN_ERROR_BD 0x80 /!< LEC dominant /
263	#define HAL_CAN_ERROR_CRC 0x100 /!< LEC transfer error /
264	/**
265	* @}
266	*/
267
268	/** @defgroup CAN_InitStatus CAN InitStatus
269	* @{
270	*/
271	#define CAN_INITSTATUS_FAILED ((uint8_t)0x00) /!< CAN initialization failed /
272	#define CAN_INITSTATUS_SUCCESS ((uint8_t)0x01) /!< CAN initialization OK /
273	/**
274	* @}
275	*/
276
277	/** @defgroup CAN_operating_mode CAN Operating Mode
278	* @{
279	*/
280	#define CAN_MODE_NORMAL ((uint32_t)0x00000000) /!< Normal mode /
281	#define CAN_MODE_LOOPBACK ((uint32_t)CAN_BTR_LBKM) /!< Loopback mode /
282	#define CAN_MODE_SILENT ((uint32_t)CAN_BTR_SILM) /!< Silent mode /
283	#define CAN_MODE_SILENT_LOOPBACK ((uint32_t)(CAN_BTR_LBKM \| CAN_BTR_SILM)) /!< Loopback combined with silent mode /
284	/**
285	* @}
286	*/
287
288	/** @defgroup CAN_synchronisation_jump_width CAN Synchronisation Jump Width
289	* @{
290	*/
291	#define CAN_SJW_1TQ ((uint32_t)0x00000000) /!< 1 time quantum /
292	#define CAN_SJW_2TQ ((uint32_t)CAN_BTR_SJW_0) /!< 2 time quantum /
293	#define CAN_SJW_3TQ ((uint32_t)CAN_BTR_SJW_1) /!< 3 time quantum /
294	#define CAN_SJW_4TQ ((uint32_t)CAN_BTR_SJW) /!< 4 time quantum /
295	/**
296	* @}
297	*/
298
299	/** @defgroup CAN_time_quantum_in_bit_segment_1 CAN Time Quantum in bit segment 1
300	* @{
301	*/
302	#define CAN_BS1_1TQ ((uint32_t)0x00000000) /!< 1 time quantum /
303	#define CAN_BS1_2TQ ((uint32_t)CAN_BTR_TS1_0) /!< 2 time quantum /
304	#define CAN_BS1_3TQ ((uint32_t)CAN_BTR_TS1_1) /!< 3 time quantum /
305	#define CAN_BS1_4TQ ((uint32_t)(CAN_BTR_TS1_1 \| CAN_BTR_TS1_0)) /!< 4 time quantum /
306	#define CAN_BS1_5TQ ((uint32_t)CAN_BTR_TS1_2) /!< 5 time quantum /
307	#define CAN_BS1_6TQ ((uint32_t)(CAN_BTR_TS1_2 \| CAN_BTR_TS1_0)) /!< 6 time quantum /
308	#define CAN_BS1_7TQ ((uint32_t)(CAN_BTR_TS1_2 \| CAN_BTR_TS1_1)) /!< 7 time quantum /
309	#define CAN_BS1_8TQ ((uint32_t)(CAN_BTR_TS1_2 \| CAN_BTR_TS1_1 \| CAN_BTR_TS1_0)) /!< 8 time quantum /
310	#define CAN_BS1_9TQ ((uint32_t)CAN_BTR_TS1_3) /!< 9 time quantum /
311	#define CAN_BS1_10TQ ((uint32_t)(CAN_BTR_TS1_3 \| CAN_BTR_TS1_0)) /!< 10 time quantum /
312	#define CAN_BS1_11TQ ((uint32_t)(CAN_BTR_TS1_3 \| CAN_BTR_TS1_1)) /!< 11 time quantum /
313	#define CAN_BS1_12TQ ((uint32_t)(CAN_BTR_TS1_3 \| CAN_BTR_TS1_1 \| CAN_BTR_TS1_0)) /!< 12 time quantum /
314	#define CAN_BS1_13TQ ((uint32_t)(CAN_BTR_TS1_3 \| CAN_BTR_TS1_2)) /!< 13 time quantum /
315	#define CAN_BS1_14TQ ((uint32_t)(CAN_BTR_TS1_3 \| CAN_BTR_TS1_2 \| CAN_BTR_TS1_0)) /!< 14 time quantum /
316	#define CAN_BS1_15TQ ((uint32_t)(CAN_BTR_TS1_3 \| CAN_BTR_TS1_2 \| CAN_BTR_TS1_1)) /!< 15 time quantum /
317	#define CAN_BS1_16TQ ((uint32_t)CAN_BTR_TS1) /!< 16 time quantum /
318	/**
319	* @}
320	*/
321
322	/** @defgroup CAN_time_quantum_in_bit_segment_2 CAN Time Quantum in bit segment 2
323	* @{
324	*/
325	#define CAN_BS2_1TQ ((uint32_t)0x00000000) /!< 1 time quantum /
326	#define CAN_BS2_2TQ ((uint32_t)CAN_BTR_TS2_0) /!< 2 time quantum /
327	#define CAN_BS2_3TQ ((uint32_t)CAN_BTR_TS2_1) /!< 3 time quantum /
328	#define CAN_BS2_4TQ ((uint32_t)(CAN_BTR_TS2_1 \| CAN_BTR_TS2_0)) /!< 4 time quantum /
329	#define CAN_BS2_5TQ ((uint32_t)CAN_BTR_TS2_2) /!< 5 time quantum /
330	#define CAN_BS2_6TQ ((uint32_t)(CAN_BTR_TS2_2 \| CAN_BTR_TS2_0)) /!< 6 time quantum /
331	#define CAN_BS2_7TQ ((uint32_t)(CAN_BTR_TS2_2 \| CAN_BTR_TS2_1)) /!< 7 time quantum /
332	#define CAN_BS2_8TQ ((uint32_t)CAN_BTR_TS2) /!< 8 time quantum /
333	/**
334	* @}
335	*/
336
337	/** @defgroup CAN_filter_mode CAN Filter Mode
338	* @{
339	*/
340	#define CAN_FILTERMODE_IDMASK ((uint8_t)0x00) /!< Identifier mask mode /
341	#define CAN_FILTERMODE_IDLIST ((uint8_t)0x01) /!< Identifier list mode /
342	/**
343	* @}
344	*/
345
346	/** @defgroup CAN_filter_scale CAN Filter Scale
347	* @{
348	*/
349	#define CAN_FILTERSCALE_16BIT ((uint8_t)0x00) /!< Two 16-bit filters /
350	#define CAN_FILTERSCALE_32BIT ((uint8_t)0x01) /!< One 32-bit filter /
351	/**
352	* @}
353	*/
354
355	/** @defgroup CAN_filter_FIFO CAN Filter FIFO
356	* @{
357	*/
358	#define CAN_FILTER_FIFO0 ((uint8_t)0x00) /!< Filter FIFO 0 assignment for filter x /
359	#define CAN_FILTER_FIFO1 ((uint8_t)0x01) /!< Filter FIFO 1 assignment for filter x /
360	/**
361	* @}
362	*/
363
364	/** @defgroup CAN_Identifier_Type CAN Identifier Type
365	* @{
366	*/
367	#define CAN_ID_STD ((uint32_t)0x00000000) /!< Standard Id /
368	#define CAN_ID_EXT ((uint32_t)0x00000004) /!< Extended Id /
369	/**
370	* @}
371	*/
372
373	/** @defgroup CAN_remote_transmission_request CAN Remote Transmission Request
374	* @{
375	*/
376	#define CAN_RTR_DATA ((uint32_t)0x00000000) /!< Data frame /
377	#define CAN_RTR_REMOTE ((uint32_t)0x00000002) /!< Remote frame /
378	/**
379	* @}
380	*/
381
382	/** @defgroup CAN_receive_FIFO_number_constants CAN Receive FIFO Number Constants
383	* @{
384	*/
385	#define CAN_FIFO0 ((uint8_t)0x00) /!< CAN FIFO 0 used to receive /
386	#define CAN_FIFO1 ((uint8_t)0x01) /!< CAN FIFO 1 used to receive /
387	/**
388	* @}
389	*/
390
391	/** @defgroup CAN_flags CAN Flags
392	* @{
393	*/
394	/* If the flag is 0x3XXXXXXX, it means that it can be used with CAN_GetFlagStatus()
395	and CAN_ClearFlag() functions. */
396	/* If the flag is 0x1XXXXXXX, it means that it can only be used with
397	CAN_GetFlagStatus() function. */
398
399	/* Transmit Flags */
400	#define CAN_FLAG_RQCP0 ((uint32_t)0x00000500) /!< Request MailBox0 flag /
401	#define CAN_FLAG_RQCP1 ((uint32_t)0x00000508) /!< Request MailBox1 flag /
402	#define CAN_FLAG_RQCP2 ((uint32_t)0x00000510) /!< Request MailBox2 flag /
403	#define CAN_FLAG_TXOK0 ((uint32_t)0x00000501) /!< Transmission OK MailBox0 flag /
404	#define CAN_FLAG_TXOK1 ((uint32_t)0x00000509) /!< Transmission OK MailBox1 flag /
405	#define CAN_FLAG_TXOK2 ((uint32_t)0x00000511) /!< Transmission OK MailBox2 flag /
406	#define CAN_FLAG_TME0 ((uint32_t)0x0000051A) /!< Transmit mailbox 0 empty flag /
407	#define CAN_FLAG_TME1 ((uint32_t)0x0000051B) /!< Transmit mailbox 0 empty flag /
408	#define CAN_FLAG_TME2 ((uint32_t)0x0000051C) /!< Transmit mailbox 0 empty flag /
409
410	/* Receive Flags */
411	#define CAN_FLAG_FF0 ((uint32_t)0x00000203) /!< FIFO 0 Full flag /
412	#define CAN_FLAG_FOV0 ((uint32_t)0x00000204) /!< FIFO 0 Overrun flag /
413
414	#define CAN_FLAG_FF1 ((uint32_t)0x00000403) /!< FIFO 1 Full flag /
415	#define CAN_FLAG_FOV1 ((uint32_t)0x00000404) /!< FIFO 1 Overrun flag /
416
417	/* Operating Mode Flags */
418	#define CAN_FLAG_WKU ((uint32_t)0x00000103) /!< Wake up flag /
419	#define CAN_FLAG_SLAK ((uint32_t)0x00000101) /!< Sleep acknowledge flag /
420	#define CAN_FLAG_SLAKI ((uint32_t)0x00000104) /!< Sleep acknowledge flag /
421	/* @note When SLAK interrupt is disabled (SLKIE=0), no polling on SLAKI is possible.
422	In this case the SLAK bit can be polled.*/
423
424	/* Error Flags */
425	#define CAN_FLAG_EWG ((uint32_t)0x00000300) /!< Error warning flag /
426	#define CAN_FLAG_EPV ((uint32_t)0x00000301) /!< Error passive flag /
427	#define CAN_FLAG_BOF ((uint32_t)0x00000302) /!< Bus-Off flag /
428	/**
429	* @}
430	*/
431
432	/** @defgroup CAN_Interrupts CAN Interrupts
433	* @{
434	*/
435	#define CAN_IT_TME ((uint32_t)CAN_IER_TMEIE) /!< Transmit mailbox empty interrupt /
436
437	/* Receive Interrupts */
438	#define CAN_IT_FMP0 ((uint32_t)CAN_IER_FMPIE0) /!< FIFO 0 message pending interrupt /
439	#define CAN_IT_FF0 ((uint32_t)CAN_IER_FFIE0) /!< FIFO 0 full interrupt /
440	#define CAN_IT_FOV0 ((uint32_t)CAN_IER_FOVIE0) /!< FIFO 0 overrun interrupt /
441	#define CAN_IT_FMP1 ((uint32_t)CAN_IER_FMPIE1) /!< FIFO 1 message pending interrupt /
442	#define CAN_IT_FF1 ((uint32_t)CAN_IER_FFIE1) /!< FIFO 1 full interrupt /
443	#define CAN_IT_FOV1 ((uint32_t)CAN_IER_FOVIE1) /!< FIFO 1 overrun interrupt /
444
445	/* Operating Mode Interrupts */
446	#define CAN_IT_WKU ((uint32_t)CAN_IER_WKUIE) /!< Wake-up interrupt /
447	#define CAN_IT_SLK ((uint32_t)CAN_IER_SLKIE) /!< Sleep acknowledge interrupt /
448
449	/* Error Interrupts */
450	#define CAN_IT_EWG ((uint32_t)CAN_IER_EWGIE) /!< Error warning interrupt /
451	#define CAN_IT_EPV ((uint32_t)CAN_IER_EPVIE) /!< Error passive interrupt /
452	#define CAN_IT_BOF ((uint32_t)CAN_IER_BOFIE) /!< Bus-off interrupt /
453	#define CAN_IT_LEC ((uint32_t)CAN_IER_LECIE) /!< Last error code interrupt /
454	#define CAN_IT_ERR ((uint32_t)CAN_IER_ERRIE) /!< Error Interrupt /
455	/**
456	* @}
457	*/
458
459	/** @defgroup CAN_Mailboxes_Definition CAN Mailboxes Definition
460	* @{
461	*/
462	#define CAN_TXMAILBOX_0 ((uint8_t)0x00)
463	#define CAN_TXMAILBOX_1 ((uint8_t)0x01)
464	#define CAN_TXMAILBOX_2 ((uint8_t)0x02)
465	/**
466	* @}
467	*/
468
469	/**
470	* @}
471	*/
472
473	/* Exported macro ------------------------------------------------------------*/
474	/** @defgroup CAN_Exported_Macros CAN Exported Macros
475	* @{
476	*/
477
478	/** @brief Reset CAN handle state
479	* @param __HANDLE__: specifies the CAN Handle.
480	* @retval None
481	*/
482	#define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CAN_STATE_RESET)
483
484	/**
485	* @brief Enable the specified CAN interrupts.
486	* @param __HANDLE__: CAN handle
487	* @param __INTERRUPT__: CAN Interrupt
488	* @retval None
489	*/
490	#define __HAL_CAN_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) \|= (__INTERRUPT__))
491
492	/**
493	* @brief Disable the specified CAN interrupts.
494	* @param __HANDLE__: CAN handle
495	* @param __INTERRUPT__: CAN Interrupt
496	* @retval None
497	*/
498	#define __HAL_CAN_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__))
499
500	/**
501	* @brief Return the number of pending received messages.
502	* @param __HANDLE__: CAN handle
503	* @param __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
504	* @retval The number of pending message.
505	*/
506	#define __HAL_CAN_MSG_PENDING(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
507	((uint8_t)((__HANDLE__)->Instance->RF0R&(uint32_t)0x03)) : ((uint8_t)((__HANDLE__)->Instance->RF1R&(uint32_t)0x03)))
508
509	/** @brief Check whether the specified CAN flag is set or not.
510	* @param __HANDLE__: CAN Handle
511	* @param __FLAG__: specifies the flag to check.
512	* This parameter can be one of the following values:
513	* @arg CAN_TSR_RQCP0: Request MailBox0 Flag
514	* @arg CAN_TSR_RQCP1: Request MailBox1 Flag
515	* @arg CAN_TSR_RQCP2: Request MailBox2 Flag
516	* @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
517	* @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
518	* @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
519	* @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
520	* @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
521	* @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
522	* @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
523	* @arg CAN_FLAG_FF0: FIFO 0 Full Flag
524	* @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
525	* @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
526	* @arg CAN_FLAG_FF1: FIFO 1 Full Flag
527	* @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
528	* @arg CAN_FLAG_WKU: Wake up Flag
529	* @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
530	* @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
531	* @arg CAN_FLAG_EWG: Error Warning Flag
532	* @arg CAN_FLAG_EPV: Error Passive Flag
533	* @arg CAN_FLAG_BOF: Bus-Off Flag
534	* @retval The new state of __FLAG__ (TRUE or FALSE).
535	*/
536	#define __HAL_CAN_GET_FLAG(__HANDLE__, __FLAG__) \
537	((((__FLAG__) >> 8) == 5)? ((((__HANDLE__)->Instance->TSR) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \
538	(((__FLAG__) >> 8) == 2)? ((((__HANDLE__)->Instance->RF0R) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \
539	(((__FLAG__) >> 8) == 4)? ((((__HANDLE__)->Instance->RF1R) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \
540	(((__FLAG__) >> 8) == 1)? ((((__HANDLE__)->Instance->MSR) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))): \
541	((((__HANDLE__)->Instance->ESR) & (1 << ((__FLAG__) & CAN_FLAG_MASK))) == (1 << ((__FLAG__) & CAN_FLAG_MASK))))
542
543	/** @brief Clear the specified CAN pending flag.
544	* @param __HANDLE__: CAN Handle.
545	* @param __FLAG__: specifies the flag to check.
546	* This parameter can be one of the following values:
547	* @arg CAN_TSR_RQCP0: Request MailBox0 Flag
548	* @arg CAN_TSR_RQCP1: Request MailBox1 Flag
549	* @arg CAN_TSR_RQCP2: Request MailBox2 Flag
550	* @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
551	* @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
552	* @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
553	* @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
554	* @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
555	* @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
556	* @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
557	* @arg CAN_FLAG_FF0: FIFO 0 Full Flag
558	* @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
559	* @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
560	* @arg CAN_FLAG_FF1: FIFO 1 Full Flag
561	* @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
562	* @arg CAN_FLAG_WKU: Wake up Flag
563	* @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
564	* @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
565	* @arg CAN_FLAG_EWG: Error Warning Flag
566	* @arg CAN_FLAG_EPV: Error Passive Flag
567	* @arg CAN_FLAG_BOF: Bus-Off Flag
568	* @retval The new state of __FLAG__ (TRUE or FALSE).
569	*/
570	#define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \
571	((((__FLAG__) >> 8) == 5)? (((__HANDLE__)->Instance->TSR) = ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \
572	(((__FLAG__) >> 8) == 2)? (((__HANDLE__)->Instance->RF0R) = ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \
573	(((__FLAG__) >> 8) == 4)? (((__HANDLE__)->Instance->RF1R) = ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \
574	(((__FLAG__) >> 8) == 1)? (((__HANDLE__)->Instance->MSR) = ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))): \
575	(((__HANDLE__)->Instance->ESR) = ~((uint32_t)1 << ((__FLAG__) & CAN_FLAG_MASK))))
576
577	/** @brief Check if the specified CAN interrupt source is enabled or disabled.
578	* @param __HANDLE__: CAN Handle
579	* @param __INTERRUPT__: specifies the CAN interrupt source to check.
580	* This parameter can be one of the following values:
581	* @arg CAN_IT_TME: Transmit mailbox empty interrupt enable
582	* @arg CAN_IT_FMP0: FIFO0 message pending interrupt enable
583	* @arg CAN_IT_FMP1: FIFO1 message pending interrupt enable
584	* @retval The new state of __IT__ (TRUE or FALSE).
585	*/
586	#define __HAL_CAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
587
588	/**
589	* @brief Check the transmission status of a CAN Frame.
590	* @param __HANDLE__: CAN Handle
591	* @param __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission.
592	* @retval The new status of transmission (TRUE or FALSE).
593	*/
594	#define __HAL_CAN_TRANSMIT_STATUS(__HANDLE__, __TRANSMITMAILBOX__)\
595	(((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP0 \| CAN_TSR_TXOK0 \| CAN_TSR_TME0)) == (CAN_TSR_RQCP0 \| CAN_TSR_TXOK0 \| CAN_TSR_TME0)) :\
596	((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP1 \| CAN_TSR_TXOK1 \| CAN_TSR_TME1)) == (CAN_TSR_RQCP1 \| CAN_TSR_TXOK1 \| CAN_TSR_TME1)) :\
597	((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP2 \| CAN_TSR_TXOK2 \| CAN_TSR_TME2)) == (CAN_TSR_RQCP2 \| CAN_TSR_TXOK2 \| CAN_TSR_TME2)))
598
599	/**
600	* @brief Release the specified receive FIFO.
601	* @param __HANDLE__: CAN handle
602	* @param __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
603	* @retval None
604	*/
605	#define __HAL_CAN_FIFO_RELEASE(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
606	((__HANDLE__)->Instance->RF0R \|= CAN_RF0R_RFOM0) : ((__HANDLE__)->Instance->RF1R \|= CAN_RF1R_RFOM1))
607
608	/**
609	* @brief Cancel a transmit request.
610	* @param __HANDLE__: CAN Handle
611	* @param __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission.
612	* @retval None
613	*/
614	#define __HAL_CAN_CANCEL_TRANSMIT(__HANDLE__, __TRANSMITMAILBOX__)\
615	(((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((__HANDLE__)->Instance->TSR \|= CAN_TSR_ABRQ0) :\
616	((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((__HANDLE__)->Instance->TSR \|= CAN_TSR_ABRQ1) :\
617	((__HANDLE__)->Instance->TSR \|= CAN_TSR_ABRQ2))
618
619	/**
620	* @brief Enable or disable the DBG Freeze for CAN.
621	* @param __HANDLE__: CAN Handle
622	* @param __NEWSTATE__: new state of the CAN peripheral.
623	* This parameter can be: ENABLE (CAN reception/transmission is frozen
624	* during debug. Reception FIFOs can still be accessed/controlled normally)
625	* or DISABLE (CAN is working during debug).
626	* @retval None
627	*/
628	#define __HAL_CAN_DBG_FREEZE(__HANDLE__, __NEWSTATE__) (((__NEWSTATE__) == ENABLE)? \
629	((__HANDLE__)->Instance->MCR \|= CAN_MCR_DBF) : ((__HANDLE__)->Instance->MCR &= ~CAN_MCR_DBF))
630
631	/**
632	* @}
633	*/
634
635	/* Exported functions --------------------------------------------------------*/
636	/** @addtogroup CAN_Exported_Functions
637	* @{
638	*/
639
640	/** @addtogroup CAN_Exported_Functions_Group1
641	* @{
642	*/
643	/* Initialization/de-initialization functions ***********************************/
644	HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan);
645	HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTypeDef* sFilterConfig);
646	HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan);
647	void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan);
648	void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan);
649	/**
650	* @}
651	*/
652
653	/** @addtogroup CAN_Exported_Functions_Group2
654	* @{
655	*/
656	/* I/O operation functions ******************************************************/
657	HAL_StatusTypeDef HAL_CAN_Transmit(CAN_HandleTypeDef *hcan, uint32_t Timeout);
658	HAL_StatusTypeDef HAL_CAN_Transmit_IT(CAN_HandleTypeDef *hcan);
659	HAL_StatusTypeDef HAL_CAN_Receive(CAN_HandleTypeDef *hcan, uint8_t FIFONumber, uint32_t Timeout);
660	HAL_StatusTypeDef HAL_CAN_Receive_IT(CAN_HandleTypeDef *hcan, uint8_t FIFONumber);
661	HAL_StatusTypeDef HAL_CAN_Sleep(CAN_HandleTypeDef *hcan);
662	HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan);
663	void HAL_CAN_IRQHandler(CAN_HandleTypeDef* hcan);
664	void HAL_CAN_TxCpltCallback(CAN_HandleTypeDef* hcan);
665	void HAL_CAN_RxCpltCallback(CAN_HandleTypeDef* hcan);
666	void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan);
667	/**
668	* @}
669	*/
670
671	/** @addtogroup CAN_Exported_Functions_Group3
672	* @{
673	*/
674	/* Peripheral State functions ***************************************************/
675	uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan);
676	HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef* hcan);
677	/**
678	* @}
679	*/
680
681	/**
682	* @}
683	*/
684
685	/* Private types -------------------------------------------------------------*/
686	/** @defgroup CAN_Private_Types CAN Private Types
687	* @{
688	*/
689
690	/**
691	* @}
692	*/
693
694	/* Private variables ---------------------------------------------------------*/
695	/** @defgroup CAN_Private_Variables CAN Private Variables
696	* @{
697	*/
698
699	/**
700	* @}
701	*/
702
703	/* Private constants ---------------------------------------------------------*/
704	/** @defgroup CAN_Private_Constants CAN Private Constants
705	* @{
706	*/
707	#define CAN_TXSTATUS_NOMAILBOX ((uint8_t)0x04) /!< CAN cell did not provide CAN_TxStatus_NoMailBox /
708	#define CAN_FLAG_MASK ((uint32_t)0x000000FF)
709	/**
710	* @}
711	*/
712
713	/* Private macros ------------------------------------------------------------*/
714	/** @defgroup CAN_Private_Macros CAN Private Macros
715	* @{
716	*/
717	#define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) \|\| \
718	((MODE) == CAN_MODE_LOOPBACK)\|\| \
719	((MODE) == CAN_MODE_SILENT) \|\| \
720	((MODE) == CAN_MODE_SILENT_LOOPBACK))
721	#define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1TQ) \|\| ((SJW) == CAN_SJW_2TQ)\|\| \
722	((SJW) == CAN_SJW_3TQ) \|\| ((SJW) == CAN_SJW_4TQ))
723	#define IS_CAN_BS1(BS1) ((BS1) <= CAN_BS1_16TQ)
724	#define IS_CAN_BS2(BS2) ((BS2) <= CAN_BS2_8TQ)
725	#define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1) && ((PRESCALER) <= 1024))
726	#define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 27)
727	#define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) \|\| \
728	((MODE) == CAN_FILTERMODE_IDLIST))
729	#define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FILTERSCALE_16BIT) \|\| \
730	((SCALE) == CAN_FILTERSCALE_32BIT))
731	#define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FILTER_FIFO0) \|\| \
732	((FIFO) == CAN_FILTER_FIFO1))
733	#define IS_CAN_BANKNUMBER(BANKNUMBER) ((BANKNUMBER) <= 28)
734
735	#define IS_CAN_TRANSMITMAILBOX(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= ((uint8_t)0x02))
736	#define IS_CAN_STDID(STDID) ((STDID) <= ((uint32_t)0x7FF))
737	#define IS_CAN_EXTID(EXTID) ((EXTID) <= ((uint32_t)0x1FFFFFFF))
738	#define IS_CAN_DLC(DLC) ((DLC) <= ((uint8_t)0x08))
739
740	#define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_ID_STD) \|\| \
741	((IDTYPE) == CAN_ID_EXT))
742	#define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) \|\| ((RTR) == CAN_RTR_REMOTE))
743	#define IS_CAN_FIFO(FIFO) (((FIFO) == CAN_FIFO0) \|\| ((FIFO) == CAN_FIFO1))
744
745	/**
746	* @}
747	*/
748
749	/* Private functions ---------------------------------------------------------*/
750	/** @defgroup CAN_Private_Functions CAN Private Functions
751	* @{
752	*/
753
754	/**
755	* @}
756	*/
757
758	#endif /* STM32F405xx \|\| STM32F415xx \|\| STM32F407xx \|\| STM32F417xx \|\| STM32F427xx \|\| STM32F437xx \|\|\
759	STM32F429xx \|\| STM32F439xx \|\| STM32F446xx \|\| STM32F469xx \|\| STM32F479xx */
760
761	/**
762	* @}
763	*/
764
765	/**
766	* @}
767	*/
768
769	#ifdef __cplusplus
770	}
771	#endif
772
773	#endif /* __STM32F4xx_CAN_H */
774
775
776	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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