| 1 | /**
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| 2 | ******************************************************************************
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| 3 | * @file stm32f4xx_hal_adc_ex.h
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| 4 | * @author MCD Application Team
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| 5 | * @version V1.4.1
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| 6 | * @date 09-October-2015
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| 7 | * @brief Header file of ADC HAL module.
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| 8 | ******************************************************************************
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| 9 | * @attention
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| 10 | *
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| 11 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
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| 12 | *
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| 13 | * Redistribution and use in source and binary forms, with or without modification,
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| 14 | * are permitted provided that the following conditions are met:
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| 15 | * 1. Redistributions of source code must retain the above copyright notice,
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| 16 | * this list of conditions and the following disclaimer.
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| 17 | * 2. Redistributions in binary form must reproduce the above copyright notice,
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| 18 | * this list of conditions and the following disclaimer in the documentation
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| 19 | * and/or other materials provided with the distribution.
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| 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors
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| 21 | * may be used to endorse or promote products derived from this software
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| 22 | * without specific prior written permission.
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| 23 | *
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| 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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| 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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| 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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| 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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| 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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| 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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| 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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| 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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| 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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| 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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| 34 | *
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| 35 | ******************************************************************************
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| 36 | */
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| 37 |
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| 38 | /* Define to prevent recursive inclusion -------------------------------------*/
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| 39 | #ifndef __STM32F4xx_ADC_EX_H
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| 40 | #define __STM32F4xx_ADC_EX_H
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| 41 |
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| 42 | #ifdef __cplusplus
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| 43 | extern "C" {
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| 44 | #endif
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| 45 |
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| 46 | /* Includes ------------------------------------------------------------------*/
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| 47 | #include "stm32f4xx_hal_def.h"
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| 48 |
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| 49 | /** @addtogroup STM32F4xx_HAL_Driver
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| 50 | * @{
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| 51 | */
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| 52 |
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| 53 | /** @addtogroup ADCEx
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| 54 | * @{
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| 55 | */
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| 56 |
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| 57 | /* Exported types ------------------------------------------------------------*/
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| 58 | /** @defgroup ADCEx_Exported_Types ADC Exported Types
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| 59 | * @{
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| 60 | */
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| 61 |
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| 62 | /**
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| 63 | * @brief ADC Configuration injected Channel structure definition
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| 64 | */
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| 65 | typedef struct
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| 66 | {
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| 67 | uint32_t InjectedChannel; /*!< Configure the ADC injected channel.
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| 68 | This parameter can be a value of @ref ADC_channels */
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| 69 | uint32_t InjectedRank; /*!< The rank in the injected group sequencer
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| 70 | This parameter must be a number between Min_Data = 1 and Max_Data = 4. */
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| 71 | uint32_t InjectedSamplingTime; /*!< The sample time value to be set for the selected channel.
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| 72 | This parameter can be a value of @ref ADC_sampling_times */
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| 73 | uint32_t InjectedOffset; /*!< Defines the offset to be subtracted from the raw converted data when convert injected channels.
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| 74 | This parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF. */
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| 75 | uint32_t InjectedNbrOfConversion; /*!< Specifies the number of ADC conversions that will be done using the sequencer for
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| 76 | injected channel group.
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| 77 | This parameter must be a number between Min_Data = 1 and Max_Data = 4. */
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| 78 | uint32_t AutoInjectedConv; /*!< Enables or disables the selected ADC automatic injected group
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| 79 | conversion after regular one */
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| 80 | uint32_t InjectedDiscontinuousConvMode; /*!< Specifies whether the conversion is performed in Discontinuous mode or not for injected channels.
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| 81 | This parameter can be set to ENABLE or DISABLE. */
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| 82 | uint32_t ExternalTrigInjecConvEdge; /*!< Select the external trigger edge and enable the trigger of an injected channels.
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| 83 | This parameter can be a value of @ref ADCEx_External_trigger_edge_Injected */
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| 84 | uint32_t ExternalTrigInjecConv; /*!< Select the external event used to trigger the start of conversion of a injected channels.
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| 85 | This parameter can be a value of @ref ADCEx_External_trigger_Source_Injected */
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| 86 | }ADC_InjectionConfTypeDef;
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| 87 |
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| 88 | /**
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| 89 | * @brief ADC Configuration multi-mode structure definition
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| 90 | */
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| 91 | typedef struct
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| 92 | {
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| 93 | uint32_t Mode; /*!< Configures the ADC to operate in independent or multi mode.
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| 94 | This parameter can be a value of @ref ADCEx_Common_mode */
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| 95 | uint32_t DMAAccessMode; /*!< Configures the Direct memory access mode for multi ADC mode.
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| 96 | This parameter can be a value of @ref ADCEx_Direct_memory_access_mode_for_multi_mode */
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| 97 | uint32_t TwoSamplingDelay; /*!< Configures the Delay between 2 sampling phases.
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| 98 | This parameter can be a value of @ref ADC_delay_between_2_sampling_phases */
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| 99 | }ADC_MultiModeTypeDef;
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| 100 |
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| 101 | /**
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| 102 | * @}
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| 103 | */
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| 104 |
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| 105 | /* Exported constants --------------------------------------------------------*/
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| 106 | /** @defgroup ADCEx_Exported_Constants ADC Exported Constants
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| 107 | * @{
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| 108 | */
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| 109 |
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| 110 | /** @defgroup ADCEx_Common_mode ADC Common Mode
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| 111 | * @{
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| 112 | */
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| 113 | #define ADC_MODE_INDEPENDENT ((uint32_t)0x00000000)
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| 114 | #define ADC_DUALMODE_REGSIMULT_INJECSIMULT ((uint32_t)ADC_CCR_MULTI_0)
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| 115 | #define ADC_DUALMODE_REGSIMULT_ALTERTRIG ((uint32_t)ADC_CCR_MULTI_1)
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| 116 | #define ADC_DUALMODE_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0))
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| 117 | #define ADC_DUALMODE_REGSIMULT ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1))
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| 118 | #define ADC_DUALMODE_INTERL ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0))
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| 119 | #define ADC_DUALMODE_ALTERTRIG ((uint32_t)(ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0))
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| 120 | #define ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_0))
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| 121 | #define ADC_TRIPLEMODE_REGSIMULT_AlterTrig ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_1))
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| 122 | #define ADC_TRIPLEMODE_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0))
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| 123 | #define ADC_TRIPLEMODE_REGSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1))
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| 124 | #define ADC_TRIPLEMODE_INTERL ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0))
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| 125 | #define ADC_TRIPLEMODE_ALTERTRIG ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0))
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| 126 | /**
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| 127 | * @}
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| 128 | */
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| 129 |
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| 130 | /** @defgroup ADCEx_Direct_memory_access_mode_for_multi_mode ADC Direct Memory Access Mode For Multi Mode
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| 131 | * @{
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| 132 | */
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| 133 | #define ADC_DMAACCESSMODE_DISABLED ((uint32_t)0x00000000) /*!< DMA mode disabled */
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| 134 | #define ADC_DMAACCESSMODE_1 ((uint32_t)ADC_CCR_DMA_0) /*!< DMA mode 1 enabled (2 / 3 half-words one by one - 1 then 2 then 3)*/
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| 135 | #define ADC_DMAACCESSMODE_2 ((uint32_t)ADC_CCR_DMA_1) /*!< DMA mode 2 enabled (2 / 3 half-words by pairs - 2&1 then 1&3 then 3&2)*/
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| 136 | #define ADC_DMAACCESSMODE_3 ((uint32_t)ADC_CCR_DMA) /*!< DMA mode 3 enabled (2 / 3 bytes by pairs - 2&1 then 1&3 then 3&2) */
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| 137 | /**
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| 138 | * @}
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| 139 | */
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| 140 |
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| 141 | /** @defgroup ADCEx_External_trigger_edge_Injected ADC External Trigger Edge Injected
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| 142 | * @{
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| 143 | */
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| 144 | #define ADC_EXTERNALTRIGINJECCONVEDGE_NONE ((uint32_t)0x00000000)
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| 145 | #define ADC_EXTERNALTRIGINJECCONVEDGE_RISING ((uint32_t)ADC_CR2_JEXTEN_0)
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| 146 | #define ADC_EXTERNALTRIGINJECCONVEDGE_FALLING ((uint32_t)ADC_CR2_JEXTEN_1)
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| 147 | #define ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING ((uint32_t)ADC_CR2_JEXTEN)
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| 148 | /**
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| 149 | * @}
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| 150 | */
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| 151 |
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| 152 | /** @defgroup ADCEx_External_trigger_Source_Injected ADC External Trigger Source Injected
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| 153 | * @{
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| 154 | */
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| 155 | #define ADC_EXTERNALTRIGINJECCONV_T1_CC4 ((uint32_t)0x00000000)
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| 156 | #define ADC_EXTERNALTRIGINJECCONV_T1_TRGO ((uint32_t)ADC_CR2_JEXTSEL_0)
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| 157 | #define ADC_EXTERNALTRIGINJECCONV_T2_CC1 ((uint32_t)ADC_CR2_JEXTSEL_1)
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| 158 | #define ADC_EXTERNALTRIGINJECCONV_T2_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
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| 159 | #define ADC_EXTERNALTRIGINJECCONV_T3_CC2 ((uint32_t)ADC_CR2_JEXTSEL_2)
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| 160 | #define ADC_EXTERNALTRIGINJECCONV_T3_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0))
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| 161 | #define ADC_EXTERNALTRIGINJECCONV_T4_CC1 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1))
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| 162 | #define ADC_EXTERNALTRIGINJECCONV_T4_CC2 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
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| 163 | #define ADC_EXTERNALTRIGINJECCONV_T4_CC3 ((uint32_t)ADC_CR2_JEXTSEL_3)
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| 164 | #define ADC_EXTERNALTRIGINJECCONV_T4_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_0))
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| 165 | #define ADC_EXTERNALTRIGINJECCONV_T5_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1))
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| 166 | #define ADC_EXTERNALTRIGINJECCONV_T5_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0))
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| 167 | #define ADC_EXTERNALTRIGINJECCONV_T8_CC2 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2))
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| 168 | #define ADC_EXTERNALTRIGINJECCONV_T8_CC3 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0))
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| 169 | #define ADC_EXTERNALTRIGINJECCONV_T8_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1))
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| 170 | #define ADC_EXTERNALTRIGINJECCONV_EXT_IT15 ((uint32_t)ADC_CR2_JEXTSEL)
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| 171 | #define ADC_INJECTED_SOFTWARE_START ((uint32_t)ADC_CR2_JEXTSEL + 1)
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| 172 | /**
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| 173 | * @}
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| 174 | */
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| 175 |
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| 176 | /** @defgroup ADCEx_injected_channel_selection ADC Injected Channel Selection
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| 177 | * @{
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| 178 | */
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| 179 | #define ADC_INJECTED_RANK_1 ((uint32_t)0x00000001)
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| 180 | #define ADC_INJECTED_RANK_2 ((uint32_t)0x00000002)
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| 181 | #define ADC_INJECTED_RANK_3 ((uint32_t)0x00000003)
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| 182 | #define ADC_INJECTED_RANK_4 ((uint32_t)0x00000004)
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| 183 | /**
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| 184 | * @}
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| 185 | */
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| 186 |
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| 187 | /** @defgroup ADCEx_channels ADC Specific Channels
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| 188 | * @{
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| 189 | */
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| 190 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
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| 191 | defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || \
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| 192 | defined(STM32F410Rx) || defined(STM32F412xG)
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| 193 | #define ADC_CHANNEL_TEMPSENSOR ((uint32_t)ADC_CHANNEL_16)
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| 194 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F410xx || STM32F412xG */
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| 195 |
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| 196 | #if defined(STM32F411xE) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
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| 197 | defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
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| 198 | #define ADC_CHANNEL_DIFFERENCIATION_TEMPSENSOR_VBAT ((uint32_t)0x10000000) /* Dummy bit for driver internal usage, not used in ADC channel setting registers CR1 or SQRx */
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| 199 | #define ADC_CHANNEL_TEMPSENSOR ((uint32_t)ADC_CHANNEL_18 | ADC_CHANNEL_DIFFERENCIATION_TEMPSENSOR_VBAT)
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| 200 | #endif /* STM32F411xE || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
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| 201 | /**
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| 202 | * @}
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| 203 | */
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| 204 |
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| 205 |
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| 206 | /**
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| 207 | * @}
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| 208 | */
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| 209 |
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| 210 | /* Exported macro ------------------------------------------------------------*/
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| 211 | /** @defgroup ADC_Exported_Macros ADC Exported Macros
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| 212 | * @{
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| 213 | */
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| 214 |
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| 215 | /**
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| 216 | * @}
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| 217 | */
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| 218 |
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| 219 | /* Exported functions --------------------------------------------------------*/
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| 220 | /** @addtogroup ADCEx_Exported_Functions
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| 221 | * @{
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| 222 | */
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| 223 |
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| 224 | /** @addtogroup ADCEx_Exported_Functions_Group1
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| 225 | * @{
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| 226 | */
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| 227 |
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| 228 | /* I/O operation functions ******************************************************/
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| 229 | HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc);
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| 230 | HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc);
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| 231 | HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout);
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| 232 | HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc);
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| 233 | HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc);
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| 234 | uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank);
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| 235 | HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length);
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| 236 | HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc);
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| 237 | uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc);
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| 238 | void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc);
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| 239 |
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| 240 | /* Peripheral Control functions *************************************************/
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| 241 | HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected);
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| 242 | HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode);
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| 243 |
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| 244 | /**
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| 245 | * @}
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| 246 | */
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| 247 |
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| 248 | /**
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| 249 | * @}
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| 250 | */
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| 251 | /* Private types -------------------------------------------------------------*/
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| 252 | /* Private variables ---------------------------------------------------------*/
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| 253 | /* Private constants ---------------------------------------------------------*/
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| 254 | /** @defgroup ADCEx_Private_Constants ADC Private Constants
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| 255 | * @{
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| 256 | */
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| 257 |
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| 258 | /**
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| 259 | * @}
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| 260 | */
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| 261 |
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| 262 | /* Private macros ------------------------------------------------------------*/
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| 263 | /** @defgroup ADCEx_Private_Macros ADC Private Macros
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| 264 | * @{
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| 265 | */
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| 266 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
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| 267 | defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || \
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| 268 | defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F412xG)
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| 269 | #define IS_ADC_CHANNEL(CHANNEL) ((CHANNEL) <= ADC_CHANNEL_18)
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| 270 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || STM32F412xG */
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| 271 |
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| 272 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
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| 273 | defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
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| 274 | #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) <= ADC_CHANNEL_18) || \
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| 275 | ((CHANNEL) == ADC_CHANNEL_TEMPSENSOR))
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| 276 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */
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| 277 |
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| 278 | #define IS_ADC_MODE(MODE) (((MODE) == ADC_MODE_INDEPENDENT) || \
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| 279 | ((MODE) == ADC_DUALMODE_REGSIMULT_INJECSIMULT) || \
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| 280 | ((MODE) == ADC_DUALMODE_REGSIMULT_ALTERTRIG) || \
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| 281 | ((MODE) == ADC_DUALMODE_INJECSIMULT) || \
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| 282 | ((MODE) == ADC_DUALMODE_REGSIMULT) || \
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| 283 | ((MODE) == ADC_DUALMODE_INTERL) || \
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| 284 | ((MODE) == ADC_DUALMODE_ALTERTRIG) || \
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| 285 | ((MODE) == ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT) || \
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| 286 | ((MODE) == ADC_TRIPLEMODE_REGSIMULT_AlterTrig) || \
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| 287 | ((MODE) == ADC_TRIPLEMODE_INJECSIMULT) || \
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| 288 | ((MODE) == ADC_TRIPLEMODE_REGSIMULT) || \
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| 289 | ((MODE) == ADC_TRIPLEMODE_INTERL) || \
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| 290 | ((MODE) == ADC_TRIPLEMODE_ALTERTRIG))
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| 291 | #define IS_ADC_DMA_ACCESS_MODE(MODE) (((MODE) == ADC_DMAACCESSMODE_DISABLED) || \
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| 292 | ((MODE) == ADC_DMAACCESSMODE_1) || \
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| 293 | ((MODE) == ADC_DMAACCESSMODE_2) || \
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| 294 | ((MODE) == ADC_DMAACCESSMODE_3))
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| 295 | #define IS_ADC_EXT_INJEC_TRIG_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_NONE) || \
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| 296 | ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISING) || \
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| 297 | ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_FALLING) || \
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| 298 | ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING))
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| 299 | #define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \
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| 300 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \
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| 301 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \
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| 302 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \
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| 303 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC2) || \
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| 304 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \
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| 305 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC1) || \
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| 306 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC2) || \
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| 307 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC3) || \
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| 308 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \
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| 309 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4) || \
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| 310 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_TRGO) || \
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| 311 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC2) || \
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| 312 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC3) || \
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| 313 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4) || \
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| 314 | ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15)|| \
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| 315 | ((INJTRIG) == ADC_INJECTED_SOFTWARE_START))
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| 316 | #define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= ((uint32_t)1)) && ((LENGTH) <= ((uint32_t)4)))
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| 317 | #define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= ((uint32_t)1)) && ((RANK) <= ((uint32_t)4)))
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| 318 |
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| 319 | /**
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| 320 | * @brief Set the selected injected Channel rank.
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| 321 | * @param _CHANNELNB_: Channel number.
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| 322 | * @param _RANKNB_: Rank number.
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| 323 | * @param _JSQR_JL_: Sequence length.
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| 324 | * @retval None
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| 325 | */
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| 326 | #define ADC_JSQR(_CHANNELNB_, _RANKNB_, _JSQR_JL_) (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5 * (uint8_t)(((_RANKNB_) + 3) - (_JSQR_JL_))))
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| 327 |
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| 328 | /**
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| 329 | * @}
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| 330 | */
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| 331 |
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| 332 | /* Private functions ---------------------------------------------------------*/
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| 333 | /** @defgroup ADCEx_Private_Functions ADC Private Functions
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| 334 | * @{
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| 335 | */
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| 336 |
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| 337 | /**
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| 338 | * @}
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| 339 | */
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| 340 |
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| 341 | /**
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| 342 | * @}
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| 343 | */
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| 344 |
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| 345 | /**
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| 346 | * @}
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| 347 | */
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| 348 |
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| 349 | #ifdef __cplusplus
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| 350 | }
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| 351 | #endif
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| 352 |
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| 353 | #endif /*__STM32F4xx_ADC_EX_H */
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| 354 |
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| 355 |
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| 356 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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