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core_support.S@ 303

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1	/*
2	* TOPPERS/ASP Kernel
3	* Toyohashi Open Platform for Embedded Real-Time Systems/
4	* Advanced Standard Profile Kernel
5	*
6	* Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
7	* Toyohashi Univ. of Technology, JAPAN
8	* Copyright (C) 2005-2015 by Embedded and Real-Time Systems Laboratory
9	* Graduate School of Information Science, Nagoya Univ., JAPAN
10	*
11	* ä¸è¨èä½æ¨©è
12	ã¯ï¼ä»¥ä¸ã®(1)ã(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
13	* ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ãä½¿ç¨ã»è¤è£½ã»æ¹
14	* å¤ã»åé
15	å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
16	* (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
17	* æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
18	* ã¹ã³ã¼ãä¸ã«å«ã¾ãã¦ãããã¨ï¼
19	* (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
20	* ç¨ã§ããå½¢ã§åé
21	å¸ããå ´åã«ã¯ï¼åé
22	å¸ã«ä¼´ãããã¥ã¡ã³ãï¼å©ç¨
23	* è
24	ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
25	* ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
26	* (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
27	* ç¨ã§ããªãå½¢ã§åé
28	å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
29	* ã¨ï¼
30	* (a) åé
31	å¸ã«ä¼´ãããã¥ã¡ã³ãï¼å©ç¨è
32	ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
33	* ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
34	* (b) åé
35	å¸ã®å½¢æ
36	ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSããã¸ã§ã¯ãã«
37	* å ±åãããã¨ï¼
38	* (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
39	* å®³ãããï¼ä¸è¨èä½æ¨©è
40	ããã³TOPPERSããã¸ã§ã¯ããå
41	è²¬ãããã¨ï¼
42	* ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
43	* ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
44	ããã³TOPPERSããã¸ã§ã¯ãã
45	* å
46	è²¬ãããã¨ï¼
47	*
48	* æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
49	ã
50	* ãã³TOPPERSããã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
51	* ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
52	* ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ã
53	* ã®è²¬ä»»ãè² ããªãï¼
54	*
55	* @(#) $Id: core_support.S 323 2015-05-28 08:48:22Z ertl-ishikawa $
56	*/
57
58	/*
59	* ããã»ããµä¾åã¢ã¸ã¥ã¼ã« ã¢ã»ã³ããªè¨èªé¨ï¼ARM-Mç¨ï¼
60	*/
61
62	#define TOPPERS_MACRO_ONLY
63	#define UINT_C(val) (val) /* uint_tåã®å®æ°ãä½ããã¯ã */
64	#define ULONG_C(val) (val) /* ulong_tåã®å®æ°ãä½ããã¯ã */
65	#define CAST(type, val) (val) /* åãã£ã¹ããè¡ããã¯ã */
66
67	#include "kernel_impl.h"
68	#include "arm_m.h"
69	#include "offset.h"
70	#include "target_asm.inc"
71
72	/*
73	* ã¿ã¹ã¯ãã£ã¹ãããã£
74	*/
75	ATEXT
76	AALIGN(2)
77	ATHUMB(_dispatch)
78	AGLOBAL(_dispatch)
79	ALABEL(_dispatch)
80	#ifdef TOPPERS_SUPPORT_OVRHDR
81	push {lr}
82	bl ovrtimer_stop
83	pop {lr}
84	#endif /* TOPPERS_SUPPORT_OVRHDR */
85	/*
86	*
87	* ãã®ã«ã¼ãã³ã¯ï¼PendSVã«ãã£ã¦å¼ã³åºããã
88	* * Handler mode
89	* * use msp
90	* * lr = EXC_RETURN
91	* * scratch registers -> psp
92	* * CONTROL.FPCA -> EXC_RETURN && CONTROL.FPCA == 0
93	*/
94	cpsid f /* FAULTMASK = 1 */
95	/*
96	* PendSVè¦æ±ãã¯ãªã¢
97	* _dispatch - cpsid f ã®éã§ISRãå
98	¥ãï¼ããã«PendSVè¦æ±ã
99	* å
100	¥ã£ãå ´åã«ï¼dispatcherãç¡é§ã«èµ°ããã¨ãé²ãããï¼
101	* ããã§PendSVè¦æ±ãã¯ãªã¢ãã
102	*/
103	ldr r1, =0x08000000 /* r1 = ICSR.PENDSVCLR */
104	ldr r2, =0xE000ED04 /* r2 = ICSR /
105	str r1, [r2] /* ICSR = PENDSVCLR /
106
107	mrs r3, psp
108	stmfd r3!, {r4-r11} /* ã¬ã¸ã¹ã¿ã®ä¿å */
109	#ifdef __TARGET_FPU_VFPUV4_D16
110	/*
111	* å¼åºãå
112	ã³ã³ããã¹ãã§æµ®åå°æ°ç¹æ¼ç®ããããï¼
113	* EXC_RETURN[4]ããã§ãã¯
114	*/
115	tst lr, #0x10
116	/* EXC_RETURN[4] == 1ãªãã°ã¹ããã */
117	bne _dispatch_1
118	vstmdb r3!, {s16-s31} /* ã¬ã¸ã¹ã¿ã®ä¿å */
119	/fpscrã¯ä¾å¤ãã¬ã¼ã ã«ä¿åæ¸ã¿/
120	ALABEL(_dispatch_1)
121	#endif /* __TARGET_FPU_VFPUV4_D16 */
122	ldr r1, =p_runtsk /* p_runtskãèªã¿è¾¼ã */
123	ldr r1, [r1]
124	str r3, [r1,#TCB_sp] /* ã¿ã¹ã¯ã®ã¹ã¿ãã¯ãä¿å */
125	str lr, [r1,#TCB_pc]
126	b dispatcher
127
128	/*
129	* CPUä¾å¤ã¨ã³ããª
130	*
131	* å²è¾¼ã¿ã¨ã³ããªã¨å¦çã®å
132	å®¹ã¯åçã ãï¼ãã°ã®ç¨®é¡ãç°ãªãããï¼
133	* åãã¦ããï¼
134	*/
135	AALIGN(2)
136	ATEXT
137	ATHUMB(core_exc_entry)
138	AGLOBAL(core_exc_entry)
139	ALABEL(core_exc_entry)
140	/*
141	* ä¾å¤/å²è¾¼ã¿ãçºçããã¨ï¼çºçæã«ã¢ã¯ãã£ããªã¹ã¿ãã¯ã«ã¹ã¯ã©
142	* ããã¬ã¸ã¹ã¿çãä¿åãããï¼
143	* ãã®å
144	å®¹ã«å ãã¦ï¼CPUä¾å¤ãã³ãã©ã¸ã®æ
145	å ±ã¨ãã¦ï¼basepri ã®å¤ã¨ï¼
146	* EXC_RETURNã®æ
147	å ±ãå ãã¦ä¿åããï¼basepriã®å¤ã¯ï¼CPUä¾å¤ããã®
148	* ãªã¿ã¼ã³æã«å²è¾¼ã¿åªå
149	åº¦ãã¹ã¯ã®å¤ãå
150	ã«æ»ãããã«ãç¨ããããï¼
151	*
152	* -----------
153	* \| EXC_RETURN\|
154	* -----------
155	* \| basepri \|
156	* -----------
157	* \| R0 \|
158	* -----------
159	* \| R1 \|
160	* -----------
161	* \| R2 \|
162	* -----------
163	* \| R3 \|
164	* -----------
165	* \| R12 \|
166	* -----------
167	* \| LR \|
168	* -----------
169	* \| PC \|
170	* -----------
171	* \| xPSR \|
172	* -----------
173	*
174	*/
175
176	/*
177	* ã«ã¼ãã«ç®¡çå¤ã®ä¾å¤ããã§ãã¯
178	* ã«ã¼ãã«å
179	ã®ã¯ãªãã£ã«ã«ã»ã¯ã·ã§ã³ã®å®è¡ä¸ï¼å
180	¨å²è¾¼ã¿ããã¯ç¶æ
181	ï¼
182	* CPUããã¯ç¶æ
183	ï¼ã«ã¼ãã«ç®¡çå¤ã®å²è¾¼ã¿ãã³ãã©å®è¡ä¸ã®ããããã§
184	* çºçããCPUä¾å¤ãï¼ã«ã¼ãã«ç®¡çå¤ã®CPUä¾å¤ã¨å¼ã¶
185	* å
186	¨å²è¾¼ã¿ããã¯ç¶æ
187	ã¯FAULTMASKã'1'ã®å ´å
188	* CPUããã¯ç¶æ
189	ã¯basepriãIIPM_LOCKãã§å¤æããï¼
190	*/
191	mrs r2, FAULTMASK /* å
192	¨å²è¾¼ã¿ããã¯ç¶æ
193	ãªãã«ã¼ãã«ç®¡çå¤ä¾å¤å¦çã¸ */
194	cbnz r2, core_nonkernel_exc_entry
195
196	mrs r2, basepri /* baepriã®å¤ãåå¾ */
197	cmp r2, #IIPM_LOCK /* CPUããã¯ç¶æ
198	ãªãã«ã¼ãã«ç®¡çå¤ä¾å¤å¦çã¸ */
199	beq core_nonkernel_exc_entry
200
201
202	/*
203	* ã¹ã¿ãã¯ãå¤æ´ããå¿
204	è¦ãããããã§ãã¯
205	* EXC_RETURNï¼å²è¾¼ã¿æã«LRã«è¨å®ãããå¤ï¼ããã§ãã¯ãã¦ï¼ä¾å¤çºçæã«
206	* ã¢ã¯ãã£ããªã¹ã¿ãã¯ãç¹å®ãããã¨ã§å¤éå²è¾¼ã¿ãå¤å®ããï¼
207	*/
208	tst lr, #EXC_RETURN_PSP /* å²è¾¼ã¿å
209	ãMSPãªãå¤éå²è¾¼ã¿ */
210	beq core_exc_entry_1 /* å¤éå²è¾¼ã¿ãªãcore_exc_entry_1ã¸ */
211	mrs r0, psp /* ä¸æ®µç®ã®å²è¾¼ã¿ã®å ´åã¯PSPä¸ã« */
212	stmfd r0!,{r2} /* å²è¾¼ã¿çºçæã®å²è¾¼ã¿åªå
213	åº¦ãã¹ã¯ãç©ã */
214	stmfd r0!,{lr} /* EXC_RETURN ãç©ã */
215	msr psp, r0 /* CPUä¾å¤ãã³ãã©ã¸ã®å¼æ°ã¨ãªã */
216	push {lr} /* MSPä¸ã«ãEXC_RETURN ãç©ã */
217	#ifdef TOPPERS_SUPPORT_OVRHDR
218	push {r0}
219	bl ovrtimer_stop
220	pop {r0}
221	#endif /* TOPPERS_SUPPORT_OVRHDR */
222	b core_exc_entry_2
223	ALABEL(core_exc_entry_1) /* å¤éå²è¾¼ã¿ã®å ´å */
224	push {r2} /* å²è¾¼ã¿çºçæã®å²è¾¼ã¿åªå
225	åº¦ãã¹ã¯ãç©ã */
226	push {lr} /* EXC_RETURN ãç©ã */
227	mov r0, sp /* CPUä¾å¤ãã³ãã©ã¸ã®å¼æ°ã¨ãªã */
228
229	/*
230	* å
231	±éå¦ç
232	*/
233	ALABEL(core_exc_entry_2)
234	mrs r3, ipsr /* ãã³ãã©ã¢ãã¬ã¹ãåå¾ */
235	ALABEL(core_exc_entry_3)
236	ldr r1, =_kernel_exc_tbl
237	ldr r2, [r1, r3, lsl #2]
238
239	#ifdef LOG_EXC_ENTER
240	push {r0,r2,r3}
241	mov r0, r3 /* ä¾å¤çªå·ããã©ã¡ã¼ã¿ã« */
242	bl log_exc_enter /* log_exc_enterãå¼ã³åºã */
243	pop {r0,r2,r3}
244	push {r3} /* ä¾å¤çªå·ãã¹ã¿ãã¯ã¸ */
245	#endif /* LOG_EXC_ENTER */
246
247	/*
248	* CPUä¾å¤ãã³ãã©ã®å¼ã³åºã
249	*/
250	blx r2
251
252	#ifdef LOG_EXC_ENTER
253	pop {r0} /* ä¾å¤çªå·ãå¼æ°ã« */
254	bl log_exc_leave /* log_exc_leaveãå¼ã³åºã */
255	#endif /* LOG_EXC_ENTER */
256
257	b ret_exc
258
259	/*
260	* ã«ã¼ãã«ç®¡çå¤ã®CPUä¾å¤ã®åºå
261	¥å£å¦ç
262	*/
263	ALABEL(core_nonkernel_exc_entry)
264	tst lr, #EXC_RETURN_PSP /* å²è¾¼ã¿å
265	ãMSPãªãå¤éå²è¾¼ã¿ */
266	beq core_nonkernel_exc_entry_1 /* å¤éå²è¾¼ã¿ãªã */
267	mrs r0, psp /* ä¸æ®µç®ã®å²è¾¼ã¿ã®å ´åã¯PSPä¸ã« */
268	stmfd r0!,{r2} /* å²è¾¼ã¿çºçæã®å²è¾¼ã¿åªå
269	åº¦ãã¹ã¯ãç©ã */
270	stmfd r0!,{lr} /* EXC_RETURN ãç©ã */
271	msr psp, r0 /* CPUä¾å¤ãã³ãã©ã¸ã®å¼æ°ã¨ãªã */
272	push {lr} /* MSPä¸ã«ãEXC_RETURN ãç©ã */
273	b core_nonkernel_exc_entry_2
274	ALABEL(core_nonkernel_exc_entry_1) /* å¤éå²è¾¼ã¿ã®å ´å */
275	push {r2} /* å²è¾¼ã¿çºçæã®å²è¾¼ã¿åªå
276	åº¦ãã¹ã¯ãç©ã */
277	push {lr} /* EXC_RETURN ãç©ã */
278	mov r0, sp /* CPUä¾å¤ãã³ãã©ã¸ã®å¼æ°ã¨ãªã */
279
280	ALABEL(core_nonkernel_exc_entry_2)
281	mrs r3, ipsr /* CPUä¾å¤ãã³ãã©ã®ã¢ãã¬ã¹ãåå¾ */
282	ldr r1, =_kernel_exc_tbl
283	ldr r2, [r1, r3, lsl #2]
284
285	/*
286	* CPUä¾å¤ãã³ãã©ã®å¼ã³åºã
287	*/
288	blx r2
289
290	/*
291	* å²è¾¼ã¿ããã¯ç¶æ
292	ã¨ããï¼
293	*/
294	cpsid f
295
296	/*
297	* æ»ãå
298	ã®ã³ã³ããã¹ãã®å¤å®
299	*
300	* å²è¾¼ã¿ãã³ãã©å®è¡ã«LRã«ã»ãããããEXC_RETURNããã§ãã¯ãã¦ï¼æ»ã
301	* å
302	ã§MSPãä½¿ããã¦ããã°ï¼å²è¾¼ã¿å
303	ãéã¿ã¹ã¯ã³ã³ããã¹ãã¨å¤å®ããï¼
304	*/
305	pop {r3} /* lrãã¹ã¿ãã¯ããåå¾ */
306	tst r3, #EXC_RETURN_PSP /* æ»ãå
307	ãPSPãªã */
308	bne core_nonkernel_ret_exc_1
309	pop {r1} /* å
310	ã®å²è¾¼ã¿åªå
311	åº¦ãã¹ã¯(basepri) */
312	b core_nonkernel_ret_exc_2 /* ã®å¤ãMSPããåå¾ */
313
314	ALABEL(core_nonkernel_ret_exc_1)
315	/*
316	* PSPä¸ããEXC_RETURNãåé¤
317	*/
318	mrs r2, psp
319	add r2, r2, #4
320	/*
321	* å
322	ã®å²è¾¼ã¿åªå
323	åº¦ãã¹ã¯(basepri)ã®å¤ãPSPããåå¾
324	*/
325	ldmfd r2!, {r1}
326	msr psp, r2
327
328	ALABEL(core_nonkernel_ret_exc_2)
329	msr basepri, r1 /* å²è¾¼ã¿åªå
330	åº¦ãã¹ã¯ãå²è¾¼ã¿åã«ç¶æ
331	ã¸ */
332	bx r3 /* ãªã¿ã¼ã³ */
333
334	/*
335	* å²è¾¼ã¿ã¨ã³ããª
336	*/
337	ATHUMB(core_int_entry)
338	AGLOBAL(core_int_entry)
339	ALABEL(core_int_entry)
340	/*
341	* å²è¾¼ã¿çºçæã®å²è¾¼ã¿åªå
342	åº¦ãã¹ã¯ãã¹ã¿ãã¯ã«ä¿åããããåå¾
343	*/
344	mrs r2, basepri /* baepriã®å¤ãåå¾ */
345
346	/*
347	* å¤éå²è¾¼ã¿ããã§ãã¯
348	* EXC_RETURNï¼å²è¾¼ã¿æã«LRã«è¨å®ãããå¤ï¼ããã§ãã¯ãã¦ï¼ä¾å¤çºçæã«
349	* ã¢ã¯ãã£ããªã¹ã¿ãã¯ãç¹å®ãããã¨ã§å¤éå²è¾¼ã¿ãå¤å®ããï¼
350	*/
351	tst lr, #EXC_RETURN_PSP /* å²è¾¼ã¿å
352	ãMSPãªãå¤éå²è¾¼ã¿ */
353	beq core_int_entry_1 /* å¤éå²è¾¼ã¿ãªãcore_int_entry_1ã¸ */
354	mrs r0, psp /* ä¸æ®µç®ã®å²è¾¼ã¿ã®å ´åã¯PSPä¸ã« */
355	stmfd r0!,{r2} /* å²è¾¼ã¿çºçæã®å²è¾¼ã¿åªå
356	åº¦ãã¹ã¯ãç©ã */
357	stmfd r0!,{lr} /* EXC_RETURN ãç©ã */
358	msr psp, r0 /* CPUä¾å¤ãã³ãã©ã¸ã®å¼æ°ã¨ãªã */
359	push {lr} /* MSPä¸ã«ãEXC_RETURN ãç©ã */
360	#ifdef TOPPERS_SUPPORT_OVRHDR
361	push {r0}
362	bl ovrtimer_stop
363	pop {r0}
364	#endif /* TOPPERS_SUPPORT_OVRHDR */
365	b core_int_entry_2
366	ALABEL(core_int_entry_1) /* å¤éå²è¾¼ã¿ã®å ´å */
367	push {r2} /* å²è¾¼ã¿çºçæã®å²è¾¼ã¿åªå
368	åº¦ãã¹ã¯ãç©ã */
369	push {lr} /* EXC_RETURN ãç©ã */
370	mov r0, sp /* æªå®ç¾©ã®å²è¾¼ã¿ãçºçããå ´åã®æ
371	å ±ã¨ãã */
372
373	/*
374	* å
375	±éå¦ç
376	*/
377	ALABEL(core_int_entry_2)
378	mrs r3, ipsr /* ãã³ãã©ã¢ãã¬ã¹ãåå¾ */
379	ldr r1, =_kernel_exc_tbl
380	ldr r2, [r1, r3, lsl #2]
381
382	/*
383	* basepriã®è¨å®
384	* NVICåªå
385	åº¦ãã¹ã¯ãèªåçã«è¨å®ãããããåªå
386	åº¦ãã¹ã¯ã®ç¹ã§ã¯å¿
387	è¦ãª
388	* ããï¼x_get_ipm()ãbasepriãåç
389	§ããããï¼basepriãæ´æ°ããï¼
390	*/
391	ldr r1, =_kernel_int_iipm_tbl
392	ldr lr, [r1, r3, lsl #2]
393	msr basepri, lr
394	isb
395
396	#ifdef LOG_INH_ENTER
397	push {r0,r2,r3}
398	mov r0, r3 /* ä¾å¤çªå·ããã©ã¡ã¼ã¿ã« */
399	bl log_inh_enter /* log_exc_enterãå¼ã³åºã */
400	pop {r0,r2,r3}
401	push {r3} /* ä¾å¤çªå·ãã¹ã¿ãã¯ã¸ */
402	#endif /* LOG_EXC_ENTER */
403
404	/*
405	* å²è¾¼ã¿ãã³ãã©ã®å¼ã³åºã
406	*/
407	blx r2
408
409	#ifdef LOG_INH_LEAVE
410	pop {r0} /* ä¾å¤çªå·ãå¼æ°ã« */
411	bl log_exc_leave /* log_exc_leaveãå¼ã³åºã */
412	#endif /* LOG_INH_LEAVE */
413
414	/*
415	* å²è¾¼ã¿/ä¾å¤åºå£
416	*
417	* ret_exc/ret_intã¯ï¼CPUä¾å¤/å²è¾¼ã¿ãã³ãã©ããæ»ã£ãç´å¾ã«å®è¡ãã
418	* ã«ã¼ãã³ã§ããï¼
419	*/
420	ALABEL(ret_exc)
421	ALABEL(ret_int)
422	/*
423	* å²è¾¼ã¿ããã¯ç¶æ
424	ã¨ããï¼ãã®æç¹ã§ã¯ï¼CPUããã¯ç¶æ
425	ã«ã¯ãªããªã
426	* ï¼basepriã¨lock_flagã¨saved_iipmã¯æ´æ°ããªãï¼ï¼
427	*
428	* å²è¾¼ã¿ããã¯ç¶æ
429	ã¨ããã®ã¯ï¼æ»ãå
430	ã®ã³ã³ããã¹ãã®ãã§ãã¯ã¨ï¼
431	* æ»ãå
432	ãéã¿ã¹ã¯ã³ã³ããã¹ãã§ãã£ãå ´åã®ãªã¿ã¼ã³ãã¢ãããã¯
433	* ã«è¡ãããã§ããï¼bsepriãCPUããã¯ã®å¤ã«ãããã¨ã§ãã¢ããã
434	* ã¯ãªãã§ãã¯ã¨å¾©å¸°ã¯å¯è½ã§ãããï¼å²è¾¼ã¿ãããªã¿ã¼ã³ãã¦ãï¼
435	* basepri ã®è¨å®å
436	å®¹ã¯å
437	ã«æ»ããªãããï¼ä½¿ç¨ãããã¨ãã§ããªãï¼
438	* ä¸æ¹ï¼FAULTMASKã¯ï¼å²è¾¼ã¿ããã®ãªã¿ã¼ã³å¦çã«ãã£ã¦ï¼'0'ã«ã¯ãª
439	* ã¢ãããï¼
440	*/
441	cpsid f
442
443	/*
444	* æ»ãå
445	ã®ã³ã³ããã¹ãã®å¤å®
446	*
447	* å²è¾¼ã¿ãã³ãã©å®è¡ã«LRã«ã»ãããããEXC_RETURNããã§ãã¯ãã¦ï¼æ»ã
448	* å
449	ã§MSPãä½¿ããã¦ããã°ï¼å²è¾¼ã¿å
450	ãéã¿ã¹ã¯ã³ã³ããã¹ãã¨å¤å®ããï¼
451	*/
452	pop {r3} /* lrãã¹ã¿ãã¯ããåå¾ */
453	tst r3, #EXC_RETURN_PSP /* æ»ãå
454	ãPSPãªã ret_int_1 ã¸ */
455	bne ret_int_1
456	pop {r1} /* å
457	ã®å²è¾¼ã¿åªå
458	åº¦ãã¹ã¯(basepri)ãr1ã¸ */
459	b ret_int_2
460
461	/*
462	* ä¸æ®µç®ã®å²è¾¼ã¿ã®åºå£å¦ç
463	*/
464	ALABEL(ret_int_1)
465	/*
466	* PSPä¸ããï¼EXC_RETURN(r0)ã¨å
467	ã®å²è¾¼ã¿åªå
468	åº¦ãã¹ã¯(basepri)(r1)
469	* ãåå¾
470	*/
471	mrs r2, psp
472	ldmfd r2!, {r0,r1}
473	msr psp, r2
474
475	/*
476	* å²è¾¼ã¿ãã³ãã©ã«ãããã£ã¹ãããè¦æ±ããã£ãå ´åã«ã¯ï¼
477	* request_dispatchã«ãã£ã¦ï¼PendSVè¦æ±ãçºè¡ããã¦ããï¼
478	* ãã®å ´åï¼ãã®ã¾ã¾å²è¾¼ã¿ãã³ãã©ãããªã¿ã¼ã³ããå¾ï¼
479	* PendSVã®å²è¾¼ã¿ãå
480	¥ãï¼ããã§ãã£ã¹ãããã£ãå®è¡ããã
481	* ãã£ã¦ï¼ããã§ã¯ãã£ã¹ããããããã©ããã®ãã§ãã¯å¦çã¯
482	* ä¸è¦ã§ãã
483	*/
484
485	#ifdef TOPPERS_SUPPORT_OVRHDR
486	push {r1,r3}
487	bl ovrtimer_start
488	pop {r1,r3}
489	#endif /* TOPPERS_SUPPORT_OVRHDR */
490	ALABEL(ret_int_2)
491	/*
492	* ããã«ã¯å²è¾¼ã¿ããã¯ç¶æ
493	ï¼FAULTMASKãã»ããï¼ãããç¶æ
494	ã§æ¥ãï¼
495	* Handlerã¢ã¼ãããã®ãªã¿ã¼ã³ã«ããèªåçã«å²è¾¼ã¿ããã¯è§£é¤ç¶æ
496	ã«ãªãï¼
497	* å²è¾¼ã¿åªå
498	åº¦ãã¹ã¯ã¯å²è¾¼ã¿åã«ç¶æ
499	ã«æ»ãï¼
500	*/
501	msr basepri, r1 /* å²è¾¼ã¿åªå
502	åº¦ãã¹ã¯ãå²è¾¼ã¿åã®ç¶æ
503	ã¸ */
504	bx r3 /* ãªã¿ã¼ã³ */
505
506	/*
507	* ãã£ã¹ãããã£ã®åä½éå§
508	*/
509	ATHUMB(start_dispatch)
510	AGLOBAL(start_dispatch)
511	ALABEL(start_dispatch)
512	/*
513	* ãã®ã«ã¼ãã³ã¯ï¼ã«ã¼ãã«èµ·åæã«ï¼ãã¹ã¦ã®å²è¾¼ã¿ãç¦æ¢ããç¶æ
514
515	* ï¼å²è¾¼ã¿ããã¯ç¶æ
516	ã¨åçï¼ã§å¼ã³åºãããï¼ã¾ãï¼å²è¾¼ã¿ã¢ã¼ãï¼é
517	* ã¿ã¹ã¯ã³ã³ããã¹ãã¨åçï¼ã§å¼ã³åºããããã¨ãæ³å®ãã¦ããï¼
518	*
519	* core_initializeã§ï¼lock_flagãtrueã«ï¼saved_iipmãIIPM_ENAALLã«
520	* åæåãã¦ããããï¼ã«ã¼ãã«ç®¡çå¤ã®å²è¾¼ã¿ãè¨±å¯ãããã¨ã§ï¼
521	* CPUããã¯ç¶æ
522	ã»ï¼ã¢ãã«ä¸ã®ï¼å²è¾¼ã¿åªå
523	åº¦ãã¹ã¯å
524	¨è§£é¤ç¶æ
525	ã«ãªãï¼
526	* ã¾ãï¼task_initializeã§disdspãfalseã«åæåãã¦ããããï¼ãã£
527	* ã¹ãããè¨±å¯ç¶æ
528	ã«ãªã£ã¦ããï¼
529	*/
530	ldr r0,=istkpt /* MSPãåæå */
531	ldr r1,[r0] /* start_dispatchå¼ã³åºãæã«å¼ã³åºãç¨ã« */
532	msr msp, r1 /* ä½¿ç¨ãã¦ããããåæåãã */
533	/*
534	* ã¹ã¿ãã¯ãIDã1ã®ã¿ã¹ã¯ã®ã¹ã¿ãã¯é åã«åãæãã
535	*/
536	mov r0, #CONTROL_PSP /* PSPãæå¹ã« */
537	msr control, r0
538	isb /* control ã®æä½å¾ã«å¿
539	è¦ */
540	ldr r1, =tinib_table
541	ldr sp, [r1, #TINIB_stk_bottom]
542	/*
543	* ID1ã®ã¿ã¹ã¯ããã§ã«activate_contextããã¦ããå ´åï¼
544	* ã¹ã¿ãã¯ã®å
545	é ã«spãåæåãã¦ãã¾ãã¨ï¼svcã«ãã
546	* activate_contextã§æºåããå
547	å®¹ãæ¶ããã¦ãã¾ãããï¼
548	* ãã®åãé£ã°ããã¢ãã¬ã¹ãï¼ã«ã¼ãã«åä½éå§æã®
549	* ã¹ã¿ãã¯å
550	é ã¢ãã¬ã¹ã¨ãã
551	*/
552	add sp, sp, #(4*16)
553	ldr r1, =IIPM_LOCK /* ã«ã¼ãã«ç®¡çå
554	ã®å²è¾¼ã¿ãç¦æ¢ */
555	msr basepri, r1
556	isb
557	cpsie f /* ã«ã¼ãã«ç®¡çå¤ã®å²è¾¼ã¿ãè¨±å¯ */
558	/*
559	* _exit_and_dispatchã§CPUããã¯è§£é¤&FAULTMASK=1ããã¦ããã«ã
560	* ãããããï¼ããã§CPUããã¯&FAULTMASK=0ã¨ãã¦ããã®ã¯ï¼
561	* ãã£ã¹ãããã£ãsvcçºè¡æã®ç¶æ
562	ã§å¼ãã§ããï¼ãã¤ï¼
563	* FAULTMASKç¶æ
564	ã§svcãçºè¡ããã¨double faultã§ãªã»ãããããã
565	* ããã§ãã
566	*/
567
568	ATHUMB(exit_and_dispatch)
569	AGLOBAL(exit_and_dispatch)
570	ALABEL(exit_and_dispatch)
571	/*
572	* r3=pspã¯svcã®çºè¡å¾ã§ããããï¼ã¹ã¿ãã¯ä½¿ç¨éãå¤ããªãããï¼
573	* svcåã®pspãr3ã«ä¿åãã¦ãã
574	*/
575	svc #NO_DISPATCHER
576
577	/*
578	* ç¾å¨ã®ã³ã³ããã¹ããæ¨ã¦ã¦ãã£ã¹ããã
579	*/
580	ATHUMB(_exit_and_dispatch)
581	AGLOBAL(_exit_and_dispatch)
582	ALABEL(_exit_and_dispatch)
583	cpsid f /* FAULTMASK = 1 */
584	mov r0, #0
585	ldr r1, =lock_flag /* CPUããã¯è§£é¤ç¶æ
586	ã¸ */
587	str r0, [r1]
588	ldr r1, =IIPM_ENAALL /* å²è¾¼ã¿åªå
589	åº¦ãã¹ã¯ãå
590	¨è§£é¤ç¶æ
591	ã«è¨å® */
592	msr basepri, r1
593	mrs r3, psp
594	/* ãã£ã¹ãããã£æ¬ä½ï¼dispatcherï¼ã¸ */
595
596	/*
597	* ãã£ã¹ãããã£æ¬ä½
598	*/
599	ATHUMB(dispatcher)
600	AGLOBAL(dispatcher)
601	ALABEL(dispatcher)
602	/*
603	* ãã®ã«ã¼ãã³ã¯ï¼ã¿ã¹ã¯ã³ã³ããã¹ãã»CPUããã¯ç¶æ
604	ã»ãã£ã¹ããã
605	* è¨±å¯ç¶æ
606	ã»ï¼ã¢ãã«ä¸ã®ï¼å²è¾¼ã¿åªå
607	åº¦ãã¹ã¯å
608	¨è§£é¤ç¶æ
609	ã§å¼ã³åºã
610	* ããï¼
611	*
612	* ããªãã¡ï¼Handlerã¢ã¼ãã»lock_flagãtrueã»disdspãfalseã»dspflg
613	* ãtrueã»saved_iipmãIIPM_ENAALLã¨ãªã£ã¦ããï¼å®è¡åéçªå°ã¸ãã
614	* ã®ç¶æ
615	ã®ã¾ã¾åå²ããï¼
616	* ã¾ãï¼MSPã¯ï¼istkptï¼åæå¤ï¼ã¨ãªã£ã¦ãã
617	*
618	* from dispatch:
619	* svcå½ä»¤ã«ããHandlerã¢ã¼ãã¨ãªãï¼pspã«æ»ãå
620	çªå°dispatch_rã
621	* ç©ãã ç¶æ
622	ï¼TCB.spã«pspãï¼TCB.pcã«EXC_RETURN_PSPãä¿åæ¸ã¿ï¼
623	* from start_dispatch/exit_and_dispatch:
624	* svcå½ä»¤ã«ããHandlerã¢ã¼ãã¨ãªã£ãç¶æ
625
626	* ï¼ä»¥åã«å®è¡ç¶æ
627	ã§ãã£ãã¿ã¹ã¯orID0ã®ã¿ã¹ã¯ã®ã¹ã¿ãã¯ã«æ»ãå
628
629	* ãªã©ãç©ã¾ãããï¼æ¬¡åã«ã¿ã¹ã¯ãèµ·åããéã«ç ´æ£ãããï¼
630	* from ret_int:
631	* ãã§ã«Handlerã¢ã¼ãã§ããããï¼åãªãã¸ã£ã³ãå½ä»¤ã§ããã«ãã
632	* ï¼TCB.spã«pspãï¼TCB.pcã«ret_int_rãä¿åæ¸ã¿ï¼
633
634	* to dispatch_r:
635	* TCB.pcããEXC_RETURN_PSPããã¼ããï¼bxå½ä»¤ã«ãããªã¿ã¼ã³ãã
636	* ãã¨ã§ï¼Threadã¢ã¼ãã¨ãªãï¼TCB.spã®pspã«ç©ã¾ããdispatch_r
637	* ã«æ»ãï¼TCB.pc/spã¯dispatchã§ã»ããæ¸ã¿ï¼
638	* to start_r:
639	* TCB.pcããstart_rããã¼ããï¼bxå½ä»¤ã«ããã¸ã£ã³ããããã¨ï¼
640	* ã¿ã¹ã¯èµ·åæã®å¼æ°ã¬ã¸ã¹ã¿å¤ï¼pcãTCB.spã®pspã«ç©ã¿ï¼bx
641	* EXC_RETURN_PSP å½ä»¤ã«ãã£ã¦Threadã¢ã¼ãã¨ãªãï¼ã¿ã¹ã¯èµ·åçªå°
642	* ã¸ã¸ã£ã³ããã
643	* ï¼TCB.pc/spã¯activate_contextã§ã»ããæ¸ã¿ï¼
644	* to ret_int_r:
645	* TCB.pcããret_int_rããã¼ããï¼bxå½ä»¤ã«ããã¸ã£ã³ããããã¨ï¼
646	* å²è¾¼ã¿ãã³ãã©ã®åºå£å¦çã«ããï¼Threadã¢ã¼ãã«æ»ãï¼å²è¾¼ã¿å
647	ã«
648	* æ»ãï¼TCB.pc/spã¯ret_intã§ã»ããæ¸ã¿ï¼
649	*/
650	#ifdef TOPPERS_SUPPORT_OVRHDR
651	bl ovrtimer_stop
652	#endif /* TOPPERS_SUPPORT_OVRHDR */
653	#ifdef LOG_DSP_ENTER
654	ldr r1, =p_runtsk /* p_runtskããã©ã¡ã¼ã¿ã« */
655	ldr r0, [r1]
656	bl log_dsp_enter
657	#endif /* LOG_DSP_ENTER */
658	ALABEL(dispatcher_0)
659	ldr r0, =p_schedtsk /* p_schedtskãp_runtskã« */
660	ldr r1, [r0]
661	ldr r2, =p_runtsk
662	str r1, [r2]
663	cbz r1, idle_loop /* p_runtskãNULLãªãidle_loopã¸ */
664	ldr lr, [r1,#TCB_pc] /* å®è¡åéçªå°ãå¾©å¸° */
665	ldr r0, [r1,#TCB_sp] /* ã¿ã¹ã¯ã®ã¹ã¿ãã¯ãå¾©å¸° */
666	#ifdef __TARGET_FPU_VFPUV4_D16
667	/*
668	* æ»ãå
669	ã®ã³ã³ããã¹ãã§æµ®åå°æ°ç¹æ¼ç®ããããï¼
670	* EXC_RETURN[4]ããã§ãã¯
671	*/
672	tst lr, #0x10
673	/* EXC_RETURN[4] == 1ãªãã°ã¹ããã */
674	bne dispatcher_2
675	/fpscrã¯ä¾å¤ãã¬ã¼ã ããå¾©å¸°ãã/
676	vldmia r0!, {s16-s31} /* ã¬ã¸ã¹ã¿ã®å¾©å¸° */
677	ALABEL(dispatcher_2)
678	#endif /* __TARGET_FPU_VFPUV4_D16 */
679	ldmfd r0!, {r4-r11} /* ã¬ã¸ã¹ã¿ã®å¾©å¸° */
680	msr psp, r0 /* psp = p_runtsk->sp */
681
682	#ifdef LOG_DSP_LEAVE
683	mov r0, r1 /* p_runtskããã©ã¡ã¼ã¿ã« */
684	mov r4, r1 /* r1ã¯ã¹ã¯ã©ããã¬ã¸ã¹ã¿ãªã®ã§ä¿å */
685	bl log_dsp_leave
686	mov r1, r4
687	#endif /* LOG_DSP_LEAVE */
688	#ifdef TOPPERS_SUPPORT_OVRHDR
689	push {lr}
690	bl ovrtimer_start
691	pop {lr}
692	#endif /* TOPPERS_SUPPORT_OVRHDR */
693	/*
694	* ARM<->Thumbã¢ã¼ãå¤æãæå¶ããããã«pcã«ç´æ¥æ»ãçªå°ã
695	* å
696	¥ãã
697	* å²è¾¼ã¿å
698	ã«æ»ãå ´åã«ããã¦ãï¼EXC_RETURNãç´æ¥pcã«ä»£å
699	¥ãã¦
700	* ï¼bxå½ä»¤ãä½¿ããã«æ»ã£ã¦ãï¼åé¡ãªã
701	*/
702	bx lr /* å®è¡åéçªå°ãå¾©å¸° */
703
704	ALABEL(idle_loop)
705	/*
706	* å²è¾¼ã¿ãè¨±å¯ãããCPUããã¯è§£é¤ç¶æ
707	ã«ãªãããæºåãã
708	* CPUããã¯ç¶æ
709	ã®è§£é¤ã¨ï¼éã¿ã¹ã¯ã³ã³ããã¹ãå®è¡ç¶æ
710	ã¸ã®
711	* æºåããã
712	*/
713	/*
714	* pspã«ããã¼ãã¬ã¼ã ãç©ãã§bx lrã«ããï¼threadã¢ã¼ããã¤idleã¸
715	* ãã®æç¹ã§ã¯ï¼r3=pspã§ãã
716	* r3ã«ã¯ï¼dispatchã§callee-saved-registerãä¿åããããã¨ã®
717	* ã¹ã¿ãã¯ãã¤ã³ã¿ãå
718	¥ã£ã¦ããï¼ãã®ç¶ãããã¹ã¿ãã¯ãä½¿ç¨ãã
719	*/
720	ldr r0, =_idle_loop /* PC */
721	ldr r1, =EPSR_T /* xPSR(Tãããã'1'ã§ããå¿
722	è¦ããã) */
723	/*
724	* ã¢ã¤ãã«ã«ã¼ãä¸ã®FPã¯ä»»æãªã®ã§è¨å®ããªã
725	*/
726	ldr lr, =0xfffffffd
727	stmfd r3!, {r0-r1} /* ããã¼ãã¬ã¼ã ãã¹ã¿ãã¯ä¸ã«ç©ã */
728	sub r3, #(64) / r0-r3,r12,lrã®å
729	å®¹ã¯è¨å®ããå¿
730	è¦ããªã */
731	msr psp, r3
732	bx lr
733
734	ALABEL(_idle_loop)
735	/* ããã§ã¯ãã§ã«å²è¾¼ã¿è¨±å¯ç¶æ
736	*/
737	#ifdef TOPPERS_CUSTOM_IDLE
738	toppers_asm_custom_idle
739	#else
740	ALABEL(_idle_loop_1)
741	/*
742	* basepriãå
743	¨å²è¾¼ã¿è¨±å¯ã«è¨å®ãã¦ããwfiãçºè¡ãããã¾ã§ã«
744	* å²è¾¼ã¿ãå
745	¥ã£ãå ´åï¼ããã§ãã£ã¹ããããå¿
746	è¦ãªç¶æ
747	ã«ãªãã°
748	* å²è¾¼ã¿ã®åºå£å¦çã§é
749	å»¶ãã£ã¹ããããï¼ããã«ã¯æ»ã£ã¦ããªãï¼
750	* é
751	å»¶ãã£ã¹ãããããªãã£ãå ´åã¯ããã«æ»ã£ã¦ãã¦æ¬¡ã®å²è¾¼ã¿ã
752	* wfiã§å¾
753	ã¤ããï¼æ³å®ã©ããã®åä½ã¨ãªã
754	*/
755	wfi
756	b _idle_loop_1
757	nop
758	#endif /* TOPPERS_CUSTOM_IDLE */
759
760	/*
761	* ã«ã¼ãã«ã®çµäºå¦çã®å¼åºã
762	*
763	* ã¹ã¿ãã¯ãéã¿ã¹ã¯ã³ã³ããã¹ãç¨ã«åãæ¿ãï¼
764	*
765	*/
766	ATHUMB(call_exit_kernel)
767	AGLOBAL(call_exit_kernel)
768	ALABEL(call_exit_kernel)
769	mov r0, #CONTROL_MSP
770	msr control, r0 /* MSPãæå¹ã« */
771	isb /* control ã®æä½å¾ã«å¿
772	è¦ */
773	ldr r0, =exit_kernel /* ã«ã¼ãã«ã®çµäºå¦çãå¼ã¶ */
774	bx r0
775
776	/*
777	* å¾®å°æéå¾
778	ã¡
779	*/
780	AALIGN(2)
781	ATEXT
782	ATHUMB(sil_dly_nse)
783	AGLOBAL(sil_dly_nse)
784	ALABEL(sil_dly_nse)
785	sub r0, r0, #SIL_DLY_TIM1
786	cmp r0, #0
787	bgt sil_dly_nse1
788	bx lr
789	ALABEL(sil_dly_nse1)
790	sub r0, r0, #SIL_DLY_TIM2
791	cmp r0, #0
792	bgt sil_dly_nse1
793	bx lr
794

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