1 | /*
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2 | * TOPPERS/ASP Kernel
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3 | * Toyohashi Open Platform for Embedded Real-Time Systems/
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4 | * Advanced Standard Profile Kernel
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5 | *
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6 | * Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
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7 | * Toyohashi Univ. of Technology, JAPAN
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8 | * Copyright (C) 2005-2015 by Embedded and Real-Time Systems Laboratory
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9 | * Graduate School of Information Science, Nagoya Univ., JAPAN
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10 | *
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11 | * ä¸è¨èä½æ¨©è
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12 | ã¯ï¼ä»¥ä¸ã®(1)ã(4)ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
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13 | * ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ã使ç¨ã»è¤è£½ã»æ¹
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14 | * å¤ã»åé
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15 | å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
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16 | * (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
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17 | * 権表示ï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
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18 | * ã¹ã³ã¼ãä¸ã«å«ã¾ãã¦ãããã¨ï¼
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19 | * (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
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20 | * ç¨ã§ããå½¢ã§åé
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21 | å¸ããå ´åã«ã¯ï¼åé
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22 | å¸ã«ä¼´ãããã¥ã¡ã³ãï¼å©ç¨
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23 | * è
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24 | ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
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25 | * ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
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26 | * (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
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27 | * ç¨ã§ããªãå½¢ã§åé
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28 | å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
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29 | * ã¨ï¼
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30 | * (a) åé
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31 | å¸ã«ä¼´ãããã¥ã¡ã³ãï¼å©ç¨è
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32 | ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
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33 | * ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
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34 | * (b) åé
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35 | å¸ã®å½¢æ
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36 | ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSããã¸ã§ã¯ãã«
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37 | * å ±åãããã¨ï¼
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38 | * (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
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39 | * 害ãããï¼ä¸è¨èä½æ¨©è
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40 | ããã³TOPPERSããã¸ã§ã¯ããå
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41 | 責ãããã¨ï¼
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42 | * ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãç
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43 | * ç±ã«åºã¥ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
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44 | ããã³TOPPERSããã¸ã§ã¯ãã
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45 | * å
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46 | 責ãããã¨ï¼
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47 | *
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48 | * æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
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49 | ã
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50 | * ãã³TOPPERSããã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®ç
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51 | * ã«å¯¾ããé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§
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52 | * ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ害ã«é¢ãã¦ãï¼ã
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53 | * ã®è²¬ä»»ãè² ããªãï¼
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54 | *
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55 | * @(#) $Id: core_kernel_impl.c 301 2015-01-07 04:57:01Z ertl-ishikawa $
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56 | */
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57 |
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58 | /*
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59 | * ã³ã¢ä¾åã¢ã¸ã¥ã¼ã«ï¼ARM-Mç¨ï¼
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60 | */
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61 |
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62 | #include "kernel_impl.h"
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63 | #include "check.h"
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64 | #include "task.h"
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65 |
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66 | /*
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67 | * CPUããã¯ãã©ã°å®ç¾ã®ããã®å¤æ°
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68 | */
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69 | volatile bool_t lock_flag; /* CPUããã¯ãã©ã°ã®å¤ãä¿æããå¤æ° */
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70 | volatile uint32_t saved_iipm; /* å²è¾¼ã¿åªå
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71 | 度ãã¹ã¯ãä¿åããå¤æ° */
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72 |
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73 | /*
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74 | * ãã¯ã¿ãã¼ãã«(kernel_cfg.c)
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75 | */
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76 | extern const FP vector_table[];
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77 |
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78 | /*
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79 | * ã·ã¹ãã ä¾å¤ã»å²è¾¼ã¿ã®ï¼ä¾å¤çªå· 4ã15ï¼
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80 | * å²è¾¼ã¿åªå
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81 | 度è¨å®ã¬ã¸ã¹ã¿ã¸ã®ã¢ã¯ã»ã¹ã®ããã®é
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82 | å
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83 | */
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84 | static const unsigned int nvic_sys_pri_reg[] = {
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85 | 0,
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86 | NVIC_SYS_PRI1,
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87 | NVIC_SYS_PRI2,
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88 | NVIC_SYS_PRI3
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89 | };
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90 |
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91 | /*
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92 | * ä¾å¤ã¨å²è¾¼ã¿ã®å²è¾¼ã¿åªå
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93 | 度ãã»ãã
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94 | *
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95 | * excnoã¯ARM-Mã§å®ãããã¦ãã Exception Number ãæå®ï¼
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96 | */
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97 | void
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98 | set_exc_int_priority(uint32_t excno, uint32_t iipm){
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99 | uint32_t tmp, reg;
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100 |
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101 | /*
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102 | * å²è¾¼ã¿åªå
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103 | 度è¨å®ã¬ã¸ã¹ã¿ã®æ±ºå®
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104 | */
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105 | if ((EXCNO_MPU <= excno) && (excno <= IRQNO_SYSTICK)) {
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106 | /*
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107 | * Exception Number 4(Memory Management)ãã
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108 | * Exception Number 15(SysTick)ã¾ã§ã®å²è¾¼ã¿åªå
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109 | 度ã¯ã·ã¹ãã åªå
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110 | 度
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111 | * ã¬ã¸ã¹ã¿ã«ããè¨å®ï¼
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112 | */
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113 | reg = nvic_sys_pri_reg[excno >> 2];
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114 | }
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115 | else if ((TMIN_INTNO < excno) && (excno <= TMAX_INTNO)){
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116 | /*
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117 | * IRQå²è¾¼ã¿ãªã
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118 | */
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119 | reg = NVIC_PRI0 + (((excno - (TMIN_INTNO + 1)) >> 2) * 4);
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120 | }
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121 | else {
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122 | return ;
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123 | }
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124 |
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125 | tmp = sil_rew_mem((void *)reg);
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126 | tmp &= ~(0xFF << (8 * (excno & 0x03)));
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127 | tmp |= iipm << (8 * (excno & 0x03));
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128 | sil_wrw_mem((void *)reg, tmp);
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129 | }
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130 |
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131 | /*
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132 | * ä¾å¤ã®è¨±å¯
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133 | *
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134 | * Memory Management, Bus Fault, Usage Fault ã¯ç¦æ¢ã»è¨±å¯ãå¯è½
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135 | */
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136 | void
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137 | enable_exc(EXCNO excno)
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138 | {
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139 | uint32_t tmp;
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140 |
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141 | switch (excno) {
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142 | case EXCNO_MPU:
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143 | tmp = sil_rew_mem((void *)NVIC_SYS_HND_CTRL);
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144 | tmp |= NVIC_SYS_HND_CTRL_MEM;
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145 | sil_wrw_mem((void *)NVIC_SYS_HND_CTRL, tmp);
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146 | break;
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147 | case EXCNO_BUS:
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148 | tmp = sil_rew_mem((void *)NVIC_SYS_HND_CTRL);
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149 | tmp |= NVIC_SYS_HND_CTRL_BUS;
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150 | sil_wrw_mem((void *)NVIC_SYS_HND_CTRL, tmp);
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151 | break;
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152 | case EXCNO_USAGE:
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153 | tmp = sil_rew_mem((void *)NVIC_SYS_HND_CTRL);
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154 | tmp |= NVIC_SYS_HND_CTRL_USAGE;
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155 | sil_wrw_mem((void *)NVIC_SYS_HND_CTRL, tmp);
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156 | break;
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157 | }
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158 | }
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159 |
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160 | /*
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161 | * ä¾å¤ã®ç¦æ¢
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162 | */
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163 | void
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164 | disable_exc(EXCNO excno)
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165 | {
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166 | uint32_t tmp;
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167 |
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168 | switch (excno) {
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169 | case EXCNO_MPU:
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170 | tmp = sil_rew_mem((void *)NVIC_SYS_HND_CTRL);
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171 | tmp &= ~NVIC_SYS_HND_CTRL_MEM;
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172 | sil_wrw_mem((void *)NVIC_SYS_HND_CTRL, tmp);
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173 | break;
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174 | case EXCNO_BUS:
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175 | tmp = sil_rew_mem((void *)NVIC_SYS_HND_CTRL);
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176 | tmp &= ~NVIC_SYS_HND_CTRL_BUS;
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177 | sil_wrw_mem((void *)NVIC_SYS_HND_CTRL, tmp);
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178 | break;
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179 | case EXCNO_USAGE:
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180 | tmp = sil_rew_mem((void *)NVIC_SYS_HND_CTRL);
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181 | tmp &= ~NVIC_SYS_HND_CTRL_USAGE;
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182 | sil_wrw_mem((void *)NVIC_SYS_HND_CTRL, tmp);
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183 | break;
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184 | }
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185 | }
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186 |
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187 |
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188 | /*
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189 | * ã³ã¢ä¾åã®åæå
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190 | */
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191 | void
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192 | core_initialize(void)
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193 | {
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194 | /*
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195 | * CPUããã¯ãã©ã°å®ç¾ã®ããã®å¤æ°ã®åæå
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196 | */
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197 | lock_flag = true;
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198 | saved_iipm = IIPM_ENAALL;
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199 |
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200 | /*
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201 | * ãã¯ã¿ãã¼ãã«ãè¨å®
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202 | */
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203 | sil_wrw_mem((void*)NVIC_VECTTBL, (uint32_t)vector_table);
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204 |
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205 | /*
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206 | * åä¾å¤ã®åªå
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207 | 度ãè¨å®
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208 | * CPUããã¯ç¶æ
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209 | ã§ãçºçããããã«ï¼BASEPRIã¬ã¸ã¹ã¿ã§ãã¹ã¯ã§ã
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210 | * ãªã'0'ã¨ããï¼
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211 | */
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212 | set_exc_int_priority(EXCNO_HARD, 0);
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213 | set_exc_int_priority(EXCNO_MPU, 0);
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214 | set_exc_int_priority(EXCNO_BUS, 0);
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215 | set_exc_int_priority(EXCNO_USAGE, 0);
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216 | set_exc_int_priority(EXCNO_SVCALL, 0);
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217 | set_exc_int_priority(EXCNO_DEBUG, 0);
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218 | set_exc_int_priority(EXCNO_PENDSV, INT_IPM(-1));
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219 |
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220 | /*
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221 | * SVCãã³ãã©ãæå¹ã«
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222 | */
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223 | enable_int(EXCNO_SVCALL);
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224 |
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225 | /*
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226 | * Configuration Control Registerã®STKALIGNãããã0ã«ãã
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227 | * ã¹ã¿ãã¯ã¯8byteã¢ã©ã¤ã³ã§ãªãã4byteã¢ã©ã¤ã³
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228 | */
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229 | sil_andw((void *)CCR_BASE, ~CCR_STKALIGN);
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230 | }
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231 |
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232 | /*
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233 | * ã³ã¢ä¾åã®çµäºå¦ç
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234 | */
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235 | void
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236 | core_terminate(void)
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237 | {
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238 | extern void software_term_hook(void);
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239 | void (*volatile fp)(void) = software_term_hook;
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240 |
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241 | /*
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242 | * software_term_hookã¸ã®ãã¤ã³ã¿ãï¼ä¸æ¦volatileæå®ã®ããfpã«ä»£
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243 | * å
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244 | ¥ãã¦ãã使ãã®ã¯ï¼0ã¨ã®æ¯è¼ãæé©åã§åé¤ãããªãããã«ããã
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245 | * ãã§ããï¼
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246 | */
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247 | if (fp != 0) {
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248 | (*fp)();
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249 | }
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250 | }
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251 |
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252 | /*
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253 | * å²è¾¼ã¿è¦æ±ã©ã¤ã³å±æ§ã®è¨å®
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254 | */
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255 | void
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256 | config_int(INTNO intno, ATR intatr, PRI intpri)
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257 | {
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258 | assert(VALID_INTNO_CFGINT(intno));
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259 | assert(TMIN_INTPRI <= intpri && intpri <= TMAX_INTPRI);
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260 |
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261 | /*
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262 | * ä¸æ¦å²è¾¼ã¿ãç¦æ¢ãã
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263 | */
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264 | (void)disable_int(intno);
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265 |
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266 | /*
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267 | * å²è¾¼ã¿åªå
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268 | 度ãã»ãã
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269 | */
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270 | set_exc_int_priority(intno, INT_IPM(intpri));
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271 |
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272 | /*
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273 | * å²è¾¼ã¿è¦æ±ãã¹ã¯è§£é¤(å¿
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274 | è¦ãªå ´å)
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275 | */
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276 | if ((intatr & TA_ENAINT) != 0U) {
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277 | (void)enable_int(intno);
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278 | }
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279 | }
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280 |
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281 |
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282 | #ifndef OMIT_DEFAULT_EXC_HANDLER
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283 | /*
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284 | * Trapa以å¤ã®ä¾å¤ã§ç»é²ããã¦ããªãä¾å¤ãçºçããã¨å¼ã³åºããã
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285 | */
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286 | void
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287 | default_exc_handler(void *p_excinf)
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288 | {
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289 | uint32_t basepri = *(((uint32_t*)p_excinf) + P_EXCINF_OFFSET_BASEPRI);
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290 | uint32_t pc = *(((uint32_t*)p_excinf) + P_EXCINF_OFFSET_PC);
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291 | uint32_t xpsr = *(((uint32_t*)p_excinf) + P_EXCINF_OFFSET_XPSR);
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292 | uint32_t excno = get_ipsr() & IPSR_ISR_NUMBER;
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293 |
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294 | syslog(LOG_EMERG, "\nUnregistered Exception occurs.");
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295 | syslog(LOG_EMERG, "Excno = %08x PC = %08x XPSR = %08x basepri = %08X, p_excinf = %08X",
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296 | excno, pc, xpsr, basepri, p_excinf);
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297 |
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298 | target_exit();
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299 | }
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300 | #endif /* OMIT_DEFAULT_EXC_HANDLER */
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301 |
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302 | #ifndef OMIT_DEFAULT_INT_HANDLER
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303 | /*
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304 | * æªç»é²ã®å²è¾¼ã¿ãçºçããå ´åã«å¼ã³åºããã
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305 | */
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306 | void
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307 | default_int_handler(void *p_excinf)
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308 | {
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309 | uint32_t basepri = *(((uint32_t*)p_excinf) + P_EXCINF_OFFSET_BASEPRI);
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310 | uint32_t pc = *(((uint32_t*)p_excinf) + P_EXCINF_OFFSET_PC);
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311 | uint32_t xpsr = *(((uint32_t*)p_excinf) + P_EXCINF_OFFSET_XPSR);
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312 | uint32_t excno = get_ipsr() & IPSR_ISR_NUMBER;
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313 |
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314 | syslog(LOG_EMERG, "\nUnregistered Interrupt occurs.");
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315 | syslog(LOG_EMERG, "Excno = %08x PC = %08x XPSR = %08x basepri = %08X, p_excinf = %08X",
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316 | excno, pc, xpsr, basepri, p_excinf);
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317 |
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318 | target_exit();
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319 | }
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320 | #endif /* OMIT_DEFAULT_INT_HANDLER */
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321 |
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