source: asp3_tinet_ecnl_arm/trunk/asp3_dcre/mbed/targets/TARGET_RENESAS/TARGET_RZ_A1H/serial_api.c@ 352

Last change on this file since 352 was 352, checked in by coas-nagasima, 6 years ago

arm向けASP3版ECNLを追加
  • Property svn:eol-style set to native
  • Property svn:mime-type set to text/x-csrc;charset=UTF-8
File size: 27.5 KB
Line 
1/* mbed Microcontroller Library
2 * Copyright (c) 2006-2015 ARM Limited
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16// math.h required for floating point operations for baud rate calculation
17#include "mbed_assert.h"
18#include <math.h>
19#include <string.h>
20#include <stdlib.h>
21
22#include "serial_api.h"
23#include "cmsis.h"
24#include "pinmap.h"
25#include "gpio_api.h"
26
27#include "scif_iodefine.h"
28#include "cpg_iodefine.h"
29
30/******************************************************************************
31 * INITIALIZATION
32 ******************************************************************************/
33#define PCLK (66666666) // Define the peripheral clock P1 frequency.
34
35#define UART_NUM 8
36#define IRQ_NUM 4
37
38static void uart0_tx_irq(void);
39static void uart1_tx_irq(void);
40static void uart2_tx_irq(void);
41static void uart3_tx_irq(void);
42static void uart4_tx_irq(void);
43static void uart5_tx_irq(void);
44static void uart6_tx_irq(void);
45static void uart7_tx_irq(void);
46static void uart0_rx_irq(void);
47static void uart1_rx_irq(void);
48static void uart2_rx_irq(void);
49static void uart3_rx_irq(void);
50static void uart4_rx_irq(void);
51static void uart5_rx_irq(void);
52static void uart6_rx_irq(void);
53static void uart7_rx_irq(void);
54static void uart0_er_irq(void);
55static void uart1_er_irq(void);
56static void uart2_er_irq(void);
57static void uart3_er_irq(void);
58static void uart4_er_irq(void);
59static void uart5_er_irq(void);
60static void uart6_er_irq(void);
61static void uart7_er_irq(void);
62
63static void serial_put_done(serial_t *obj);
64static uint8_t serial_available_buffer(serial_t *obj);
65static void serial_irq_err_set(serial_t *obj, uint32_t enable);
66
67static const PinMap PinMap_UART_TX[] = {
68 {P2_14 , UART0, 6},
69 {P2_5 , UART1, 6},
70 {P4_12 , UART1, 7},
71 {P6_3 , UART2, 7},
72 {P4_14 , UART2, 7},
73 {P5_3 , UART3, 5},
74 {P8_8 , UART3, 7},
75 {P5_0 , UART4, 5},
76 {P8_14 , UART4, 7},
77 {P8_13 , UART5, 5},
78 {P11_10, UART5, 3},
79 {P6_6 , UART5, 5},
80 {P5_6 , UART6, 5},
81 {P11_1 , UART6, 4},
82 {P7_4 , UART7, 4},
83 {NC , NC , 0}
84};
85
86static const PinMap PinMap_UART_RX[] = {
87 {P2_15 , UART0, 6},
88 {P2_6 , UART1, 6},
89 {P4_13 , UART1, 7},
90 {P6_2 , UART2, 7},
91 {P4_15 , UART2, 7},
92 {P5_4 , UART3, 5},
93 {P8_9 , UART3, 7},
94 {P5_1 , UART4, 5},
95 {P8_15 , UART4, 7},
96 {P8_11 , UART5, 5},
97 {P11_11, UART5, 3},
98 {P6_7 , UART5, 5},
99 {P5_7 , UART6, 5},
100 {P11_2 , UART6, 4},
101 {P7_5 , UART7, 4},
102 {NC , NC , 0}
103};
104
105static const PinMap PinMap_UART_CTS[] = {
106 {P2_3 , UART1, 6},
107 {P11_7 , UART5, 3},
108 {P7_6 , UART7, 4},
109 {NC , NC , 0}
110};
111static const PinMap PinMap_UART_RTS[] = {
112 {P2_7 , UART1, 6},
113 {P11_8 , UART5, 3},
114 {P7_7 , UART7, 4},
115 {NC , NC , 0}
116};
117
118
119
120static const struct st_scif *SCIF[] = SCIF_ADDRESS_LIST;
121static uart_irq_handler irq_handler;
122
123int stdio_uart_inited = 0;
124serial_t stdio_uart;
125
126struct serial_global_data_s {
127 uint32_t serial_irq_id;
128 gpio_t sw_rts, sw_cts;
129 uint8_t rx_irq_set_flow, rx_irq_set_api;
130 serial_t *tranferring_obj, *receiving_obj;
131 uint32_t async_tx_callback, async_rx_callback;
132 int event, wanted_rx_events;
133};
134
135static struct serial_global_data_s uart_data[UART_NUM];
136
137static const IRQn_Type irq_set_tbl[UART_NUM][IRQ_NUM] = {
138 {SCIFRXI0_IRQn, SCIFTXI0_IRQn, SCIFBRI0_IRQn, SCIFERI0_IRQn},
139 {SCIFRXI1_IRQn, SCIFTXI1_IRQn, SCIFBRI1_IRQn, SCIFERI1_IRQn},
140 {SCIFRXI2_IRQn, SCIFTXI2_IRQn, SCIFBRI2_IRQn, SCIFERI2_IRQn},
141 {SCIFRXI3_IRQn, SCIFTXI3_IRQn, SCIFBRI3_IRQn, SCIFERI3_IRQn},
142 {SCIFRXI4_IRQn, SCIFTXI4_IRQn, SCIFBRI4_IRQn, SCIFERI4_IRQn},
143 {SCIFRXI5_IRQn, SCIFTXI5_IRQn, SCIFBRI5_IRQn, SCIFERI5_IRQn},
144 {SCIFRXI6_IRQn, SCIFTXI6_IRQn, SCIFBRI6_IRQn, SCIFERI6_IRQn},
145 {SCIFRXI7_IRQn, SCIFTXI7_IRQn, SCIFBRI7_IRQn, SCIFERI7_IRQn}
146};
147
148static const IRQHandler hander_set_tbl[UART_NUM][IRQ_NUM] = {
149 {uart0_rx_irq, uart0_tx_irq, uart0_er_irq, uart0_er_irq},
150 {uart1_rx_irq, uart1_tx_irq, uart1_er_irq, uart1_er_irq},
151 {uart2_rx_irq, uart2_tx_irq, uart2_er_irq, uart2_er_irq},
152 {uart3_rx_irq, uart3_tx_irq, uart3_er_irq, uart3_er_irq},
153 {uart4_rx_irq, uart4_tx_irq, uart4_er_irq, uart4_er_irq},
154 {uart5_rx_irq, uart5_tx_irq, uart5_er_irq, uart5_er_irq},
155 {uart6_rx_irq, uart6_tx_irq, uart6_er_irq, uart6_er_irq},
156 {uart7_rx_irq, uart7_tx_irq, uart7_er_irq, uart7_er_irq}
157};
158
159static __IO uint16_t *SCSCR_MATCH[] = {
160 &SCSCR_0,
161 &SCSCR_1,
162 &SCSCR_2,
163 &SCSCR_3,
164 &SCSCR_4,
165 &SCSCR_5,
166 &SCSCR_6,
167 &SCSCR_7,
168};
169
170static __IO uint16_t *SCFSR_MATCH[] = {
171 &SCFSR_0,
172 &SCFSR_1,
173 &SCFSR_2,
174 &SCFSR_3,
175 &SCFSR_4,
176 &SCFSR_5,
177 &SCFSR_6,
178 &SCFSR_7,
179};
180
181
182void serial_init(serial_t *obj, PinName tx, PinName rx) {
183 volatile uint8_t dummy ;
184 int is_stdio_uart = 0;
185 // determine the UART to use
186 uint32_t uart_tx = pinmap_peripheral(tx, PinMap_UART_TX);
187 uint32_t uart_rx = pinmap_peripheral(rx, PinMap_UART_RX);
188 uint32_t uart = pinmap_merge(uart_tx, uart_rx);
189
190 MBED_ASSERT((int)uart != NC);
191
192 obj->serial.uart = (struct st_scif *)SCIF[uart];
193 // enable power
194 switch (uart) {
195 case UART0:
196 CPG.STBCR4 &= ~(1 << 7);
197 break;
198 case UART1:
199 CPG.STBCR4 &= ~(1 << 6);
200 break;
201 case UART2:
202 CPG.STBCR4 &= ~(1 << 5);
203 break;
204 case UART3:
205 CPG.STBCR4 &= ~(1 << 4);
206 break;
207 case UART4:
208 CPG.STBCR4 &= ~(1 << 3);
209 break;
210 case UART5:
211 CPG.STBCR4 &= ~(1 << 2);
212 break;
213 case UART6:
214 CPG.STBCR4 &= ~(1 << 1);
215 break;
216 case UART7:
217 CPG.STBCR4 &= ~(1 << 0);
218 break;
219 }
220 dummy = CPG.STBCR4;
221
222 /* ==== SCIF initial setting ==== */
223 /* ---- Serial control register (SCSCR) setting ---- */
224 /* B'00 : Internal CLK */
225 obj->serial.uart->SCSCR = 0x0000u; /* SCIF transmitting and receiving operations stop */
226
227 /* ---- FIFO control register (SCFCR) setting ---- */
228 /* Transmit FIFO reset & Receive FIFO data register reset */
229 obj->serial.uart->SCFCR = 0x0006;
230
231 /* ---- Serial status register (SCFSR) setting ---- */
232 dummy = obj->serial.uart->SCFSR;
233 obj->serial.uart->SCFSR = (dummy & 0xFF6Cu); /* ER,BRK,DR bit clear */
234
235 /* ---- Line status register (SCLSR) setting ---- */
236 /* ORER bit clear */
237 obj->serial.uart->SCLSR = 0;
238
239 /* ---- Serial extension mode register (SCEMR) setting ----
240 b7 BGDM - Baud rate generator double-speed mode : Normal mode
241 b0 ABCS - Base clock select in asynchronous mode : Base clock is 16 times the bit rate */
242 obj->serial.uart->SCEMR = 0x0000u;
243
244 /* ---- Bit rate register (SCBRR) setting ---- */
245 serial_baud (obj, 9600);
246 serial_format(obj, 8, ParityNone, 1);
247
248 /* ---- FIFO control register (SCFCR) setting ---- */
249 obj->serial.uart->SCFCR = 0x0030u;
250
251 /* ---- Serial port register (SCSPTR) setting ----
252 b1 SPB2IO - Serial port break output : disabled
253 b0 SPB2DT - Serial port break data : High-level */
254 obj->serial.uart->SCSPTR = 0x0003u; // SPB2IO = 1, SPB2DT = 1
255
256 /* ---- Line status register (SCLSR) setting ----
257 b0 ORER - Overrun error detect : clear */
258
259 if (obj->serial.uart->SCLSR & 0x0001) {
260 obj->serial.uart->SCLSR = 0u; // ORER clear
261 }
262
263 // pinout the chosen uart
264 pinmap_pinout(tx, PinMap_UART_TX);
265 pinmap_pinout(rx, PinMap_UART_RX);
266
267 switch (uart) {
268 case UART0:
269 obj->serial.index = 0;
270 break;
271 case UART1:
272 obj->serial.index = 1;
273 break;
274 case UART2:
275 obj->serial.index = 2;
276 break;
277 case UART3:
278 obj->serial.index = 3;
279 break;
280 case UART4:
281 obj->serial.index = 4;
282 break;
283 case UART5:
284 obj->serial.index = 5;
285 break;
286 case UART6:
287 obj->serial.index = 6;
288 break;
289 case UART7:
290 obj->serial.index = 7;
291 break;
292 }
293 uart_data[obj->serial.index].sw_rts.pin = NC;
294 uart_data[obj->serial.index].sw_cts.pin = NC;
295
296 /* ---- Serial control register (SCSCR) setting ---- */
297 /* Setting the TE and RE bits enables the TxD and RxD pins to be used. */
298 obj->serial.uart->SCSCR = 0x0070;
299
300 is_stdio_uart = (uart == STDIO_UART) ? (1) : (0);
301
302 if (is_stdio_uart) {
303 stdio_uart_inited = 1;
304 memcpy(&stdio_uart, obj, sizeof(serial_t));
305 }
306}
307
308void serial_free(serial_t *obj) {
309 uart_data[obj->serial.index].serial_irq_id = 0;
310}
311
312// serial_baud
313// set the baud rate, taking in to account the current SystemFrequency
314void serial_baud(serial_t *obj, int baudrate) {
315 uint16_t DL;
316
317 obj->serial.uart->SCSMR &= ~0x0003;
318
319 if (baudrate > 32552) {
320 obj->serial.uart->SCEMR = 0x0081; // BGDM = 1, ABCS = 1
321 DL = PCLK / (8 * baudrate);
322 if (DL > 0) {
323 DL--;
324 }
325 obj->serial.uart->SCBRR = (uint8_t)DL;
326 } else if (baudrate > 16276) {
327 obj->serial.uart->SCEMR = 0x0080; // BGDM = 1
328 obj->serial.uart->SCBRR = PCLK / (16 * baudrate) - 1;
329 } else if (baudrate > 8138) {
330 obj->serial.uart->SCEMR = 0x0000;
331 obj->serial.uart->SCBRR = PCLK / (32 * baudrate) - 1;
332 } else if (baudrate > 4169) {
333 obj->serial.uart->SCSMR |= 0x0001;
334 obj->serial.uart->SCEMR = 0x0080; // BGDM = 1
335 obj->serial.uart->SCBRR = PCLK / (64 * baudrate) - 1;
336 } else if (baudrate > 2034) {
337 obj->serial.uart->SCSMR |= 0x0001;
338 obj->serial.uart->SCEMR = 0x0000;
339 obj->serial.uart->SCBRR = PCLK / (128 * baudrate) - 1;
340 } else if (baudrate > 1017) {
341 obj->serial.uart->SCSMR |= 0x0002;
342 obj->serial.uart->SCEMR = 0x0080; // BGDM = 1
343 obj->serial.uart->SCBRR = PCLK / (256 * baudrate) - 1;
344 } else if (baudrate > 508) {
345 obj->serial.uart->SCSMR |= 0x0002;
346 obj->serial.uart->SCEMR = 0x0000;
347 obj->serial.uart->SCBRR = PCLK / (512 * baudrate) - 1;
348 } else if (baudrate > 254) {
349 obj->serial.uart->SCSMR |= 0x0003;
350 obj->serial.uart->SCEMR = 0x0080; // BGDM = 1
351 obj->serial.uart->SCBRR = PCLK / (1024 * baudrate) - 1;
352 } else if (baudrate > 127) {
353 obj->serial.uart->SCSMR |= 0x0003;
354 obj->serial.uart->SCEMR = 0x0000;
355 obj->serial.uart->SCBRR = PCLK / (2048 * baudrate) - 1;
356 } else {
357 obj->serial.uart->SCSMR |= 0x0003;
358 obj->serial.uart->SCEMR = 0x0000;
359 obj->serial.uart->SCBRR = 0xFFu;
360 }
361}
362
363void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
364 int parity_enable;
365 int parity_select;
366
367 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2)); // 0: 1 stop bits, 1: 2 stop bits
368 MBED_ASSERT((data_bits > 4) && (data_bits < 9)); // 5: 5 data bits ... 3: 8 data bits
369 MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven) ||
370 (parity == ParityForced1) || (parity == ParityForced0));
371
372 stop_bits = (stop_bits == 1)? 0:
373 (stop_bits == 2)? 1:
374 0; // must not to be
375
376 data_bits = (data_bits == 8)? 0:
377 (data_bits == 7)? 1:
378 0; // must not to be
379
380 switch (parity) {
381 case ParityNone:
382 parity_enable = 0;
383 parity_select = 0;
384 break;
385 case ParityOdd:
386 parity_enable = 1;
387 parity_select = 1;
388 break;
389 case ParityEven:
390 parity_enable = 1;
391 parity_select = 0;
392 break;
393 case ParityForced1:
394 case ParityForced0:
395 default:
396 parity_enable = 0;
397 parity_select = 0;
398 break;
399 }
400
401 obj->serial.uart->SCSMR = (obj->serial.uart->SCSMR & ~0x0078)
402 | (data_bits << 6)
403 | (parity_enable << 5)
404 | (parity_select << 4)
405 | (stop_bits << 3);
406}
407
408/******************************************************************************
409 * INTERRUPTS HANDLING
410 ******************************************************************************/
411
412static void uart_tx_irq(IRQn_Type irq_num, uint32_t index) {
413 __IO uint16_t *dmy_rd_scscr;
414 __IO uint16_t *dmy_rd_scfsr;
415 serial_t *obj;
416 int i;
417
418 dmy_rd_scscr = SCSCR_MATCH[index];
419 *dmy_rd_scscr &= 0x007B; // Clear TIE and Write to bit15~8,2 is always 0
420 dmy_rd_scfsr = SCFSR_MATCH[index];
421 *dmy_rd_scfsr = (*dmy_rd_scfsr & ~0x0020); // Set TEND
422
423 obj = uart_data[index].tranferring_obj;
424 if (obj) {
425 i = obj->tx_buff.length - obj->tx_buff.pos;
426 if (0 < i) {
427 if (serial_available_buffer(obj) < i) {
428 i = serial_available_buffer(obj);
429 }
430 do {
431 uint8_t c = *(uint8_t *)obj->tx_buff.buffer;
432 obj->tx_buff.buffer = (uint8_t *)obj->tx_buff.buffer + 1;
433 ++obj->tx_buff.pos;
434 obj->serial.uart->SCFTDR = c;
435 } while (--i);
436 serial_put_done(obj);
437 } else {
438 uart_data[index].tranferring_obj = NULL;
439 uart_data[index].event = SERIAL_EVENT_TX_COMPLETE;
440 ((void (*)())uart_data[index].async_tx_callback)();
441 }
442 }
443
444 irq_handler(uart_data[index].serial_irq_id, TxIrq);
445}
446
447static void uart_rx_irq(IRQn_Type irq_num, uint32_t index) {
448 __IO uint16_t *dmy_rd_scscr;
449 __IO uint16_t *dmy_rd_scfsr;
450 serial_t *obj;
451 int c;
452
453 dmy_rd_scscr = SCSCR_MATCH[index];
454 *dmy_rd_scscr &= 0x00B3; // Clear RIE,REIE and Write to bit15~8,2 is always 0
455 dmy_rd_scfsr = SCFSR_MATCH[index];
456 *dmy_rd_scfsr = (*dmy_rd_scfsr & ~0x0003); // Clear RDF,DR
457
458 obj = uart_data[index].receiving_obj;
459 if (obj) {
460 if (obj->serial.uart->SCLSR & 1) {
461 if (uart_data[index].wanted_rx_events & SERIAL_EVENT_RX_OVERRUN_ERROR) {
462 serial_rx_abort_asynch(obj);
463 uart_data[index].event = SERIAL_EVENT_RX_OVERRUN_ERROR;
464 ((void (*)())uart_data[index].async_rx_callback)();
465 }
466 return;
467 }
468 c = serial_getc(obj);
469 if (c != -1) {
470 ((uint8_t *)obj->rx_buff.buffer)[obj->rx_buff.pos] = c;
471 ++obj->rx_buff.pos;
472 if (c == obj->char_match && ! obj->char_found) {
473 obj->char_found = 1;
474 if (obj->rx_buff.pos == obj->rx_buff.length) {
475 if (uart_data[index].wanted_rx_events & SERIAL_EVENT_RX_COMPLETE) {
476 uart_data[index].event = SERIAL_EVENT_RX_COMPLETE;
477 }
478 }
479 if (uart_data[index].wanted_rx_events & SERIAL_EVENT_RX_CHARACTER_MATCH) {
480 uart_data[index].event |= SERIAL_EVENT_RX_CHARACTER_MATCH;
481 }
482 if (uart_data[index].event) {
483 uart_data[index].receiving_obj = NULL;
484 ((void (*)())uart_data[index].async_rx_callback)();
485 }
486 } else if (obj->rx_buff.pos == obj->rx_buff.length) {
487 uart_data[index].receiving_obj = NULL;
488 if (uart_data[index].wanted_rx_events & SERIAL_EVENT_RX_COMPLETE) {
489 uart_data[index].event = SERIAL_EVENT_RX_COMPLETE;
490 ((void (*)())uart_data[index].async_rx_callback)();
491 }
492 }
493 } else {
494 serial_rx_abort_asynch(obj);
495 if (uart_data[index].wanted_rx_events & (SERIAL_EVENT_RX_PARITY_ERROR | SERIAL_EVENT_RX_FRAMING_ERROR)) {
496 uart_data[index].event = SERIAL_EVENT_RX_PARITY_ERROR | SERIAL_EVENT_RX_FRAMING_ERROR;
497 if (obj->serial.uart->SCFSR & 1 << 2) {
498 uart_data[index].event = SERIAL_EVENT_RX_PARITY_ERROR;
499 } else if (obj->serial.uart->SCFSR & 1 << 3) {
500 uart_data[index].event = SERIAL_EVENT_RX_FRAMING_ERROR;
501 }
502 ((void (*)())uart_data[index].async_rx_callback)();
503 }
504 return;
505 }
506 }
507
508 irq_handler(uart_data[index].serial_irq_id, RxIrq);
509}
510
511static void uart_err_irq(IRQn_Type irq_num, uint32_t index) {
512 serial_t *obj = uart_data[index].receiving_obj;
513 int was_masked, err_read;
514
515 if (obj) {
516 serial_irq_err_set(obj, 0);
517 if (uart_data[index].wanted_rx_events & (SERIAL_EVENT_RX_PARITY_ERROR | SERIAL_EVENT_RX_FRAMING_ERROR)) {
518 uart_data[index].event = SERIAL_EVENT_RX_PARITY_ERROR | SERIAL_EVENT_RX_FRAMING_ERROR;
519 if (obj->serial.uart->SCFSR & 1 << 2) {
520 uart_data[index].event = SERIAL_EVENT_RX_PARITY_ERROR;
521 } else if (obj->serial.uart->SCFSR & 1 << 3) {
522 uart_data[index].event = SERIAL_EVENT_RX_FRAMING_ERROR;
523 }
524 ((void (*)())uart_data[index].async_rx_callback)();
525 }
526 serial_rx_abort_asynch(obj);
527
528#if defined ( __ICCARM__ )
529 was_masked = __disable_irq_iar();
530#else
531 was_masked = __disable_irq();
532#endif /* __ICCARM__ */
533 if (obj->serial.uart->SCFSR & 0x93) {
534 err_read = obj->serial.uart->SCFSR;
535 obj->serial.uart->SCFSR = (err_read & ~0x93);
536 }
537 if (obj->serial.uart->SCLSR & 1) {
538 obj->serial.uart->SCLSR = 0;
539 }
540 if (!was_masked) {
541 __enable_irq();
542 }
543 }
544}
545
546/* TX handler */
547static void uart0_tx_irq(void) {
548 uart_tx_irq(SCIFTXI0_IRQn, 0);
549}
550static void uart1_tx_irq(void) {
551 uart_tx_irq(SCIFTXI1_IRQn, 1);
552}
553static void uart2_tx_irq(void) {
554 uart_tx_irq(SCIFTXI2_IRQn, 2);
555}
556static void uart3_tx_irq(void) {
557 uart_tx_irq(SCIFTXI3_IRQn, 3);
558}
559static void uart4_tx_irq(void) {
560 uart_tx_irq(SCIFTXI4_IRQn, 4);
561}
562static void uart5_tx_irq(void) {
563 uart_tx_irq(SCIFTXI5_IRQn, 5);
564}
565static void uart6_tx_irq(void) {
566 uart_tx_irq(SCIFTXI6_IRQn, 6);
567}
568static void uart7_tx_irq(void) {
569 uart_tx_irq(SCIFTXI7_IRQn, 7);
570}
571/* RX handler */
572static void uart0_rx_irq(void) {
573 uart_rx_irq(SCIFRXI0_IRQn, 0);
574}
575static void uart1_rx_irq(void) {
576 uart_rx_irq(SCIFRXI1_IRQn, 1);
577}
578static void uart2_rx_irq(void) {
579 uart_rx_irq(SCIFRXI2_IRQn, 2);
580}
581static void uart3_rx_irq(void) {
582 uart_rx_irq(SCIFRXI3_IRQn, 3);
583}
584static void uart4_rx_irq(void) {
585 uart_rx_irq(SCIFRXI4_IRQn, 4);
586}
587static void uart5_rx_irq(void) {
588 uart_rx_irq(SCIFRXI5_IRQn, 5);
589}
590static void uart6_rx_irq(void) {
591 uart_rx_irq(SCIFRXI6_IRQn, 6);
592}
593static void uart7_rx_irq(void) {
594 uart_rx_irq(SCIFRXI7_IRQn, 7);
595}
596/* Error handler */
597static void uart0_er_irq(void)
598{
599 uart_err_irq(SCIFERI0_IRQn, 0);
600}
601static void uart1_er_irq(void)
602{
603 uart_err_irq(SCIFERI0_IRQn, 1);
604}
605static void uart2_er_irq(void)
606{
607 uart_err_irq(SCIFERI0_IRQn, 2);
608}
609static void uart3_er_irq(void)
610{
611 uart_err_irq(SCIFERI0_IRQn, 3);
612}
613static void uart4_er_irq(void)
614{
615 uart_err_irq(SCIFERI0_IRQn, 4);
616}
617static void uart5_er_irq(void)
618{
619 uart_err_irq(SCIFERI0_IRQn, 5);
620}
621static void uart6_er_irq(void)
622{
623 uart_err_irq(SCIFERI0_IRQn, 6);
624}
625static void uart7_er_irq(void)
626{
627 uart_err_irq(SCIFERI0_IRQn, 7);
628}
629
630void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
631 irq_handler = handler;
632 uart_data[obj->serial.index].serial_irq_id = id;
633}
634
635static void serial_irq_set_irq(IRQn_Type IRQn, IRQHandler handler, uint32_t enable)
636{
637 if (enable) {
638 InterruptHandlerRegister(IRQn, (void (*)(uint32_t))handler);
639 GIC_SetPriority(IRQn, 5);
640 GIC_EnableIRQ(IRQn);
641 } else {
642 GIC_DisableIRQ(IRQn);
643 }
644}
645
646static void serial_irq_set_internal(serial_t *obj, SerialIrq irq, uint32_t enable) {
647 IRQn_Type IRQn;
648 IRQHandler handler;
649
650 IRQn = irq_set_tbl[obj->serial.index][irq];
651 handler = hander_set_tbl[obj->serial.index][irq];
652
653 if ((obj->serial.index >= 0) && (obj->serial.index <= 7)) {
654 serial_irq_set_irq(IRQn, handler, enable);
655 }
656}
657
658static void serial_irq_err_set(serial_t *obj, uint32_t enable)
659{
660 serial_irq_set_irq(irq_set_tbl[obj->serial.index][2], hander_set_tbl[obj->serial.index][2], enable);
661 serial_irq_set_irq(irq_set_tbl[obj->serial.index][3], hander_set_tbl[obj->serial.index][3], enable);
662}
663
664void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
665 if (RxIrq == irq) {
666 uart_data[obj->serial.index].rx_irq_set_api = enable;
667 }
668 serial_irq_set_internal(obj, irq, enable);
669}
670
671static void serial_flow_irq_set(serial_t *obj, uint32_t enable) {
672 uart_data[obj->serial.index].rx_irq_set_flow = enable;
673 serial_irq_set_internal(obj, RxIrq, enable);
674}
675
676/******************************************************************************
677 * READ/WRITE
678 ******************************************************************************/
679int serial_getc(serial_t *obj) {
680 uint16_t err_read;
681 int data;
682 int was_masked;
683
684#if defined ( __ICCARM__ )
685 was_masked = __disable_irq_iar();
686#else
687 was_masked = __disable_irq();
688#endif /* __ICCARM__ */
689 if (obj->serial.uart->SCFSR & 0x93) {
690 err_read = obj->serial.uart->SCFSR;
691 obj->serial.uart->SCFSR = (err_read & ~0x93);
692 }
693 obj->serial.uart->SCSCR |= 0x0040; // Set RIE
694 if (!was_masked) {
695 __enable_irq();
696 }
697
698 if (obj->serial.uart->SCLSR & 0x0001) {
699 obj->serial.uart->SCLSR = 0u; // ORER clear
700 }
701
702 while (!serial_readable(obj));
703 data = obj->serial.uart->SCFRDR & 0xff;
704
705#if defined ( __ICCARM__ )
706 was_masked = __disable_irq_iar();
707#else
708 was_masked = __disable_irq();
709#endif /* __ICCARM__ */
710 err_read = obj->serial.uart->SCFSR;
711 obj->serial.uart->SCFSR = (err_read & 0xfffD); // Clear RDF
712 if (!was_masked) {
713 __enable_irq();
714 }
715
716 if (err_read & 0x80) {
717 data = -1; //err
718 }
719 return data;
720}
721
722void serial_putc(serial_t *obj, int c) {
723 while (!serial_writable(obj));
724 obj->serial.uart->SCFTDR = c;
725 serial_put_done(obj);
726}
727
728static void serial_put_done(serial_t *obj)
729{
730 int was_masked;
731 volatile uint16_t dummy_read;
732
733#if defined ( __ICCARM__ )
734 was_masked = __disable_irq_iar();
735#else
736 was_masked = __disable_irq();
737#endif /* __ICCARM__ */
738 dummy_read = obj->serial.uart->SCFSR;
739 obj->serial.uart->SCFSR = (dummy_read & 0xff9f); // Clear TEND/TDFE
740 obj->serial.uart->SCSCR |= 0x0080; // Set TIE
741 if (!was_masked) {
742 __enable_irq();
743 }
744}
745
746int serial_readable(serial_t *obj) {
747 return ((obj->serial.uart->SCFSR & 0x02) != 0); // RDF
748}
749
750int serial_writable(serial_t *obj) {
751 return ((obj->serial.uart->SCFSR & 0x20) != 0); // TDFE
752}
753
754void serial_clear(serial_t *obj) {
755 int was_masked;
756#if defined ( __ICCARM__ )
757 was_masked = __disable_irq_iar();
758#else
759 was_masked = __disable_irq();
760#endif /* __ICCARM__ */
761
762 obj->serial.uart->SCFCR |= 0x06; // TFRST = 1, RFRST = 1
763 obj->serial.uart->SCFCR &= ~0x06; // TFRST = 0, RFRST = 0
764 obj->serial.uart->SCFSR &= ~0x0093u; // ER, BRK, RDF, DR = 0
765
766 if (!was_masked) {
767 __enable_irq();
768 }
769}
770
771void serial_pinout_tx(PinName tx) {
772 pinmap_pinout(tx, PinMap_UART_TX);
773}
774
775void serial_break_set(serial_t *obj) {
776 int was_masked;
777#if defined ( __ICCARM__ )
778 was_masked = __disable_irq_iar();
779#else
780 was_masked = __disable_irq();
781#endif /* __ICCARM__ */
782 // TxD Output(L)
783 obj->serial.uart->SCSPTR &= ~0x0001u; // SPB2DT = 0
784 obj->serial.uart->SCSCR &= ~0x0020u; // TE = 0 (Output disable)
785 if (!was_masked) {
786 __enable_irq();
787 }
788}
789
790void serial_break_clear(serial_t *obj) {
791 int was_masked;
792#if defined ( __ICCARM__ )
793 was_masked = __disable_irq_iar();
794#else
795 was_masked = __disable_irq();
796#endif /* __ICCARM__ */
797 obj->serial.uart->SCSCR |= 0x0020u; // TE = 1 (Output enable)
798 obj->serial.uart->SCSPTR |= 0x0001u; // SPB2DT = 1
799 if (!was_masked) {
800 __enable_irq();
801 }
802}
803
804void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow) {
805 // determine the UART to use
806 int was_masked;
807
808 serial_flow_irq_set(obj, 0);
809
810 if (type == FlowControlRTSCTS) {
811#if defined ( __ICCARM__ )
812 was_masked = __disable_irq_iar();
813#else
814 was_masked = __disable_irq();
815#endif /* __ICCARM__ */
816 obj->serial.uart->SCFCR = 0x0008u; // CTS/RTS enable
817 if (!was_masked) {
818 __enable_irq();
819 }
820 pinmap_pinout(rxflow, PinMap_UART_RTS);
821 pinmap_pinout(txflow, PinMap_UART_CTS);
822 } else {
823#if defined ( __ICCARM__ )
824 was_masked = __disable_irq_iar();
825#else
826 was_masked = __disable_irq();
827#endif /* __ICCARM__ */
828 obj->serial.uart->SCFCR = 0x0000u; // CTS/RTS diable
829 if (!was_masked) {
830 __enable_irq();
831 }
832 }
833}
834
835static uint8_t serial_available_buffer(serial_t *obj)
836{
837 return 1;
838 /* Faster but unstable way */
839 /*
840 uint16_t ret = 16 - ((obj->serial.uart->SCFDR >> 8) & 0x1F);
841 while (ret == 0) {
842 ret = 16 - ((obj->serial.uart->SCFDR >> 8) & 0x1F);
843 }
844 MBED_ASSERT(0 < ret && ret <= 16);
845 return ret;
846 */
847}
848
849#if DEVICE_SERIAL_ASYNCH
850
851/******************************************************************************
852 * ASYNCHRONOUS HAL
853 ******************************************************************************/
854
855int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length, uint8_t tx_width, uint32_t handler, uint32_t event, DMAUsage hint)
856{
857 int i;
858 buffer_t *buf = &obj->tx_buff;
859 struct serial_global_data_s *data = uart_data + obj->serial.index;
860
861 if (tx_length == 0) {
862 return 0;
863 }
864
865 buf->buffer = (void *)tx;
866 buf->length = tx_length * tx_width / 8;
867 buf->pos = 0;
868 buf->width = tx_width;
869 data->tranferring_obj = obj;
870 data->async_tx_callback = handler;
871 serial_irq_set(obj, TxIrq, 1);
872
873 while (!serial_writable(obj));
874 i = buf->length;
875 if (serial_available_buffer(obj) < i) {
876 i = serial_available_buffer(obj);
877 }
878 do {
879 uint8_t c = *(uint8_t *)buf->buffer;
880 obj->tx_buff.buffer = (uint8_t *)obj->tx_buff.buffer + 1;
881 ++buf->pos;
882 obj->serial.uart->SCFTDR = c;
883 } while (--i);
884 serial_put_done(obj);
885
886 return buf->length;
887}
888
889void serial_rx_asynch(serial_t *obj, void *rx, size_t rx_length, uint8_t rx_width, uint32_t handler, uint32_t event, uint8_t char_match, DMAUsage hint)
890{
891 buffer_t *buf = &obj->rx_buff;
892 struct serial_global_data_s *data = uart_data + obj->serial.index;
893
894 if (rx_length == 0) {
895 return;
896 }
897
898 buf->buffer = rx;
899 buf->length = rx_length * rx_width / 8;
900 buf->pos = 0;
901 buf->width = rx_width;
902 obj->char_match = char_match;
903 obj->char_found = 0;
904 data->receiving_obj = obj;
905 data->async_rx_callback = handler;
906 data->event = 0;
907 data->wanted_rx_events = event;
908
909 serial_irq_set(obj, RxIrq, 1);
910 serial_irq_err_set(obj, 1);
911}
912
913uint8_t serial_tx_active(serial_t *obj)
914{
915 return uart_data[obj->serial.index].tranferring_obj != NULL;
916}
917
918uint8_t serial_rx_active(serial_t *obj)
919{
920 return uart_data[obj->serial.index].receiving_obj != NULL;
921}
922
923int serial_irq_handler_asynch(serial_t *obj)
924{
925 return uart_data[obj->serial.index].event;
926}
927
928void serial_tx_abort_asynch(serial_t *obj)
929{
930 uart_data[obj->serial.index].tranferring_obj = NULL;
931 obj->serial.uart->SCFCR |= 1 << 2;
932 obj->serial.uart->SCFCR &= ~(1 << 2);
933}
934
935void serial_rx_abort_asynch(serial_t *obj)
936{
937 uart_data[obj->serial.index].receiving_obj = NULL;
938 obj->serial.uart->SCFCR |= 1 << 1;
939 obj->serial.uart->SCFCR &= ~(1 << 1);
940}
941
942#endif
Note: See TracBrowser for help on using the repository browser.