1 | /* mbed Microcontroller Library
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2 | * Copyright (c) 2006-2015 ARM Limited
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3 | *
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4 | * Licensed under the Apache License, Version 2.0 (the "License");
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5 | * you may not use this file except in compliance with the License.
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6 | * You may obtain a copy of the License at
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7 | *
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8 | * http://www.apache.org/licenses/LICENSE-2.0
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9 | *
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10 | * Unless required by applicable law or agreed to in writing, software
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11 | * distributed under the License is distributed on an "AS IS" BASIS,
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12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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13 | * See the License for the specific language governing permissions and
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14 | * limitations under the License.
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15 | */
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16 |
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17 | #include "mbed_assert.h"
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18 | #include "device.h"
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19 |
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20 | #if DEVICE_RTC
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21 |
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22 | #include "rtc_api.h"
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23 | #include "iodefine.h"
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24 | #include "mbed_drv_cfg.h"
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25 | #include "mbed_mktime.h"
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26 |
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27 | #define RCR1_VAL_ON (0x08u) // AIE = 1
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28 | #define RCR1_VAL_OFF (0x00u)
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29 | #define RCR3_VAL (0x00u)
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30 | #define RCR5_VAL (0x00u)
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31 |
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32 | #ifdef USE_RTCX1_CLK
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33 | #define RCR2_VAL_ALLSTOP (0x08u)
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34 | #define RCR2_VAL_START (0x09u) // START = 1
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35 | #define RCR2_VAL_RESET (0x0Au) // RESET = 1
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36 | #define RCR5_VAL_RTCX1 (0x00u) // RCKSEL = clock rtc from RTCX1(32.768 kHz)
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37 | #elif defined(USE_EXTAL_CLK)
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38 | #define RCR2_VAL_ALLSTOP (0x00u)
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39 | #define RCR2_VAL_START (0x01u) // START = 1
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40 | #define RCR2_VAL_RESET (0x02u) // RESET = 1
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41 | #define RCR5_VAL_EXTAL (0x01u) // RCKSEL = clock rtc from EXTAL
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42 | #define RFRH_VAL_13333 (0x8003u) // 13.3333MHz (= 64Hz * 0x32DCD)
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43 | #define RFRL_VAL_13333 (0x2DCDu) //
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44 | #elif defined(USE_RTCX3_CLK)
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45 | #define RCR2_VAL_ALLSTOP (0x08u)
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46 | #define RCR2_VAL_START (0x09u) // START = 1
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47 | #define RCR2_VAL_RESET (0x0Au) // RESET = 1
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48 | #define RCR5_VAL_RTCX3 (0x02u) // RCKSEL = clock rtc from RTCX3(4.000 MHz)
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49 | #define RFRH_VAL_4000 (0x8000u) // 4.000MHz (= 64Hz * 0xF424)
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50 | #define RFRL_VAL_4000 (0xF424u) //
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51 | #else
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52 | #error Select RTC clock input !
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53 | #endif
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54 |
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55 | #define RFRH_VAL_MAX (0x0007u) // MAX value (= 128Hz * 0x7FFFF)
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56 | #define RFRL_VAL_MAX (0xFFFFu) //
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57 |
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58 | #define MASK_00_03_POS (0x000Fu)
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59 | #define MASK_04_07_POS (0x00F0u)
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60 | #define MASK_08_11_POS (0x0F00u)
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61 | #define MASK_12_15_POS (0xF000u)
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62 | #define MASK_16_20_POS (0x000F0000u)
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63 | #define SHIFT_1_HBYTE (4u)
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64 | #define SHIFT_2_HBYTE (8u)
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65 | #define SHIFT_3_HBYTE (12u)
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66 | #define SHIFT_1BYTE (8u)
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67 | #define SHIFT_2BYTE (16u)
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68 |
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69 | #define TIME_ERROR_VAL (0u)
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70 |
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71 | static int rtc_dec8_to_hex(uint8_t dec_val, uint8_t offset, int *hex_val);
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72 | static int rtc_dec16_to_hex(uint16_t dec_val, uint16_t offset, int *hex_val);
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73 | static uint8_t rtc_hex8_to_dec(uint8_t hex_val);
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74 | static uint16_t rtc_hex16_to_dec(uint16_t hex_val);
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75 |
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76 |
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77 | /*
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78 | * Setup the RTC based on a time structure.
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79 | * The rtc_init function should be executed first.
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80 | * [in]
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81 | * None.
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82 | * [out]
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83 | * None.
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84 | */
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85 | void rtc_init(void)
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86 | {
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87 | volatile uint8_t dummy_read;
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88 |
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89 | CPG.STBCR6 &= ~(CPG_STBCR6_BIT_MSTP60);
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90 |
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91 | // Set control register
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92 | RTC.RCR2 = RCR2_VAL_ALLSTOP;
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93 | RTC.RCR1 = RCR1_VAL_ON;
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94 | RTC.RCR3 = RCR3_VAL;
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95 |
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96 | #ifdef USE_RTCX1_CLK
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97 | RTC.RCR5 = RCR5_VAL_RTCX1;
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98 | RTC.RFRH = 0;
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99 | RTC.RFRL = 0;
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100 | #elif defined(USE_EXTAL_CLK)
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101 | RTC.RCR5 = RCR5_VAL_EXTAL;
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102 | RTC.RFRH = RFRH_VAL_13333;
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103 | RTC.RFRL = RFRL_VAL_13333;
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104 | #else
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105 | RTC.RCR5 = RCR5_VAL_RTCX3;
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106 | RTC.RFRH = RFRH_VAL_4000;
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107 | RTC.RFRL = RFRL_VAL_4000;
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108 | #endif
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109 | // Dummy read
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110 | dummy_read = RTC.RCR2;
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111 | dummy_read = RTC.RCR2;
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112 |
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113 | RTC.RCR2 = RCR2_VAL_START; // SRART = 1
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114 |
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115 | // Dummy read
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116 | dummy_read = RTC.RCR2;
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117 | dummy_read = RTC.RCR2;
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118 |
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119 | (void)dummy_read;
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120 |
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121 | }
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122 |
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123 |
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124 | /*
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125 | * Release the RTC based on a time structure.
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126 | * @note This function does not stop the RTC from counting
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127 | * [in]
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128 | * None.
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129 | * [out]
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130 | * None.
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131 | */
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132 | void rtc_free(void)
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133 | {
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134 | }
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135 |
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136 |
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137 | /*
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138 | * Check the RTC has been enabled.
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139 | * Clock Control Register RTC.RCR1(bit3): 0 = Disabled, 1 = Enabled.
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140 | * [in]
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141 | * None.
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142 | * [out]
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143 | * 0:Disabled, 1:Enabled.
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144 | */
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145 | int rtc_isenabled(void)
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146 | {
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147 | int ret_val = 0;
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148 |
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149 | if ((RTC.RCR1 & RCR1_VAL_ON) != 0) { // RTC ON ?
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150 | ret_val = 1;
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151 | }
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152 |
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153 | return ret_val;
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154 | }
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155 |
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156 |
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157 | /*
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158 | * RTC read function.
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159 | * [in]
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160 | * None.
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161 | * [out]
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162 | * UNIX timestamp value.
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163 | */
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164 | time_t rtc_read(void)
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165 | {
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166 |
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167 | struct tm timeinfo;
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168 | int err = 0;
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169 | uint8_t tmp_regdata;
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170 | time_t t;
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171 |
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172 | if (rtc_isenabled() != 0) {
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173 | RTC.RCR1 &= ~0x10u; // CIE = 0
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174 | do {
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175 | // before reading process
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176 | tmp_regdata = RTC.RCR1;
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177 | tmp_regdata &= ~0x80u; // CF = 0
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178 | tmp_regdata |= 0x01u; // AF = 1
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179 | RTC.RCR1 = tmp_regdata;
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180 |
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181 | // Read RTC register
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182 | err = rtc_dec8_to_hex(RTC.RSECCNT , 0 , &timeinfo.tm_sec);
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183 | err += rtc_dec8_to_hex(RTC.RMINCNT , 0 , &timeinfo.tm_min);
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184 | err += rtc_dec8_to_hex(RTC.RHRCNT , 0 , &timeinfo.tm_hour);
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185 | err += rtc_dec8_to_hex(RTC.RDAYCNT , 0 , &timeinfo.tm_mday);
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186 | err += rtc_dec8_to_hex(RTC.RMONCNT , 1 , &timeinfo.tm_mon);
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187 | err += rtc_dec16_to_hex(RTC.RYRCNT , 1900 , &timeinfo.tm_year);
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188 | } while ((RTC.RCR1 & 0x80u) != 0);
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189 | } else {
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190 | err = 1;
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191 | }
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192 |
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193 | if (err == 0) {
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194 | // Convert to timestamp
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195 | if (_rtc_maketime(&timeinfo, &t, RTC_FULL_LEAP_YEAR_SUPPORT) == false) {
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196 | return TIME_ERROR_VAL;
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197 | }
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198 | } else {
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199 | // Error
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200 | t = TIME_ERROR_VAL;
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201 | }
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202 |
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203 | return t;
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204 | }
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205 |
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206 | /*
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207 | * Dec(8bit) to Hex function for RTC.
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208 | * [in]
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209 | * dec_val:Decimal value (from 0x00 to 0x99).
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210 | * offset:Subtract offset from dec_val.
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211 | * hex_val:Pointer of output hexadecimal value.
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212 | * [out]
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213 | * 0:Success
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214 | * 1:Error
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215 | */
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216 | static int rtc_dec8_to_hex(uint8_t dec_val, uint8_t offset, int *hex_val)
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217 | {
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218 | int err = 0;
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219 | uint8_t ret_val;
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220 |
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221 | if (hex_val != NULL) {
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222 | if (((dec_val & MASK_04_07_POS) >= (0x0A << SHIFT_1_HBYTE)) ||
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223 | ((dec_val & MASK_00_03_POS) >= 0x0A)) {
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224 | err = 1;
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225 | } else {
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226 | ret_val = ((dec_val & MASK_04_07_POS) >> SHIFT_1_HBYTE) * 10 +
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227 | (dec_val & MASK_00_03_POS);
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228 | if (ret_val < offset) {
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229 | err = 1;
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230 | } else {
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231 | *hex_val = ret_val - offset;
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232 | }
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233 | }
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234 | } else {
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235 | err = 1;
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236 | }
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237 |
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238 | return err;
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239 | }
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240 |
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241 | /*
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242 | * Dec(16bit) to Hex function for RTC
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243 | * [in]
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244 | * dec_val:Decimal value (from 0x0000 to 0x9999).
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245 | * offset:Subtract offset from dec_val.
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246 | * hex_val:Pointer of output hexadecimal value.
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247 | * [out]
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248 | * 0:Success
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249 | * 1:Error
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250 | */
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251 | static int rtc_dec16_to_hex(uint16_t dec_val, uint16_t offset, int *hex_val)
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252 | {
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253 | int err = 0;
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254 | uint16_t ret_val;
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255 |
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256 | if (hex_val != NULL) {
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257 | if (((dec_val & MASK_12_15_POS) >= (0x0A << SHIFT_3_HBYTE)) ||
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258 | ((dec_val & MASK_08_11_POS) >= (0x0A << SHIFT_2_HBYTE)) ||
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259 | ((dec_val & MASK_04_07_POS) >= (0x0A << SHIFT_1_HBYTE)) ||
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260 | ((dec_val & MASK_00_03_POS) >= 0x0A)) {
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261 | err = 1;
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262 | *hex_val = 0;
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263 | } else {
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264 | ret_val = (((dec_val & MASK_12_15_POS)) >> SHIFT_3_HBYTE) * 1000 +
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265 | (((dec_val & MASK_08_11_POS)) >> SHIFT_2_HBYTE) * 100 +
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266 | (((dec_val & MASK_04_07_POS)) >> SHIFT_1_HBYTE) * 10 +
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267 | (dec_val & MASK_00_03_POS);
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268 | if (ret_val < offset) {
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269 | err = 1;
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270 | } else {
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271 | *hex_val = ret_val - offset;
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272 | }
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273 | }
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274 | } else {
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275 | err = 1;
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276 | }
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277 | return err;
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278 | }
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279 |
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280 | /*
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281 | * RTC write function
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282 | * [in]
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283 | * t:UNIX timestamp value
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284 | * [out]
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285 | * None.
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286 | */
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287 | void rtc_write(time_t t)
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288 | {
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289 |
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290 | struct tm timeinfo;
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291 | if (_rtc_localtime(t, &timeinfo, RTC_FULL_LEAP_YEAR_SUPPORT) == false) {
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292 | return;
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293 | }
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294 |
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295 | volatile uint16_t dummy_read;
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296 |
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297 | if (rtc_isenabled() != 0) {
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298 | RTC.RCR2 = RCR2_VAL_ALLSTOP;
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299 | dummy_read = (uint16_t)RTC.RCR2;
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300 | dummy_read = (uint16_t)RTC.RCR2;
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301 | RTC.RCR2 = RCR2_VAL_RESET; // RESET = 1
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302 | dummy_read = (uint16_t)RTC.RCR2;
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303 | dummy_read = (uint16_t)RTC.RCR2;
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304 |
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305 | RTC.RSECCNT = rtc_hex8_to_dec(timeinfo.tm_sec);
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306 | RTC.RMINCNT = rtc_hex8_to_dec(timeinfo.tm_min);
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307 | RTC.RHRCNT = rtc_hex8_to_dec(timeinfo.tm_hour);
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308 | RTC.RDAYCNT = rtc_hex8_to_dec(timeinfo.tm_mday);
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309 | RTC.RMONCNT = rtc_hex8_to_dec(timeinfo.tm_mon + 1);
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310 | RTC.RYRCNT = rtc_hex16_to_dec(timeinfo.tm_year + 1900);
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311 | dummy_read = (uint16_t)RTC.RYRCNT;
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312 | dummy_read = (uint16_t)RTC.RYRCNT;
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313 |
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314 | RTC.RCR2 = RCR2_VAL_START; // START = 1
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315 |
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316 | dummy_read = (uint16_t)RTC.RCR2;
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317 | dummy_read = (uint16_t)RTC.RCR2;
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318 | (void)dummy_read;
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319 | }
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320 | }
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321 |
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322 | /*
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323 | * HEX to Dec(8bit) function for RTC.
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324 | * [in]
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325 | * hex_val:Hexadecimal value.
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326 | * [out]
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327 | * decimal value:From 0x00 to 0x99.
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328 | */
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329 | static uint8_t rtc_hex8_to_dec(uint8_t hex_val)
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330 | {
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331 | uint32_t calc_data;
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332 |
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333 | calc_data = hex_val / 10 * 0x10;
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334 | calc_data += hex_val % 10;
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335 |
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336 | if (calc_data > 0x99) {
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337 | calc_data = 0;
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338 | }
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339 |
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340 | return (uint8_t)calc_data;
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341 | }
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342 |
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343 | /*
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344 | * HEX to Dec(16bit) function for RTC.
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345 | * [in]
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346 | * hex_val:Hexadecimal value.
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347 | * [out]
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348 | * decimal value:From 0x0000 to 0x9999.
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349 | */
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350 | static uint16_t rtc_hex16_to_dec(uint16_t hex_val)
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351 | {
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352 | uint32_t calc_data;
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353 | calc_data = hex_val / 1000 * 0x1000;
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354 | calc_data += ((hex_val / 100) % 10) * 0x100;
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355 | calc_data += ((hex_val / 10) % 10) * 0x10;
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356 | calc_data += hex_val % 10;
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357 |
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358 | if (calc_data > 0x9999) {
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359 | calc_data = 0;
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360 | }
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361 | return (uint16_t)calc_data;
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362 |
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363 | }
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364 |
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365 | #endif /* DEVICE_RTC */
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