1 | /* mbed Microcontroller Library
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2 | * Copyright (c) 2006-2013 ARM Limited
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3 | *
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4 | * Licensed under the Apache License, Version 2.0 (the "License");
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5 | * you may not use this file except in compliance with the License.
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6 | * You may obtain a copy of the License at
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7 | *
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8 | * http://www.apache.org/licenses/LICENSE-2.0
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9 | *
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10 | * Unless required by applicable law or agreed to in writing, software
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11 | * distributed under the License is distributed on an "AS IS" BASIS,
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12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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13 | * See the License for the specific language governing permissions and
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14 | * limitations under the License.
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15 | */
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16 | #include <stddef.h>
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17 |
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18 | #include "gpio_irq_api.h"
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19 | #include "iodefine.h"
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20 | #include "PeripheralPins.h"
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21 | #include "cmsis.h"
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22 | #include "gpio_addrdefine.h"
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23 |
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24 | #define CHANNEL_NUM 8
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25 |
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26 | static void gpio_irq0(void);
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27 | static void gpio_irq1(void);
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28 | static void gpio_irq2(void);
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29 | static void gpio_irq3(void);
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30 | static void gpio_irq4(void);
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31 | static void gpio_irq5(void);
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32 | static void gpio_irq6(void);
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33 | static void gpio_irq7(void);
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34 |
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35 | static gpio_irq_t *channel_obj[CHANNEL_NUM] = {NULL};
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36 | static gpio_irq_handler irq_handler;
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37 | static const int nIRQn_h = 32;
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38 | extern PinName gpio_multi_guard;
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39 |
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40 | static const IRQHandler irq_tbl[CHANNEL_NUM] = {
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41 | &gpio_irq0,
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42 | &gpio_irq1,
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43 | &gpio_irq2,
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44 | &gpio_irq3,
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45 | &gpio_irq4,
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46 | &gpio_irq5,
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47 | &gpio_irq6,
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48 | &gpio_irq7,
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49 | };
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50 |
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51 | static void handle_interrupt_in(int irq_num) {
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52 | uint16_t irqs;
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53 | uint16_t edge_req;
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54 | gpio_irq_t *obj;
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55 | gpio_irq_event irq_event;
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56 |
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57 | irqs = INTCIRQRR;
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58 | if (irqs & (1 << irq_num)) {
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59 | obj = channel_obj[irq_num];
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60 | if (obj != NULL) {
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61 | edge_req = ((INTCICR1 >> (obj->ch * 2)) & 3);
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62 | if (edge_req == 1) {
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63 | irq_event = IRQ_FALL;
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64 | } else if (edge_req == 2) {
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65 | irq_event = IRQ_RISE;
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66 | } else {
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67 | uint32_t mask = (1 << (obj->pin & 0x0F));
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68 | __I uint32_t *reg_in = (volatile uint32_t *) PPR((int)PINGROUP(obj->pin));
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69 |
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70 | if ((*reg_in & mask) == 0) {
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71 | irq_event = IRQ_FALL;
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72 | } else {
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73 | irq_event = IRQ_RISE;
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74 | }
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75 | }
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76 | irq_handler(obj->port, irq_event);
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77 | }
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78 | INTCIRQRR &= ~(1 << irq_num);
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79 | }
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80 | }
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81 |
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82 | static void gpio_irq0(void) {
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83 | handle_interrupt_in(0);
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84 | }
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85 |
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86 | static void gpio_irq1(void) {
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87 | handle_interrupt_in(1);
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88 | }
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89 |
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90 | static void gpio_irq2(void) {
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91 | handle_interrupt_in(2);
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92 | }
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93 |
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94 | static void gpio_irq3(void) {
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95 | handle_interrupt_in(3);
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96 | }
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97 |
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98 | static void gpio_irq4(void) {
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99 | handle_interrupt_in(4);
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100 | }
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101 |
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102 | static void gpio_irq5(void) {
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103 | handle_interrupt_in(5);
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104 | }
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105 |
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106 | static void gpio_irq6(void) {
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107 | handle_interrupt_in(6);
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108 | }
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109 |
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110 | static void gpio_irq7(void) {
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111 | handle_interrupt_in(7);
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112 | }
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113 |
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114 | int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id) {
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115 | int shift;
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116 | if (pin == NC) return -1;
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117 |
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118 | obj->ch = pinmap_peripheral(pin, PinMap_IRQ);
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119 | obj->pin = (int)pin ;
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120 | obj->port = (int)id ;
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121 |
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122 | shift = obj->ch*2;
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123 | channel_obj[obj->ch] = obj;
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124 | irq_handler = handler;
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125 |
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126 | pinmap_pinout(pin, PinMap_IRQ);
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127 | gpio_multi_guard = pin; /* Set multi guard */
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128 |
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129 | // INTC settings
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130 | InterruptHandlerRegister((IRQn_Type)(nIRQn_h+obj->ch), (void (*)(uint32_t))irq_tbl[obj->ch]);
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131 | INTCICR1 &= ~(0x3 << shift);
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132 | GIC_SetPriority((IRQn_Type)(nIRQn_h+obj->ch), 5);
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133 | GIC_SetConfiguration((IRQn_Type)(nIRQn_h + obj->ch), 1);
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134 | obj->int_enable = 1;
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135 | __enable_irq();
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136 |
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137 | return 0;
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138 | }
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139 |
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140 | void gpio_irq_free(gpio_irq_t *obj) {
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141 | channel_obj[obj->ch] = NULL;
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142 | }
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143 |
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144 | void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable) {
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145 | int shift = obj->ch*2;
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146 | uint16_t val = event == IRQ_RISE ? 2 :
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147 | event == IRQ_FALL ? 1 : 0;
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148 | uint16_t work_icr_val;
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149 |
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150 | /* check edge interrupt setting */
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151 | work_icr_val = INTCICR1;
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152 | if (enable == 1) {
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153 | /* Set interrupt serect */
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154 | work_icr_val |= (val << shift);
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155 | } else {
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156 | /* Clear interrupt serect */
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157 | work_icr_val &= ~(val << shift);
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158 | }
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159 |
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160 | if ((work_icr_val & (3 << shift)) == 0) {
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161 | /* No edge interrupt setting */
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162 | GIC_DisableIRQ((IRQn_Type)(nIRQn_h+obj->ch));
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163 | /* Clear Interrupt flags */
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164 | INTCIRQRR &= ~(1 << obj->ch);
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165 | INTCICR1 = work_icr_val;
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166 | } else if (obj->int_enable == 1) {
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167 | INTCICR1 = work_icr_val;
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168 | GIC_EnableIRQ((IRQn_Type)(nIRQn_h + obj->ch));
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169 | } else {
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170 | INTCICR1 = work_icr_val;
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171 | }
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172 | }
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173 |
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174 | void gpio_irq_enable(gpio_irq_t *obj) {
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175 | int shift = obj->ch*2;
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176 | uint16_t work_icr_val = INTCICR1;
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177 |
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178 | /* check edge interrupt setting */
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179 | if ((work_icr_val & (3 << shift)) != 0) {
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180 | GIC_EnableIRQ((IRQn_Type)(nIRQn_h + obj->ch));
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181 | }
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182 | obj->int_enable = 1;
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183 | }
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184 |
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185 | void gpio_irq_disable(gpio_irq_t *obj) {
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186 | GIC_DisableIRQ((IRQn_Type)(nIRQn_h + obj->ch));
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187 | obj->int_enable = 0;
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188 | }
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189 |
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