source: asp3_tinet_ecnl_arm/trunk/asp3_dcre/mbed/targets/TARGET_RENESAS/TARGET_RZA1XX/TARGET_RZ_A1H/device/inc/iodefines/lvds_iodefine.h@ 374

Last change on this file since 374 was 374, checked in by coas-nagasima, 5 years ago

mbed関連を更新
シリアルドライバをmbedのHALを使うよう変更
ファイルディスクリプタの処理を更新

  • Property svn:eol-style set to native
  • Property svn:mime-type set to text/x-chdr;charset=UTF-8
File size: 3.0 KB
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1/*******************************************************************************
2* DISCLAIMER
3* This software is supplied by Renesas Electronics Corporation and is only
4* intended for use with Renesas products. No other uses are authorized. This
5* software is owned by Renesas Electronics Corporation and is protected under
6* all applicable laws, including copyright laws.
7* THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
8* THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
9* LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
10* AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
11* TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
12* ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
13* FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
14* ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
15* BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
16* Renesas reserves the right, without notice, to make changes to this software
17* and to discontinue the availability of this software. By using this software,
18* you agree to the additional terms and conditions found by accessing the
19* following link:
20* http://www.renesas.com/disclaimer*
21* Copyright (C) 2013-2015 Renesas Electronics Corporation. All rights reserved.
22*******************************************************************************/
23/*******************************************************************************
24* File Name : lvds_iodefine.h
25* $Rev: $
26* $Date:: $
27* Description : Definition of I/O Register for RZ/A1H,M (V2.00h)
28******************************************************************************/
29#ifndef LVDS_IODEFINE_H
30#define LVDS_IODEFINE_H
31/* ->QAC 0639 : Over 127 members (C90) */
32/* ->QAC 0857 : Over 1024 #define (C90) */
33/* ->MISRA 18.4 : Pack unpack union */ /* ->SEC M1.6.2 */
34/* ->SEC M1.10.1 : Not magic number */
35
36#define LVDS (*(struct st_lvds *)0xFCFF7A30uL) /* LVDS */
37
38
39#define LVDSLVDS_UPDATE (LVDS.LVDS_UPDATE)
40#define LVDSLVDSFCL (LVDS.LVDSFCL)
41#define LVDSLCLKSELR (LVDS.LCLKSELR)
42#define LVDSLPLLSETR (LVDS.LPLLSETR)
43#define LVDSLPHYACC (LVDS.LPHYACC)
44
45
46typedef struct st_lvds
47{
48 /* LVDS */
49 volatile uint32_t LVDS_UPDATE; /* LVDS_UPDATE */
50 volatile uint32_t LVDSFCL; /* LVDSFCL */
51 volatile uint8_t dummy608[24]; /* */
52 volatile uint32_t LCLKSELR; /* LCLKSELR */
53 volatile uint32_t LPLLSETR; /* LPLLSETR */
54 volatile uint8_t dummy609[4]; /* */
55 volatile uint32_t LPHYACC; /* LPHYACC */
56} r_io_lvds_t;
57
58
59/* <-SEC M1.10.1 */
60/* <-MISRA 18.4 */ /* <-SEC M1.6.2 */
61/* <-QAC 0857 */
62/* <-QAC 0639 */
63#endif
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