[26] | 1 | /*
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| 2 | * TOPPERS/JSP Kernel
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| 3 | * Toyohashi Open Platform for Embedded Real-Time Systems/
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| 4 | * Just Standard Profile Kernel
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| 5 | *
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| 6 | * Copyright (C) 2006-2010 by Witz Corporation, JAPAN
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| 7 | *
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| 8 | * The above copyright holders grant permission gratis to use,
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| 9 | * duplicate, modify, or redistribute (hereafter called use) this
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| 10 | * software (including the one made by modifying this software),
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| 11 | * provided that the following four conditions (1) through (4) are
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| 12 | * satisfied.
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| 13 | *
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| 14 | * (1) When this software is used in the form of source code, the above
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| 15 | * copyright notice, this use conditions, and the disclaimer shown
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| 16 | * below must be retained in the source code without modification.
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| 17 | *
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| 18 | * (2) When this software is redistributed in the forms usable for the
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| 19 | * development of other software, such as in library form, the above
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| 20 | * copyright notice, this use conditions, and the disclaimer shown
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| 21 | * below must be shown without modification in the document provided
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| 22 | * with the redistributed software, such as the user manual.
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| 23 | *
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| 24 | * (3) When this software is redistributed in the forms unusable for the
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| 25 | * development of other software, such as the case when the software
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| 26 | * is embedded in a piece of equipment, either of the following two
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| 27 | * conditions must be satisfied:
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| 28 | *
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| 29 | * (a) The above copyright notice, this use conditions, and the
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| 30 | * disclaimer shown below must be shown without modification in
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| 31 | * the document provided with the redistributed software, such as
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| 32 | * the user manual.
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| 33 | *
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| 34 | * (b) How the software is to be redistributed must be reported to the
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| 35 | * TOPPERS Project according to the procedure described
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| 36 | * separately.
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| 37 | *
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| 38 | * (4) The above copyright holders and the TOPPERS Project are exempt
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| 39 | * from responsibility for any type of damage directly or indirectly
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| 40 | * caused from the use of this software and are indemnified by any
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| 41 | * users or end users of this software from any and all causes of
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| 42 | * action whatsoever.
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| 43 | *
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| 44 | * THIS SOFTWARE IS PROVIDED "AS IS." THE ABOVE COPYRIGHT HOLDERS AND
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| 45 | * THE TOPPERS PROJECT DISCLAIM ANY EXPRESS OR IMPLIED WARRANTIES,
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| 46 | * INCLUDING, BUT NOT LIMITED TO, ITS APPLICABILITY TO A PARTICULAR
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| 47 | * PURPOSE. IN NO EVENT SHALL THE ABOVE COPYRIGHT HOLDERS AND THE
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| 48 | * TOPPERS PROJECT BE LIABLE FOR ANY TYPE OF DAMAGE DIRECTLY OR
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| 49 | * INDIRECTLY CAUSED FROM THE USE OF THIS SOFTWARE.
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| 50 | *
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| 51 | * ä¸è¨èä½æ¨©è
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| 52 | ã¯ï¼ä»¥ä¸ã® (1)ã(4) ã®æ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§
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| 53 | * ã¢ï¼æ¬ã½ããã¦ã§ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ã使ç¨ã»è¤è£½ã»æ¹å¤ã»
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| 54 | * åé
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| 55 | å¸ï¼ä»¥ä¸ï¼å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
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| 56 | * (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½æ¨©
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| 57 | * 表示ï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼ã¹
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| 58 | * ã³ã¼ãä¸ã«å«ã¾ãã¦ãããã¨ï¼
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| 59 | * (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿ç¨
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| 60 | * ã§ããå½¢ã§åé
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| 61 | å¸ããå ´åã«ã¯ï¼åé
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| 62 | å¸ã«ä¼´ãããã¥ã¡ã³ãï¼å©ç¨è
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| 63 | ã
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| 64 | * ãã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿
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| 65 | * 証è¦å®ãæ²è¼ãããã¨ï¼
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| 66 | * (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿ç¨
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| 67 | * ã§ããªãå½¢ã§åé
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| 68 | å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºãããã¨ï¼
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| 69 | * (a) åé
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| 70 | å¸ã«ä¼´ãããã¥ã¡ã³ãï¼å©ç¨è
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| 71 | ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½
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| 72 | * 権表示ï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
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| 73 | * (b) åé
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| 74 | å¸ã®å½¢æ
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| 75 | ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSããã¸ã§ã¯ãã«å ±
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| 76 | * åãããã¨ï¼
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| 77 | * (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ害
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| 78 | * ãããï¼ä¸è¨èä½æ¨©è
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| 79 | ããã³TOPPERSããã¸ã§ã¯ããå
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| 80 | 責ãããã¨ï¼ã¾ãï¼
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| 81 | * æ¬ã½ããã¦ã§ã¢ã®ã¦ã¼ã¶ã¾ãã¯ã¨ã³ãã¦ã¼ã¶ããã®ãããªãçç±ã«åºã¥
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| 82 | * ãè«æ±ãããï¼ä¸è¨èä½æ¨©è
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| 83 | ããã³TOPPERSããã¸ã§ã¯ããå
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| 84 | 責ãããã¨ï¼
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| 85 | *
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| 86 | * æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
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| 87 | ãã
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| 88 | * ã³TOPPERSããã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ç¹å®ã®ä½¿ç¨ç®çã«å¯¾ã
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| 89 | * ãé©åæ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®å©ç¨
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| 90 | * ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ害ã«é¢ãã¦ãï¼ãã®è²¬ä»»ãè²
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| 91 | * ããªãï¼
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| 92 | *
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| 93 | * @(#) $Id: uart.c,v 1.1 2006/04/10 08:19:25 honda Exp $
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| 94 | */
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| 95 |
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| 96 | /*
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| 97 | * éåæéä¿¡ (UART)ã·ãªã¢ã«ãã£ã³ãã«ããã¤ã¹ï¼SIOï¼ãã©ã¤ã
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| 98 | * ï¼Zup-F16æ¡å¼µãã¼ãç¨ï¼
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| 99 | */
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| 100 | #include <s_services.h>
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| 101 | #include <sil.h>
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| 102 | #include <tmp91cy22.h>
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| 103 | #include <uart.h>
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| 104 |
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| 105 | /*
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| 106 | * ã·ãªã¢ã«I/Oå¶å¾¡ã¬ã¸ã¹ã¿ã¸ã®ãªãã»ããå®ç¾©
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| 107 | */
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| 108 | #define TOFFSET_SC0BUF 0x0000
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| 109 | #define TOFFSET_SC0CR 0x0001
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| 110 | #define TOFFSET_SC0MOD0 0x0002
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| 111 | #define TOFFSET_BR0CR 0x0003
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| 112 | #define TOFFSET_BR0ADD 0x0004
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| 113 | #define TOFFSET_SC0MOD1 0x0005
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| 114 |
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| 115 | /*
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| 116 | * ã·ãªã¢ã«I/Oãã¼ãç¶æ
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| 117 | ãã©ã°ã®å®ç¾©
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| 118 | */
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| 119 | #define TBIT_STS_DEF 0x00
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| 120 | #define TBIT_TXB_EMPTY 0x01
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| 121 | #define TBIT_ENE_TXCBR 0x02
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| 122 | #define TBIT_ENE_RXCBR 0x04
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| 123 | #define TBIT_LOG_PORT 0x80
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| 124 |
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| 125 | /*
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| 126 | * ã·ãªã¢ã«I/Oãã¼ãåæåãããã¯
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| 127 | *
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| 128 | * ID = 1 ãuart1ï¼ID = 2 ãuart0ã«å¯¾å¿ããã¦ããï¼
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| 129 | */
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| 130 | static const SIOPINIB siopinib_table[TNUM_PORT] = {
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| 131 | { TADR_SFR_SC1BUF, TADR_SFR_INTES1, 0x08, (TBIT_SIOSMU8 | TBIT_SIORXE | TBIT_SIOSCBRG),
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| 132 | 0x00, BRCR_19200, BRADD_19200, TBIT_RX1_CLR } /* ID1ç¨ UART1 19200bps */
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| 133 | /* { TADR_SFR_SC1BUF, TADR_SFR_INTES1, 0x08, (TBIT_SIOSMU8 | TBIT_SIORXE | TBIT_SIOSCBRG),
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| 134 | 0x00, BRCR_38400, BRADD_38400, TBIT_RX1_CLR }*/ /* ID1ç¨ UART1 38400bps */
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| 135 | /* { TADR_SFR_SC0BUF, TADR_SFR_INTES0, 0x01, (TBIT_SIOSMU8 | TBIT_SIORXE | TBIT_SIOSCBRG),
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| 136 | 0x00, BRCR_19200, BRADD_19200, TBIT_RX0_CLR }*/ /* ID2ç¨ UART0 19200bps */
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| 137 | };
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| 138 |
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| 139 | /*
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| 140 | * ã·ãªã¢ã«I/Oãã¼ã管çãããã¯ã®ã¨ãªã¢
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| 141 | */
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| 142 | static SIOPCB siopcb_table[TNUM_PORT];
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| 143 |
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| 144 | /*
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| 145 | * ã·ãªã¢ã«I/Oãã¼ãIDãã管çãããã¯ãåãåºãããã®ãã¯ã
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| 146 | */
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| 147 | #define INDEX_SIOP(siopid) ((UINT)((siopid) - 1))
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| 148 | #define get_siopcb(siopid) (&(siopcb_table[INDEX_SIOP(siopid)]))
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| 149 |
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| 150 | /*
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| 151 | * SIOãã©ã¤ãã®åæåã«ã¼ãã³
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| 152 | */
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| 153 | void
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| 154 | uart_initialize()
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| 155 | {
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| 156 | SIOPCB *siopcb;
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| 157 | UINT i;
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| 158 |
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| 159 | /*
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| 160 | * ã·ãªã¢ã«I/Oãã¼ã管çãããã¯ã®åæå
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| 161 | */
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| 162 | for (siopcb = siopcb_table, i = 0; i < TNUM_PORT; siopcb++, i++) {
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| 163 | siopcb->siopinib = &(siopinib_table[i]);
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| 164 | siopcb->sts_flag = TBIT_STS_DEF;
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| 165 | siopcb->rxb = -1;
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| 166 | }
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| 167 | }
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| 168 |
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| 169 | /*
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| 170 | * ã·ãªã¢ã«I/Oãã¼ãã®ãªã¼ãã³
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| 171 | */
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| 172 | SIOPCB *
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| 173 | uart_opn_por(ID siopid, VP_INT exinf)
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| 174 | {
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| 175 | SIOPCB *siopcb;
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| 176 | const SIOPINIB *siopinib;
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| 177 | int i;
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| 178 |
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| 179 | /* ãã¼ãIDãã管çãããã¯ãåå¾ */
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| 180 | siopcb = get_siopcb(siopid);
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| 181 | siopinib = siopcb->siopinib;
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| 182 |
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| 183 | /* 管çãããã¯ã«æ
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| 184 | å ±è¨å® */
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| 185 | siopcb->sts_flag |= TBIT_TXB_EMPTY;
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| 186 | siopcb->exinf = exinf;
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| 187 | if( siopid == LOGTASK_PORTID ){ /* ã·ã¹ãã ãã°ç¨ã®ãã¼ãã®å ´å */
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| 188 | siopcb->sts_flag |= TBIT_LOG_PORT;
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| 189 | if( log_io_busy == TRUE ){
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| 190 | /* éä¿¡ä¸ã®å ´åã¯å®äºã¾ã§å¾
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| 191 | 㤠*/
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| 192 | while( (sil_reb_mem((VP)(siopinib->hint)) & TBIT_INTC_H) == 0 );
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| 193 | }
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| 194 | log_io_busy = FALSE; /* åæåãªã®ã§æ示çã«è¡ã£ã¦ãã */
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| 195 | }
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| 196 |
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| 197 | /* åä¿¡åæ¢ */
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| 198 | sil_wrb_mem((VP)(siopinib->cntrl+TOFFSET_SC0MOD0), 0x00 );
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| 199 | /* ãã¼ãè¨å®(TXDã¨ãã¦ä½¿ç¨) */
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| 200 | sil_wrb_mem((VP)(TADR_SFR_P9FC), siopinib->pcrfc_def );
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| 201 | sil_wrb_mem((VP)(TADR_SFR_P9CR), siopinib->pcrfc_def );
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| 202 |
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| 203 | /* åä½ã¢ã¼ãè¨å® */
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| 204 | sil_wrb_mem((VP)(siopinib->cntrl+TOFFSET_SC0MOD0), siopinib->scmod0_def );
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| 205 | sil_reb_mem((VP)(siopinib->cntrl+TOFFSET_SC0CR)); /* èªåºãã«ããã¨ã©ã¼ãã©ã°ã¯ãªã¢ */
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| 206 | sil_wrb_mem((VP)(siopinib->cntrl+TOFFSET_SC0CR), siopinib->sccr_def );
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| 207 | sil_wrb_mem((VP)(siopinib->cntrl+TOFFSET_BR0CR), siopinib->brcr_def);
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| 208 | sil_wrb_mem((VP)(siopinib->cntrl+TOFFSET_BR0ADD), siopinib->bradd_def);
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| 209 | sil_wrb_mem((VP)(siopinib->cntrl+TOFFSET_SC0MOD1), TBIT_SIOI2S);
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| 210 |
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| 211 | /* ã·ãªã¢ã«å²è¾¼ã¿ã®è¨å®ããã³è¦æ±ãã©ã°ã¯ãªã¢ */
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| 212 | sil_wrb_mem((VP)TADR_SFR_INTCLR, (siopinib->int_clr) ); /* åä¿¡è¦æ±ã¯ãªã¢ */
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| 213 | sil_wrb_mem((VP)TADR_SFR_INTCLR, (VB)(siopinib->int_clr + 1) ); /* éä¿¡è¦æ±ã¯ãªã¢ */
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| 214 | sil_wrb_mem((VP)(siopinib->hint), (VB)((INT_LEVEL_UART << 4) | INT_LEVEL_UART) );
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| 215 |
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| 216 | /*
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| 217 | * ããã¼ãã¼ã¿åä¿¡
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| 218 | */
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| 219 | sil_reb_mem((VP)(siopinib->cntrl+TOFFSET_SC0BUF));
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| 220 | sil_reb_mem((VP)(siopinib->cntrl+TOFFSET_SC0BUF));
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| 221 |
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| 222 | return(siopcb);
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| 223 | }
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| 224 |
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| 225 | /*
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| 226 | * ã·ãªã¢ã«I/Oãã¼ãã®ã¯ãã¼ãº
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| 227 | */
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| 228 | void
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| 229 | uart_cls_por(SIOPCB *siopcb)
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| 230 | {
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| 231 | const SIOPINIB *siopinib;
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| 232 |
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| 233 | siopinib = siopcb->siopinib;
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| 234 |
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| 235 | /* åä¿¡åæ¢ */
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| 236 | sil_wrb_mem((VP)(siopinib->cntrl+TOFFSET_SC0MOD0), 0x00 );
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| 237 |
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| 238 | /* ã·ã¹ãã ãã°ç¨ãã¼ãã®å¦ç */
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| 239 | if( (siopcb->sts_flag & TBIT_LOG_PORT) == TBIT_LOG_PORT ){
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| 240 | if( log_io_busy == TRUE ){
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| 241 | /* éä¿¡ä¸ã®å ´åã¯å®äºã¾ã§å¾
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| 242 | 㤠*/
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| 243 | while( (sil_reb_mem((VP)(TADR_SFR_INTES0)) & TBIT_INTC_H) == 0 );
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| 244 | }
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| 245 | log_io_busy = FALSE;
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| 246 | }
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| 247 |
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| 248 | /* ã·ãªã¢ã«å²è¾¼ã¿ã®ç¦æ¢ããã³è¦æ±ãã©ã°ã¯ãªã¢ */
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| 249 | sil_wrb_mem((VP)(siopinib->hint), 0x00 );
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| 250 | sil_wrb_mem((VP)TADR_SFR_INTCLR, (siopinib->int_clr) ); /* åä¿¡è¦æ±ã¯ãªã¢ */
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| 251 | sil_wrb_mem((VP)TADR_SFR_INTCLR, (VB)(siopinib->int_clr + 1) ); /* éä¿¡è¦æ±ã¯ãªã¢ */
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| 252 | /* ãã¼ãè¨å®(ãã¼ãã¨ãã¦ä½¿ç¨) */
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| 253 | sil_wrb_mem((VP)(TADR_SFR_P9FC), 0x00 );
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| 254 | sil_wrb_mem((VP)(TADR_SFR_P9CR), 0x00 );
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| 255 |
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| 256 | siopcb->sts_flag = TBIT_STS_DEF;
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| 257 | }
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| 258 |
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| 259 | /*
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| 260 | * ã·ãªã¢ã«I/Oãã¼ãã¸ã®æåéä¿¡
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| 261 | */
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| 262 | BOOL
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| 263 | uart_snd_chr(SIOPCB *siopcb, char c)
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| 264 | {
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| 265 | if( (siopcb->sts_flag & TBIT_TXB_EMPTY) == TBIT_TXB_EMPTY ){
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| 266 | siopcb->sts_flag &= (UB)~TBIT_TXB_EMPTY;
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| 267 | sil_wrb_mem((VP)(siopcb->siopinib->cntrl+TOFFSET_SC0BUF), c);
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| 268 |
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| 269 | /* ã·ã¹ãã ãã°ç¨ãã¼ãã®å¦ç */
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| 270 | if( (siopcb->sts_flag & TBIT_LOG_PORT) == TBIT_LOG_PORT ){
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| 271 | log_io_busy = TRUE; /* éä¿¡ä¸ */
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| 272 | }
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| 273 | return(TRUE);
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| 274 | }
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| 275 | return(FALSE);
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| 276 | }
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| 277 |
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| 278 | /*
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| 279 | * ã·ãªã¢ã«I/Oãã¼ãããã®æååä¿¡
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| 280 | */
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| 281 | INT
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| 282 | uart_rcv_chr(SIOPCB *siopcb)
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| 283 | {
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| 284 | return(siopcb->rxb);
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| 285 | }
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| 286 |
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| 287 | /*
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| 288 | * ã·ãªã¢ã«I/Oãã¼ãããã®ã³ã¼ã«ããã¯ã®è¨±å¯
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| 289 | */
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| 290 | void
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| 291 | uart_ena_cbr(SIOPCB *siopcb, UINT cbrtn)
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| 292 | {
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| 293 | switch (cbrtn) {
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| 294 | case UART_ERDY_SND:
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| 295 | siopcb->sts_flag |= TBIT_ENE_TXCBR;
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| 296 | break;
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| 297 | case UART_ERDY_RCV:
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| 298 | siopcb->sts_flag |= TBIT_ENE_RXCBR;
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| 299 | break;
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| 300 | default:
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| 301 | break;
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| 302 | }
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| 303 | }
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| 304 |
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| 305 | /*
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| 306 | * ã·ãªã¢ã«I/Oãã¼ãããã®ã³ã¼ã«ããã¯ã®ç¦æ¢
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| 307 | */
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| 308 | void
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| 309 | uart_dis_cbr(SIOPCB *siopcb, UINT cbrtn)
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| 310 | {
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| 311 | switch (cbrtn) {
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| 312 | case UART_ERDY_SND:
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| 313 | siopcb->sts_flag &= (UB)~TBIT_ENE_TXCBR;
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| 314 | break;
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| 315 | case UART_ERDY_RCV:
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| 316 | siopcb->sts_flag &= (UB)~TBIT_ENE_RXCBR;
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| 317 | break;
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| 318 | default:
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| 319 | break;
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| 320 | }
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| 321 | }
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| 322 |
|
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| 323 | /*
|
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| 324 | * ãã¼ãID=1ã«æå®ããã¦ããSIOãã£ã³ãã«(uart1)ããã®åä¿¡å²è¾¼ã¿
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| 325 | */
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| 326 | void serial_in_handler1()
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| 327 | {
|
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| 328 | SIOPCB *siopcb = &siopcb_table[0];
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| 329 |
|
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| 330 | /* ã¨ã©ã¼ã®å ´åå¦çããªã */
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| 331 | if( ( sil_reb_mem((VP)(siopcb->siopinib->cntrl+TOFFSET_SC0CR)) & 0x1c ) == 0 ){
|
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| 332 |
|
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| 333 | /* ãã¼ã¿åä¿¡ */
|
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| 334 | siopcb->rxb = (INT)sil_reb_mem((VP)(siopcb->siopinib->cntrl+TOFFSET_SC0BUF));
|
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| 335 |
|
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| 336 | /* ã³ã¼ã«ããã¯ã許å¯ããã¦ããå ´å */
|
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| 337 | if( (siopcb->sts_flag & TBIT_ENE_RXCBR) == TBIT_ENE_RXCBR ){
|
---|
| 338 | /*
|
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| 339 | * åä¿¡éç¥ã³ã¼ã«ããã¯ã«ã¼ãã³ãå¼ã³åºãï¼
|
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| 340 | */
|
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| 341 | uart_ierdy_rcv(siopcb->exinf);
|
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| 342 | }
|
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| 343 | }
|
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| 344 | }
|
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| 345 |
|
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| 346 | /*
|
---|
| 347 | * ãã¼ãID=1ã«æå®ããã¦ããSIOãã£ã³ãã«(uart1)ããã®éä¿¡å²è¾¼ã¿
|
---|
| 348 | */
|
---|
| 349 | void serial_out_handler1()
|
---|
| 350 | {
|
---|
| 351 | SIOPCB *siopcb = &siopcb_table[0];
|
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| 352 |
|
---|
| 353 | /* ãã¼ã¿éä¿¡å®äºãã©ã°ON */
|
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| 354 | siopcb->sts_flag |= TBIT_TXB_EMPTY;
|
---|
| 355 |
|
---|
| 356 | /* ã·ã¹ãã ãã°ç¨ãã¼ãã®å¦ç */
|
---|
| 357 | if( (siopcb->sts_flag & TBIT_LOG_PORT) == TBIT_LOG_PORT ){
|
---|
| 358 | log_io_busy = FALSE; /* éä¿¡å®äº */
|
---|
| 359 | }
|
---|
| 360 |
|
---|
| 361 | /* ã³ã¼ã«ããã¯ã許å¯ããã¦ããå ´å */
|
---|
| 362 | if( (siopcb->sts_flag & TBIT_ENE_TXCBR) == TBIT_ENE_TXCBR ){
|
---|
| 363 | /*
|
---|
| 364 | * éä¿¡å¯è½ã³ã¼ã«ããã¯ã«ã¼ãã³ãå¼ã³åºãï¼
|
---|
| 365 | */
|
---|
| 366 | uart_ierdy_snd(siopcb->exinf);
|
---|
| 367 | }
|
---|
| 368 | }
|
---|
| 369 |
|
---|
| 370 | #if TNUM_PORT >= 2
|
---|
| 371 | /*
|
---|
| 372 | * ãã¼ãID=2ã«æå®ããã¦ããSIOãã£ã³ãã«(uart0)ããã®åä¿¡å²è¾¼ã¿
|
---|
| 373 | */
|
---|
| 374 | void serial_in_handler2()
|
---|
| 375 | {
|
---|
| 376 | SIOPCB *siopcb = &siopcb_table[1];
|
---|
| 377 |
|
---|
| 378 | /* ã¨ã©ã¼ã®å ´åå¦çããªã */
|
---|
| 379 | if( ( sil_reb_mem((VP)(siopcb->siopinib->cntrl+TOFFSET_SC0CR)) & 0x1c ) == 0 ){
|
---|
| 380 |
|
---|
| 381 | /* ãã¼ã¿åä¿¡ */
|
---|
| 382 | siopcb->rxb = (INT)sil_reb_mem((VP)(siopcb->siopinib->cntrl+TOFFSET_SC0BUF));
|
---|
| 383 |
|
---|
| 384 | /* ã³ã¼ã«ããã¯ã許å¯ããã¦ããå ´å */
|
---|
| 385 | if( (siopcb->sts_flag & TBIT_ENE_RXCBR) == TBIT_ENE_RXCBR ){
|
---|
| 386 | /*
|
---|
| 387 | * åä¿¡éç¥ã³ã¼ã«ããã¯ã«ã¼ãã³ãå¼ã³åºãï¼
|
---|
| 388 | */
|
---|
| 389 | uart_ierdy_rcv(siopcb->exinf);
|
---|
| 390 | }
|
---|
| 391 | }
|
---|
| 392 | }
|
---|
| 393 |
|
---|
| 394 | /*
|
---|
| 395 | * ãã¼ãID=2ã«æå®ããã¦ããSIOãã£ã³ãã«(uart0)ããã®éä¿¡å²è¾¼ã¿
|
---|
| 396 | */
|
---|
| 397 | void serial_out_handler2()
|
---|
| 398 | {
|
---|
| 399 | SIOPCB *siopcb = &siopcb_table[1];
|
---|
| 400 |
|
---|
| 401 | /* ãã¼ã¿éä¿¡å®äºãã©ã°ON */
|
---|
| 402 | siopcb->sts_flag |= TBIT_TXB_EMPTY;
|
---|
| 403 |
|
---|
| 404 | /* ã·ã¹ãã ãã°ç¨ãã¼ãã®å¦ç */
|
---|
| 405 | if( (siopcb->sts_flag & TBIT_LOG_PORT) == TBIT_LOG_PORT ){
|
---|
| 406 | log_io_busy = FALSE; /* éä¿¡å®äº */
|
---|
| 407 | }
|
---|
| 408 |
|
---|
| 409 | /* ã³ã¼ã«ããã¯ã許å¯ããã¦ããå ´å */
|
---|
| 410 | if( (siopcb->sts_flag & TBIT_ENE_TXCBR) == TBIT_ENE_TXCBR ){
|
---|
| 411 | /*
|
---|
| 412 | * éä¿¡å¯è½ã³ã¼ã«ããã¯ã«ã¼ãã³ãå¼ã³åºãï¼
|
---|
| 413 | */
|
---|
| 414 | uart_ierdy_snd(siopcb->exinf);
|
---|
| 415 | }
|
---|
| 416 | }
|
---|
| 417 |
|
---|
| 418 | #endif
|
---|
| 419 |
|
---|