1 | /*
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2 | * TOPPERS/JSP Kernel
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3 | * Toyohashi Open Platform for Embedded Real-Time Systems/
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4 | * Just Standard Profile Kernel
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5 | *
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6 | * Copyright (C) 2000,2001 by Embedded and Real-Time Systems Laboratory
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7 | * Toyohashi Univ. of Technology, JAPAN
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8 | * Copyright (C) 2001 by Industrial Technology Institute,
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9 | * Miyagi Prefectural Government, JAPAN
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10 | * Copyright (C) 2002 by Hokkaido Industrial Research Institute, JAPAN
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11 | *
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12 | * ä¸è¨è使¨©è
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13 | ã¯ï¼Free Software Foundation ã«ãã£ã¦å
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14 | ¬è¡¨ããã¦ãã
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15 | * GNU General Public License ã® Version 2 ã«è¨è¿°ããã¦ããæ¡ä»¶ãï¼ä»¥
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16 | * ä¸ã®æ¡ä»¶ã®ãããããæºããå ´åã«éãï¼æ¬ã½ããã¦ã§ã¢ï¼æ¬ã½ããã¦ã§
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17 | * ã¢ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ã使ç¨ã»è¤è£½ã»æ¹å¤ã»åé
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18 | å¸ï¼ä»¥ä¸ï¼
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19 | * å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
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20 | * (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
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21 | * 権表示ï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
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22 | * ã¹ã³ã¼ãä¸ã«å«ã¾ãã¦ãããã¨ï¼
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23 | * (2) æ¬ã½ããã¦ã§ã¢ãåå©ç¨å¯è½ãªãã¤ããªã³ã¼ãï¼ãªãã±ã¼ã¿ãã«ãªã
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24 | * ã¸ã§ã¯ããã¡ã¤ã«ãã©ã¤ãã©ãªãªã©ï¼ã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼å©ç¨
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25 | * ã«ä¼´ãããã¥ã¡ã³ãï¼å©ç¨è
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26 | ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è使¨©è¡¨ç¤ºï¼
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27 | * ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
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28 | * (3) æ¬ã½ããã¦ã§ã¢ãåå©ç¨ä¸å¯è½ãªãã¤ããªã³ã¼ãã®å½¢ã¾ãã¯æ©å¨ã«çµ
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29 | * ã¿è¾¼ãã å½¢ã§å©ç¨ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºãããã¨ï¼
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30 | * (a) å©ç¨ã«ä¼´ãããã¥ã¡ã³ãï¼å©ç¨è
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31 | ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½
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32 | * 権表示ï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
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33 | * (b) å©ç¨ã®å½¢æ
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34 | ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼ä¸è¨è使¨©è
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35 | ã«å ±åãã
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36 | * ãã¨ï¼
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37 | * (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
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38 | * 害ãããï¼ä¸è¨è使¨©è
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39 | ãå
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40 | 責ãããã¨ï¼
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41 | *
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42 | * æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨è使¨©è
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43 | ã¯ï¼
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44 | * æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ãã®é©ç¨å¯è½æ§ãå«ãã¦ï¼ãããªãä¿è¨¼ãè¡ã
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45 | * ãªãï¼ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çããã
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46 | * ããªãæå®³ã«é¢ãã¦ãï¼ãã®è²¬ä»»ãè² ããªãï¼
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47 | *
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48 | * @(#) $Id: sh7145.h,v 1.5 2005/07/06 00:45:07 honda Exp $
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49 | */
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50 |
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51 | #ifndef _SH7145_H_
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52 | #define _SH7145_H_
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53 |
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54 | #include <sil.h>
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55 |
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56 | /*
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57 | * å²è¾¼ã¿ã®ãã¯ã¿çªå·å®ç¾©
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58 | */
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59 |
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60 | #define ERI0 128 /* SCI0 */
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61 | #define RXI0 129 /* SCI0 */
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62 | #define TXI0 130 /* SCI0 */
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63 | #define ERI1 132 /* SCI1 */
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64 | #define RXI1 133 /* SCI1 */
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65 | #define TXI1 134 /* SCI1 */
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66 | #define CMI0 144 /* CMT */
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67 | #define ERI2 168 /* SCI2 */
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68 | #define RXI2 169 /* SCI2 */
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69 | #define TXI2 170 /* SCI2 */
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70 |
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71 | #ifndef _MACRO_ONLY
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72 |
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73 | /*
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74 | * SH2ã®å
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75 | é¨ã¬ã¸ã¹ã¿å®ç¾©
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76 | */
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77 | /* ã¢ã¸ã¥ã¼ã«ã¹ã¿ã³ãã¤ã¬ã¸ã¹ã¿ */
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78 | #define MSTCR1 ((VH *)0xffff861c)
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79 | #define MSTCR2 ((VH *)0xffff861e)
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80 |
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81 | #define BCR1 ((VH *)0xffff8620)
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82 | #define BCR2 ((VH *)0xffff8622)
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83 | #define WCR1 ((VH *)0xffff8624)
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84 | #define PACRH ((VH *)0xffff8388)
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85 | #define PACRL1 ((VH *)0xffff838c)
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86 | #define PACRL2 ((VH *)0xffff838e)
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87 | #define PBCR1 ((VH *)0xffff8398)
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88 | #define PBCR2 ((VH *)0xffff839a)
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89 | #define PCCR ((VH *)0xffff839c)
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90 | #define PDCRH1 ((VH *)0xffff83a8)
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91 | #define PDCRH2 ((VH *)0xffff83aa)
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92 | #define PDCRL1 ((VH *)0xffff83ac)
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93 | #define PDCRL2 ((VH *)0xffff83ae)
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94 | #define PECRL1 ((VH *)0xffff83b8)
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95 | #define PECRL2 ((VH *)0xffff83ba)
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96 | #define PAIORL ((VH *)0xffff8386)
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97 | #define PBIOR ((VH *)0xffff8394)
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98 | #define PEIORL ((VH *)0xffff83b4)
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99 | #define PEDRL ((VH *)0xffff83b0)
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100 |
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101 | /* å²ãè¾¼ã¿åªå
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102 | 度ã¬ãã«è¨å®ã¬ã¸ã¹ã¿ */
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103 | #define IPRA ((VH *)0xffff8348)
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104 | #define IPRB ((VH *)0xffff834a)
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105 | #define IPRC ((VH *)0xffff834c)
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106 | #define IPRD ((VH *)0xffff834e)
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107 | #define IPRE ((VH *)0xffff8350)
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108 | #define IPRF ((VH *)0xffff8352)
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109 | #define IPRG ((VH *)0xffff8354)
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110 | #define IPRH ((VH *)0xffff8356)
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111 | #define IPRI ((VH *)0xffff835c)
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112 | #define IPRJ ((VH *)0xffff835e)
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113 |
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114 | /*
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115 | * å²ãè¾¼ã¿ã³ã³ããã¼ã©ã®åæå
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116 | */
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117 | Inline void sh2_init_intcontorller(void)
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118 | {
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119 | sil_wrh_mem (IPRA, 0x0000);
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120 | sil_wrh_mem (IPRB, 0x0000);
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121 | sil_wrh_mem (IPRC, 0x0000);
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122 | sil_wrh_mem (IPRD, 0x0000);
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123 | sil_wrh_mem (IPRE, 0x0000);
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124 | sil_wrh_mem (IPRF, 0x0000);
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125 | sil_wrh_mem (IPRG, 0x0000);
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126 | sil_wrh_mem (IPRH, 0x0000);
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127 | sil_wrh_mem (IPRI, 0x0000);
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128 | sil_wrh_mem (IPRJ, 0x0000);
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129 | }
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130 | #endif /* _MACRO_ONLY */
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131 |
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132 | #endif /* _SH7145_H_ */
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