[363] | 1 | /*
|
---|
| 2 | * TOPPERS/JSP Kernel
|
---|
| 3 | * Toyohashi Open Platform for Embedded Real-Time Systems/
|
---|
| 4 | * Just Standard Profile Kernel
|
---|
| 5 | *
|
---|
| 6 | * Copyright (C) 2000-2004 by Embedded and Real-Time Systems Laboratory
|
---|
| 7 | * Toyohashi Univ. of Technology, JAPAN
|
---|
| 8 | * Copyright (C) 2001-2004 by Industrial Technology Institute,
|
---|
| 9 | * Miyagi Prefectural Government, JAPAN
|
---|
| 10 | *
|
---|
| 11 | * ä¸è¨èä½æ¨©è
|
---|
| 12 | ã¯ï¼ä»¥ä¸ã® (1)ã(4) ã®æ¡ä»¶ãï¼Free Software Foundation
|
---|
| 13 | * ã«ãã£ã¦å
|
---|
| 14 | ¬è¡¨ããã¦ãã GNU General Public License ã® Version 2 ã«è¨
|
---|
| 15 | * è¿°ããã¦ããæ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§ã¢ï¼æ¬ã½ããã¦ã§ã¢
|
---|
| 16 | * ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ã使ç¨ã»è¤è£½ã»æ¹å¤ã»åé
|
---|
| 17 | å¸ï¼ä»¥ä¸ï¼
|
---|
| 18 | * å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
|
---|
| 19 | * (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
|
---|
| 20 | * 権表示ï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
|
---|
| 21 | * ã¹ã³ã¼ãä¸ã«å«ã¾ãã¦ãããã¨ï¼
|
---|
| 22 | * (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
|
---|
| 23 | * ç¨ã§ããå½¢ã§åé
|
---|
| 24 | å¸ããå ´åã«ã¯ï¼åé
|
---|
| 25 | å¸ã«ä¼´ãããã¥ã¡ã³ãï¼å©ç¨
|
---|
| 26 | * è
|
---|
| 27 | ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®èä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
|
---|
| 28 | * ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
|
---|
| 29 | * (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
|
---|
| 30 | * ç¨ã§ããªãå½¢ã§åé
|
---|
| 31 | å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
|
---|
| 32 | * ã¨ï¼
|
---|
| 33 | * (a) åé
|
---|
| 34 | å¸ã«ä¼´ãããã¥ã¡ã³ãï¼å©ç¨è
|
---|
| 35 | ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
|
---|
| 36 | * ä½æ¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
|
---|
| 37 | * (b) åé
|
---|
| 38 | å¸ã®å½¢æ
|
---|
| 39 | ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSããã¸ã§ã¯ãã«
|
---|
| 40 | * å ±åãããã¨ï¼
|
---|
| 41 | * (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
|
---|
| 42 | * 害ãããï¼ä¸è¨èä½æ¨©è
|
---|
| 43 | ããã³TOPPERSããã¸ã§ã¯ããå
|
---|
| 44 | 責ãããã¨ï¼
|
---|
| 45 | *
|
---|
| 46 | * æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨èä½æ¨©è
|
---|
| 47 | ã
|
---|
| 48 | * ãã³TOPPERSããã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ãã®é©ç¨å¯è½æ§ã
|
---|
| 49 | * å«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´
|
---|
| 50 | * æ¥çã¾ãã¯éæ¥çã«çãããããªãæ害ã«é¢ãã¦ãï¼ãã®è²¬ä»»ãè² ããªãï¼
|
---|
| 51 | *
|
---|
| 52 | * @(#) $Id: mpc860t.h,v 1.2 2004/10/07 17:10:56 honda Exp $
|
---|
| 53 | */
|
---|
| 54 |
|
---|
| 55 | /*
|
---|
| 56 | * MPC860ã®ãã¼ãã¦ã§ã¢è³æºã®å®ç¾©
|
---|
| 57 | */
|
---|
| 58 |
|
---|
| 59 | #ifndef _MPC860_H_
|
---|
| 60 | #define _MPC860_H_
|
---|
| 61 |
|
---|
| 62 | /*
|
---|
| 63 | * å²è¾¼ã¿ã®æ¬æ°
|
---|
| 64 | */
|
---|
| 65 | #define TMAX_SIU_INTNO 16 /* ã·ã¹ãã ã¤ã³ã¿ã¼ãã§ã¼ã¹ã¦ãããSIU */
|
---|
| 66 | #define TMAX_CPM_INTNO 32 /* éä¿¡ããã»ããµã¢ã¸ã¥ã¼ã«CPM */
|
---|
| 67 | /* MPC860å
|
---|
| 68 | ¨ä½ */
|
---|
| 69 | #define TMAX_INTNO (TMAX_SIU_INTNO+TMAX_CPM_INTNO)
|
---|
| 70 |
|
---|
| 71 | /*
|
---|
| 72 | * å²è¾¼ã¿é¢é£ã®å®ç¾©
|
---|
| 73 | * ãå²è¾¼ã¿è¦å æ¯ã«3種é¡ã®å¤ã管çãã¦ãã
|
---|
| 74 | * ãï¼ï¼å²è¾¼ã¿çªå·
|
---|
| 75 | * ãï¼ï¼SIUã¸ã®å²è¾¼ã¿è¦æ±ã¬ãã«
|
---|
| 76 | * ãããå
|
---|
| 77 | é¨ã¬ãã«ã®è¨å®
|
---|
| 78 | * ãããCPMå²è¾¼ã¿ã¯å
|
---|
| 79 | ¨ä½ã§ã²ã¨ã¾ã¨ãã®æ±ã
|
---|
| 80 | * ãããã(1) No.ï¼0ã7ã®æ°å¤
|
---|
| 81 | * ããããããã人éã«ã¯åãããããããããã°ã©ã ä¸ã§ã¯
|
---|
| 82 | * ãããããããç´æ¥ã使ç¨ãããªã
|
---|
| 83 | * ãããã(1-2) å²è¾¼ã¿è¦å ã®èå¥
|
---|
| 84 | * ãããããããæ¬ä¼¼ãã¯ã¿ãã¼ãã«ã®ã¤ã³ããã¯ã¹ã¨ãã¦èªã¿åºã
|
---|
| 85 | * ãããããããã ããªã®ã§ãå³å¤ã¨ãã¦ãã¯ãå®ç¾©ãã¦ããå¿
|
---|
| 86 | è¦ã¯ãªã
|
---|
| 87 | * ãããããããäºã2ãããã·ããããã¦ãã
|
---|
| 88 | * ãããã(2) 1ãã¤ãã®ããããã¿ã¼ã³
|
---|
| 89 | * ãããããããå²è¾¼ã¿è¦æ±ã¬ãã«ãè¨å®ããéã«ã¬ã¸ã¹ã¿ã«ã»ããããå¤
|
---|
| 90 | * ããããããã該å½ãã1ãããã ããã»ãããã
|
---|
| 91 | * ãï¼ï¼SIUã®IPM
|
---|
| 92 | * ããã2ãã¤ãã®ããããã¿ã¼ã³
|
---|
| 93 | * ãããCPMå²è¾¼ã¿ã¯å
|
---|
| 94 | ¨ä½ã§ã²ã¨ã¾ã¨ãã®æ±ã
|
---|
| 95 | * ãããã(1) å²è¾¼ã¿ãã¹ã¯
|
---|
| 96 | * ãããããããSIUå²è¾¼ã¿ã¬ã¸ã¹ã¿SIMASKã«è¨å®ããå¤
|
---|
| 97 | * ãããããããèªåããã¬ãã«ã®ä½ãå²è¾¼ã¿è¦æ±ããã¹ã¦ãã¹ã¯ãã
|
---|
| 98 | * ãããã(2) ä¿çä¸ã®å²è¾¼ã¿è¦å
|
---|
| 99 | * ããããããã該å½ãããããã ããã»ããããã¦ãã
|
---|
| 100 | *
|
---|
| 101 | * ãå
|
---|
| 102 | é¨ã¬ãã«2-(1)ããå²è¾¼ã¿çªå·ãå²è¾¼ã¿ã¬ãã«è¨å®ç¨ããããã¿ã¼ã³ã
|
---|
| 103 | * ãIPMãçæããæ¹éã§å®è£
|
---|
| 104 |
|
---|
| 105 | *
|
---|
| 106 | */
|
---|
| 107 |
|
---|
| 108 | /*
|
---|
| 109 | * å²è¾¼ã¿çªå·ã®å®ç¾©
|
---|
| 110 | * ãã¼ãã¦ã§ã¢ããã¥ã¢ã«ã«ã¯SIUå²è¾¼ã¿ã½ã¼ã¹ã®16ã31çªã¯äºç´æ¸
|
---|
| 111 | * ã¿ã¨ããããæ¬ä¼¼ãã¯ã¿ãã¼ãã«ãç¡é§ã«å¤§ãããªãã ããªã®ã§ã
|
---|
| 112 | * CPMå²è¾¼ã¿ã½ã¼ã¹ãå²ãå½ã¦ã¦ãã
|
---|
| 113 | *
|
---|
| 114 | * å²è¾¼ã¿çªå·ã¨åªå
|
---|
| 115 | 度ã®é¢ä¿ãSIUå²è¾¼ã¿ã¨CPMå²è¾¼ã¿ï¼ããã©ã«ãï¼
|
---|
| 116 | * ã§éãªã®ã§æ³¨æ
|
---|
| 117 | * ãSIUå²è¾¼ã¿
|
---|
| 118 | * ããå²è¾¼ã¿çªå·ãã0ï¼æä¸ä½
|
---|
| 119 | * ããå²è¾¼ã¿çªå·ã 15ï¼æä¸ä½
|
---|
| 120 | * ãCPMå²è¾¼ã¿ï¼ããã©ã«ãï¼
|
---|
| 121 | * ããå²è¾¼ã¿çªå·ã 0x0ï¼æä¸ä½
|
---|
| 122 | * ããå²è¾¼ã¿çªå·ã0x1fï¼æä¸ä½
|
---|
| 123 | */
|
---|
| 124 |
|
---|
| 125 | /* SIUå²è¾¼ã¿ã½ã¼ã¹ */
|
---|
| 126 | #define INTNO_IRQ0 0x0 /* IRQ0 */
|
---|
| 127 | #define INTNO_LVL0 0x1 /* å
|
---|
| 128 | é¨ã¬ãã«0 */
|
---|
| 129 | #define INTNO_IRQ1 0x2 /* IRQ1 */
|
---|
| 130 | #define INTNO_LVL1 0x3 /* å
|
---|
| 131 | é¨ã¬ãã«1 */
|
---|
| 132 | #define INTNO_IRQ2 0x4 /* IRQ2 */
|
---|
| 133 | #define INTNO_LVL2 0x5 /* å
|
---|
| 134 | é¨ã¬ãã«2 */
|
---|
| 135 | #define INTNO_IRQ3 0x6 /* IRQ3 */
|
---|
| 136 | #define INTNO_LVL3 0x7 /* å
|
---|
| 137 | é¨ã¬ãã«3 */
|
---|
| 138 | #define INTNO_IRQ4 0x8 /* IRQ4 */
|
---|
| 139 | #define INTNO_LVL4 0x9 /* å
|
---|
| 140 | é¨ã¬ãã«4 */
|
---|
| 141 | #define INTNO_IRQ5 0xa /* IRQ5 */
|
---|
| 142 | #define INTNO_LVL5 0xb /* å
|
---|
| 143 | é¨ã¬ãã«5 */
|
---|
| 144 | #define INTNO_IRQ6 0xc /* IRQ6 */
|
---|
| 145 | #define INTNO_LVL6 0xd /* å
|
---|
| 146 | é¨ã¬ãã«6 */
|
---|
| 147 | #define INTNO_IRQ7 0xe /* IRQ7 */
|
---|
| 148 | #define INTNO_LVL7 0xf /* å
|
---|
| 149 | é¨ã¬ãã«7 */
|
---|
| 150 |
|
---|
| 151 | /* CPMå²è¾¼ã¿ã½ã¼ã¹ */
|
---|
| 152 | #define INTNO_ERR 0x10 /* ã¨ã©ã¼ï¼0x0 */
|
---|
| 153 | #define INTNO_PC4 0x11 /* ãã©ã¬ã«I/O PC4ï¼0x1 */
|
---|
| 154 | #define INTNO_PC5 0x12 /* ãã©ã¬ã«I/O PC5ï¼0x2 */
|
---|
| 155 | #define INTNO_SMC2 0x13 /* SMC2/PIPï¼0x3 */
|
---|
| 156 | #define INTNO_SMC1 0x14 /* SMC1ï¼0x4 */
|
---|
| 157 | #define INTNO_SPI 0x15 /* SPIï¼0x5 */
|
---|
| 158 | #define INTNO_PC6 0x16 /* ãã©ã¬ã«I/O PC6ï¼0x6 */
|
---|
| 159 | #define INTNO_TIMER4 0x17 /* ã¿ã¤ã4ï¼0x7 */
|
---|
| 160 | /* CPMå²è¾¼ã¿çªå·8ã¯äºç´æ¸ã¿ */
|
---|
| 161 | #define INTNO_PC7 0x19 /* ãã©ã¬ã«I/O PC7ï¼0x9 */
|
---|
| 162 | #define INTNO_PC8 0x1a /* ãã©ã¬ã«I/O PC8ï¼0xa */
|
---|
| 163 | #define INTNO_PC9 0x1b /* ãã©ã¬ã«I/O PC9ï¼0xb */
|
---|
| 164 | #define INTNO_TIMER3 0x1c /* ã¿ã¤ã3ï¼0xc */
|
---|
| 165 | /* CPMå²è¾¼ã¿çªå·0xdã¯äºç´æ¸ã¿ */
|
---|
| 166 | #define INTNO_PC10 0x1e /* ãã©ã¬ã«I/O PC10ï¼0xe */
|
---|
| 167 | #define INTNO_PC11 0x1f /* ãã©ã¬ã«I/O PC11ï¼0xf */
|
---|
| 168 | #define INTNO_I2C 0x20 /* I2Cï¼0x10 */
|
---|
| 169 | #define INTNO_RISC 0x21 /* RISCã¿ã¤ããã¼ãã«ï¼0x11 */
|
---|
| 170 | #define INTNO_TIMER2 0x22 /* ã¿ã¤ã2ï¼0x12 */
|
---|
| 171 | /* CPMå²è¾¼ã¿çªå·0x13ã¯äºç´æ¸ã¿ */
|
---|
| 172 | #define INTNO_IDMA2 0x24 /* IDMA2ï¼0x14 */
|
---|
| 173 | #define INTNO_IDMA1 0x25 /* IDMA1ï¼0x15 */
|
---|
| 174 | #define INTNO_SDMA 0x26 /* SDMAãã£ãã«ãã¹ã¨ã©ã¼ï¼0x16 */
|
---|
| 175 | #define INTNO_PC12 0x27 /* ãã©ã¬ã«I/O PC12ï¼0x17 */
|
---|
| 176 | #define INTNO_PC13 0x28 /* ãã©ã¬ã«I/O PC13ï¼0x18 */
|
---|
| 177 | #define INTNO_TIMER1 0x29 /* ã¿ã¤ã1ï¼0x19 */
|
---|
| 178 | #define INTNO_PC14 0x2a /* ãã©ã¬ã«I/O PC14ï¼ */
|
---|
| 179 | #define INTNO_SCC4 0x2b /* SCC4ï¼0x1a */
|
---|
| 180 | #define INTNO_SCC3 0x2c /* SCC3ï¼0x1c */
|
---|
| 181 | #define INTNO_SCC2 0x2d /* SCC2ï¼0x1d */
|
---|
| 182 | #define INTNO_SCC1 0x2e /* SCC1ï¼0x1e */
|
---|
| 183 | #define INTNO_PC15 0x2f /* ãã©ã¬ã«I/O PC15ï¼0x1f */
|
---|
| 184 |
|
---|
| 185 | /*
|
---|
| 186 | * SIUã®IPMã®å®ç¾©
|
---|
| 187 | * 2ãã¤ãã®ããããã¿ã¼ã³
|
---|
| 188 | * ãã¼ãã¦ã§ã¢ã®ããã©ã«ãã®åªå
|
---|
| 189 | 度ã«åããã¦ãã
|
---|
| 190 | */
|
---|
| 191 | #define IPM_IRQ0 0x00u /* IRQ0 */
|
---|
| 192 | #define IPM_LVL0 BIT0_16 /* å
|
---|
| 193 | é¨ã¬ãã«0 */
|
---|
| 194 | #define IPM_IRQ1 (IPM_LVL0 | BIT1_16) /* IRQ1 */
|
---|
| 195 | #define IPM_LVL1 (IPM_IRQ1 | BIT2_16) /* å
|
---|
| 196 | é¨ã¬ãã«1 */
|
---|
| 197 | #define IPM_IRQ2 (IPM_LVL1 | BIT3_16) /* IRQ2 */
|
---|
| 198 | #define IPM_LVL2 (IPM_IRQ2 | BIT4_16) /* å
|
---|
| 199 | é¨ã¬ãã«2 */
|
---|
| 200 | #define IPM_IRQ3 (IPM_LVL2 | BIT5_16) /* IRQ3 */
|
---|
| 201 | #define IPM_LVL3 (IPM_IRQ3 | BIT6_16) /* å
|
---|
| 202 | é¨ã¬ãã«3 */
|
---|
| 203 | #define IPM_IRQ4 (IPM_LVL3 | BIT7_16) /* IRQ4 */
|
---|
| 204 | #define IPM_LVL4 (IPM_IRQ4 | BIT8_16) /* å
|
---|
| 205 | é¨ã¬ãã«4 */
|
---|
| 206 | #define IPM_IRQ5 (IPM_LVL4 | BIT9_16) /* IRQ5 */
|
---|
| 207 | #define IPM_LVL5 (IPM_IRQ5 | BIT10_16) /* å
|
---|
| 208 | é¨ã¬ãã«5 */
|
---|
| 209 | #define IPM_IRQ6 (IPM_LVL5 | BIT11_16) /* IRQ6 */
|
---|
| 210 | #define IPM_LVL6 (IPM_IRQ6 | BIT12_16) /* å
|
---|
| 211 | é¨ã¬ãã«6 */
|
---|
| 212 | #define IPM_IRQ7 (IPM_LVL6 | BIT13_16) /* IRQ7 */
|
---|
| 213 | #define IPM_LVL7 (IPM_IRQ7 | BIT14_16) /* å
|
---|
| 214 | é¨ã¬ãã«7 */
|
---|
| 215 |
|
---|
| 216 |
|
---|
| 217 | /* å²è¾¼ã¿ã¬ãã«ããå²è¾¼ã¿çªå·ã¸ã®å¤æ */
|
---|
| 218 | #define _LEVEL_TO_INHNO(level) INTNO_LVL##level
|
---|
| 219 | #define LEVEL_TO_INHNO(level) _LEVEL_TO_INHNO(level)
|
---|
| 220 |
|
---|
| 221 | /* å²è¾¼ã¿ã¬ãã«ããç»é²ç¨ããããã¿ã¼ã³ã¸ã®å¤æ */
|
---|
| 222 | #define _LEVEL_TO_BIT_PATTERN(level) (0x1<<(7-(level)))
|
---|
| 223 | #define LEVEL_TO_BIT_PATTERN(level) _LEVEL_TO_BIT_PATTERN(level)
|
---|
| 224 |
|
---|
| 225 | /* å²è¾¼ã¿ã¬ãã«ããIPMã¸ã®å¤æ */
|
---|
| 226 | #define _LEVEL_TO_IPM(level) IPM_LVL##level
|
---|
| 227 | #define LEVEL_TO_IPM(level) _LEVEL_TO_IPM(level)
|
---|
| 228 |
|
---|
| 229 | /* å²è¾¼ã¿ã¬ãã«ããå²è¾¼ã¿è¨±å¯ãããã¸ã®å¤æ */
|
---|
| 230 | #define _LEVEL_TO_ENABLE_BIT(level) SIMASK_LVM##level
|
---|
| 231 | #define LEVEL_TO_ENABLE_BIT(level) _LEVEL_TO_ENABLE_BIT(level)
|
---|
| 232 |
|
---|
| 233 |
|
---|
| 234 | /*
|
---|
| 235 | * CPUã®å
|
---|
| 236 | é¨ã¬ã¸ã¹ã¿
|
---|
| 237 | */
|
---|
| 238 |
|
---|
| 239 | /*
|
---|
| 240 | * 8. å½ä»¤ãã£ãã·ã¥ã»ãã¼ã¿ãã£ãã·ã¥é¢é£ã®å®ç¾©
|
---|
| 241 | */
|
---|
| 242 |
|
---|
| 243 | /* å¶å¾¡ã¬ã¸ã¹ã¿ */
|
---|
| 244 |
|
---|
| 245 | /* å½ä»¤ãã£ãã·ã¥é¢é£ */
|
---|
| 246 | #define IC_CST 560 /* å¶å¾¡ããã³ã¹ãã¼ã¿ã¹ã»ã¬ã¸ã¹ã¿ */
|
---|
| 247 | #define IC_ADR 561 /* ã¢ãã¬ã¹ã»ã¬ã¸ã¹ã¿ */
|
---|
| 248 | #define IC_DAT 562 /* ãã¼ã¿ã»ãã¼ãã»ã¬ã¸ã¹ã¿ */
|
---|
| 249 |
|
---|
| 250 | /* ãã¼ã¿ã»ãã£ãã·ã¥é¢é£ */
|
---|
| 251 | #define DC_CST 568 /* å¶å¾¡ããã³ã¹ãã¼ã¿ã¹ã»ã¬ã¸ã¹ã¿ */
|
---|
| 252 | #define DC_ADR 569 /* ã¢ãã¬ã¹ã»ã¬ã¸ã¹ã¿ */
|
---|
| 253 | #define DC_DAT 570 /* ãã¼ã¿ã»ãã¼ãã»ã¬ã¸ã¹ã¿ */
|
---|
| 254 |
|
---|
| 255 | /*
|
---|
| 256 | * 9. ã¡ã¢ãªç®¡çã¦ãããMMUé¢é£ã®å®ç¾©
|
---|
| 257 | */
|
---|
| 258 | /* å¶å¾¡ã¬ã¸ã¹ã¿ */
|
---|
| 259 | #define MI_CTR 784 /* IMMU å¶å¾¡ã¬ã¸ã¹ã¿ */
|
---|
| 260 | #define MD_CTR 792 /* DMMU å¶å¾¡ã¬ã¸ã¹ã¿ */
|
---|
| 261 |
|
---|
| 262 | /* TLBã½ã¼ã¹ã»ã¬ã¸ã¹ã¿ */
|
---|
| 263 | #define MI_EPN 787 /* IMMU å®å¹ãã¼ã¸çªå·ã¬ã¸ã¹ã¿ */
|
---|
| 264 | #define MD_EPN 795 /* DMMU å®å¹ãã¼ã¸çªå·ã¬ã¸ã¹ã¿ */
|
---|
| 265 | #define MI_TWC 789 /* IMMU ãã¼ãã«ã¦ã©ã¼ã¯å¶å¾¡ã¬ã¸ã¹ã¿ */
|
---|
| 266 | #define MD_TWC 797 /* DMMU ãã¼ãã«ã¦ã©ã¼ã¯å¶å¾¡ã¬ã¸ã¹ã¿ */
|
---|
| 267 | #define MI_RPN 790 /* IMMU å®ï¼ç©çï¼ãã¼ã¸çªå·ãã¼ã */
|
---|
| 268 | #define MD_RPN 798 /* DMMU å®ï¼ç©çï¼ãã¼ã¸çªå·ãã¼ã */
|
---|
| 269 |
|
---|
| 270 | /* ãã¼ãã«ã¦ã©ã¼ã¯ã»ãã¼ã¹ã»ã¬ã¸ã¹ã¿ */
|
---|
| 271 | #define M_TWD 796 /* MMU ãã¼ãã«ã¦ã©ã¼ã¯ã»ãã¼ã¹ã»ã¬ã¸ã¹ã¿ */
|
---|
| 272 |
|
---|
| 273 | /* ä¿è·ã¬ã¸ã¹ã¿ */
|
---|
| 274 | #define M_CASID 793 /* MMU ã«ã¬ã³ãã»ã¢ãã¬ã¹ç©ºéID ã¬ã¸ã¹ã¿ */
|
---|
| 275 | #define MI_AP 786 /* IMMU ã¢ã¯ã»ã¹ä¿è·ã¬ã¸ã¹ã¿ */
|
---|
| 276 | #define MD_AP 794 /* DMMU ã¢ã¯ã»ã¹ä¿è·ã¬ã¸ã¹ã¿ */
|
---|
| 277 |
|
---|
| 278 | /* ã¹ã¯ã©ããã»ã¬ã¸ã¹ã¿ */
|
---|
| 279 | #define M_TB 799 /* MMU ãã¼ãã«ã¦ã©ã¼ã¯ã»ã¹ãã·ã£ã«ã»ã¬ã¸ã¹ã¿ */
|
---|
| 280 |
|
---|
| 281 | /* ãããã°ã»ã¬ã¸ã¹ã¿ */
|
---|
| 282 | #define MI_CAM 816 /* IMMU CAM ã¨ã³ããªã»ãªã¼ãã»ã¬ã¸ã¹ã¿ */
|
---|
| 283 | #define MI_RAM0 817 /* IMMU RAM ã¨ã³ããªã»ãªã¼ãã»ã¬ã¸ã¹ã¿ 0 */
|
---|
| 284 | #define MI_RAM1 818 /* IMMU RAM ã¨ã³ããªã»ãªã¼ãã»ã¬ã¸ã¹ã¿ 1 */
|
---|
| 285 | #define MD_CAM 824 /* DMMU CAM ã¨ã³ããªã»ãªã¼ãã»ã¬ã¸ã¹ã¿ */
|
---|
| 286 | #define MD_RAM0 825 /* DMMU RAM ã¨ã³ããªã»ãªã¼ãã»ã¬ã¸ã¹ã¿ 0 */
|
---|
| 287 | #define MD_RAM1 826 /* DMMU RAM ã¨ã³ããªã»ãªã¼ãã»ã¬ã¸ã¹ã¿ 1 */
|
---|
| 288 |
|
---|
| 289 | /*
|
---|
| 290 | * 11. ã·ã¹ãã ã¤ã³ã¿ã¼ãã§ã¼ã¹ã¦ãããSIUé¢é£ã®å®ç¾©
|
---|
| 291 | */
|
---|
| 292 |
|
---|
| 293 |
|
---|
| 294 | /*
|
---|
| 295 | * å
|
---|
| 296 | é¨ã¡ã¢ãªãããã¬ã¸ã¹ã¿
|
---|
| 297 | * ããå
|
---|
| 298 | é¨ã¬ã¸ã¹ã¿ç¾¤ã®å
|
---|
| 299 | é ã¢ãã¬ã¹
|
---|
| 300 | * ãã
|
---|
| 301 | * ããããªã»ããç´å¾ã¯0x0000,0000çªå°ãæãã¦ãããSDRAMã¨
|
---|
| 302 | * ãããã¶ã¤ããã®ã§ãå¥ã®ã¢ãã¬ã¹ã«å¤ããå¿
|
---|
| 303 | è¦ããã
|
---|
| 304 | */
|
---|
| 305 | #define IMMR 638 /* ã¬ã¸ã¹ã¿çªå· */
|
---|
| 306 | #define IMMR_UPPER_2BYTE 0xff00 /* ä¸ä½16ããã */
|
---|
| 307 | #define IMMR_BASE (IMMR_UPPER_2BYTE << 16) /* ãã¼ã¹ã¢ãã¬ã¹ */
|
---|
| 308 |
|
---|
| 309 | #define TADR_SIU_SIUMCR 0x0 /* SIUã¢ã¸ã¥ã¼ã«ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ */
|
---|
| 310 | /* ã¬ã¸ã¹ã¿SIUMCR */
|
---|
| 311 |
|
---|
| 312 | /*
|
---|
| 313 | * 11.5 SIUå²è¾¼ã¿ã³ã³ããã¼ã©é¢é£ã®å®ç¾©
|
---|
| 314 | */
|
---|
| 315 | #define TADR_SIU_SIPEND 0x10 /* SIUå²è¾¼ã¿ä¿çã¬ã¸ã¹ã¿SIPEND */
|
---|
| 316 | #define TADR_SIU_SIMASK 0x14 /* SIUå²è¾¼ã¿ãã¹ã¯ã¬ã¸ã¹ã¿SIMASK */
|
---|
| 317 |
|
---|
| 318 | /* ä¸ä½2ãã¤ãã®ã¿ä½¿ç¨ãã */
|
---|
| 319 | #define SIMASK (VH *)(IMMR_BASE + TADR_SIU_SIMASK)
|
---|
| 320 | #define SIMASK_IRM0 BIT0_16 /* IRQ0 */
|
---|
| 321 | #define SIMASK_LVM0 BIT1_16 /* å
|
---|
| 322 | é¨ã¬ãã«0 */
|
---|
| 323 | #define SIMASK_IRM1 BIT2_16 /* IRQ1 */
|
---|
| 324 | #define SIMASK_LVM1 BIT3_16 /* å
|
---|
| 325 | é¨ã¬ãã«1 */
|
---|
| 326 | #define SIMASK_IRM2 BIT4_16 /* IRQ2 */
|
---|
| 327 | #define SIMASK_LVM2 BIT5_16 /* å
|
---|
| 328 | é¨ã¬ãã«2 */
|
---|
| 329 | #define SIMASK_IRM3 BIT6_16 /* IRQ3 */
|
---|
| 330 | #define SIMASK_LVM3 BIT7_16 /* å
|
---|
| 331 | é¨ã¬ãã«3 */
|
---|
| 332 | #define SIMASK_IRM4 BIT8_16 /* IRQ4 */
|
---|
| 333 | #define SIMASK_LVM4 BIT9_16 /* å
|
---|
| 334 | é¨ã¬ãã«4 */
|
---|
| 335 | #define SIMASK_IRM5 BIT10_16 /* IRQ5 */
|
---|
| 336 | #define SIMASK_LVM5 BIT11_16 /* å
|
---|
| 337 | é¨ã¬ãã«5 */
|
---|
| 338 | #define SIMASK_IRM6 BIT12_16 /* IRQ6 */
|
---|
| 339 | #define SIMASK_LVM6 BIT13_16 /* å
|
---|
| 340 | é¨ã¬ãã«6 */
|
---|
| 341 | #define SIMASK_IRM7 BIT14_16 /* IRQ7 */
|
---|
| 342 | #define SIMASK_LVM7 BIT15_16 /* å
|
---|
| 343 | é¨ã¬ãã«7 */
|
---|
| 344 |
|
---|
| 345 | #define TADR_SIU_SIEL 0x18 /* SIUå²è¾¼ã¿ã¨ãã¸ï¼ã¬ãã«ã¬ã¸ã¹ã¿SIEL */
|
---|
| 346 | #define TADR_SIU_SIVEC 0x1c /* SIUå²è¾¼ã¿ãã¯ã¿ã¬ã¸ã¹ã¿SIVEC */
|
---|
| 347 | #define TADR_SIU_TESR 0x20 /* 転éã¨ã©ã¼ã¹ãã¼ã¿ã¹ã¬ã¸ã¹ã¿TESR */
|
---|
| 348 | #define TADR_SIU_SDCR 0x30 /* SDMAã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ã¬ã¸ã¹ã¿SDCR */
|
---|
| 349 |
|
---|
| 350 | /*
|
---|
| 351 | * 11.7 ã½ããã¦ã§ã¢ã»ã¦ã©ããããã¯ã¿ã¤ãé¢é£ã®å®ç¾©
|
---|
| 352 | */
|
---|
| 353 | #define TADR_SIU_SYPCR 0x4 /* ã·ã¹ãã ä¿è·ã³ã³ããã¼ã«ã¬ã¸ã¹ã¿SYPCR */
|
---|
| 354 | #define SYPCR_SWE BIT29_32 /* ã¤ãã¼ãã« */
|
---|
| 355 | #define SYPCR_SWRI BIT30_32 /* ãªã»ããï¼å²è¾¼ã¿é¸æ */
|
---|
| 356 | #define TADR_SIU_SWSR 0xe /* ã½ããã¦ã§ã¢ãµã¼ãã¹ã¬ã¸ã¹ã¿SWSR */
|
---|
| 357 | #define SWSR_CLEAR1 0x556c /* ã¯ãªã¢æã«æ¸ãè¾¼ãå®æ°ï¼ */
|
---|
| 358 | #define SWSR_CLEAR2 0xaa39 /* ã¯ãªã¢æã«æ¸ãè¾¼ãå®æ°ï¼ */
|
---|
| 359 |
|
---|
| 360 | /*
|
---|
| 361 | * 12 ãªã»ããé¢é£ã®å®ç¾©
|
---|
| 362 | */
|
---|
| 363 | #define TADR_SIU_RSR 0x288 /* ãªã»ããã»ã¹ãã¼ã¿ã¹ã»ã¬ã¸ã¹ã¿RSR */
|
---|
| 364 | #define TADR_SIU_RSRK 0x388 /* ãªã»ããã»ã¹ãã¼ã¿ã¹ã»ã¬ã¸ã¹ã¿ã»ãã¼ */
|
---|
| 365 | #define RSR_EHRS BIT0_32 /* å¤é¨ãã¼ãã»ãªã»ããã»ã¹ãã¼ã¿ã¹ */
|
---|
| 366 | #define RSR_ESRS BIT1_32 /* å¤é¨ã½ããã»ãªã»ããã»ã¹ãã¼ã¿ã¹ */
|
---|
| 367 | #define RSR_LLRS BIT2_32 /* ããã¯è§£é¤ãªã»ããã»ã¹ãã¼ã¿ã¹ */
|
---|
| 368 | #define RSR_SWRS BIT3_32 /* ã½ããã¦ã§ã¢ã»ã¦ã©ããããã¯ã»ãªã»ãã */
|
---|
| 369 | #define RSR_CSRS BIT4_32 /* ãã§ãã¯ã»ã¹ãããã»ãªã»ããã»ã¹ãã¼ã¿ã¹ */
|
---|
| 370 | /* ãããã°ã»ãã¼ãã»ãã¼ãã»ãªã»ããã»ã¹ãã¼ã¿ã¹ */
|
---|
| 371 | #define RSR_DBHRS BIT5_32
|
---|
| 372 | /* ãããã°ã»ãã¼ãã»ã½ããã»ãªã»ããã»ã¹ãã¼ã¿ã¹ */
|
---|
| 373 | #define RSR_DBSRS BIT6_32
|
---|
| 374 | #define RSR_JTRS BIT4_32 /* JTAGãªã»ããã»ã¹ãã¼ã¿ã¹ */
|
---|
| 375 |
|
---|
| 376 |
|
---|
| 377 | /*
|
---|
| 378 | * éä¿¡ããã»ããµã¢ã¸ã¥ã¼ã«CPMé¢é£
|
---|
| 379 | */
|
---|
| 380 |
|
---|
| 381 | /*
|
---|
| 382 | * 35. CPMå²è¾¼ã¿ã³ã³ããã¼ã©é¢é£ã®å®ç¾©
|
---|
| 383 | */
|
---|
| 384 | #define TADR_CPM_CIVR 0x930 /* CPMå²è¾¼ã¿ãã¯ã¿ã¬ã¸ã¹ã¿CIVR */
|
---|
| 385 | #define TADR_CPM_CICR 0x940 /* CPMå²è¾¼ã¿ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ */
|
---|
| 386 | /* ã¬ã¸ã¹ã¿CICR */
|
---|
| 387 | #define TADR_CPM_CIPR 0x944 /* CPMå²è¾¼ã¿ä¿çã¬ã¸ã¹ã¿CIPR */
|
---|
| 388 | #define TADR_CPM_CIMR 0x948 /* CPMå²è¾¼ã¿ãã¹ã¯ã¬ã¸ã¹ã¿CIMR */
|
---|
| 389 | #define TADR_CPM_CISR 0x94c /* CPMå²è¾¼ã¿ã¤ã³ãµã¼ãã¹ã¬ã¸ã¹ã¿CISR */
|
---|
| 390 |
|
---|
| 391 | /* CPMå²è¾¼ã¿ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ ã¬ã¸ã¹ã¿CICR */
|
---|
| 392 | #define CICR (VW *)(IMMR_BASE + TADR_CPM_CICR)
|
---|
| 393 | #define CICR_IEN BIT24_32
|
---|
| 394 |
|
---|
| 395 | /* CPMå²è¾¼ã¿ãã¹ã¯ã¬ã¸ã¹ã¿CIMR */
|
---|
| 396 | #define CIMR (VW *)(IMMR_BASE + TADR_CPM_CIMR)
|
---|
| 397 | #define CIMR_PC15 BIT0_32
|
---|
| 398 | #define CIMR_SCC1 BIT1_32
|
---|
| 399 | #define CIMR_SCC2 BIT2_32
|
---|
| 400 | #define CIMR_SCC3 BIT3_32
|
---|
| 401 | #define CIMR_SCC4 BIT4_32
|
---|
| 402 | #define CIMR_PC14 BIT5_32
|
---|
| 403 | #define CIMR_TIMER1 BIT6_32
|
---|
| 404 | #define CIMR_PC13 BIT7_32
|
---|
| 405 | #define CIMR_PC12 BIT8_32
|
---|
| 406 | #define CIMR_SDMA BIT9_32
|
---|
| 407 | #define CIMR_IDMA1 BIT10_32
|
---|
| 408 | #define CIMR_IDMA2 BIT11_32
|
---|
| 409 | #define CIMR_TIMER2 BIT13_32
|
---|
| 410 | #define CIMR_RTT BIT14_32
|
---|
| 411 | #define CIMR_I2C BIT15_32
|
---|
| 412 | #define CIMR_PC11 BIT16_32
|
---|
| 413 | #define CIMR_PC10 BIT17_32
|
---|
| 414 | #define CIMR_TIMER3 BIT19_32
|
---|
| 415 | #define CIMR_PC9 BIT20_32
|
---|
| 416 | #define CIMR_PC8 BIT21_32
|
---|
| 417 | #define CIMR_PC7 BIT22_32
|
---|
| 418 | #define CIMR_TIMER4 BIT24_32
|
---|
| 419 | #define CIMR_PC6 BIT25_32
|
---|
| 420 | #define CIMR_SPI BIT26_32
|
---|
| 421 | #define CIMR_SMC1 BIT27_32
|
---|
| 422 | #define CIMR_SMC2 BIT28_32
|
---|
| 423 | #define CIMR_PC5 BIT29_32
|
---|
| 424 | #define CIMR_PC4 BIT30_32
|
---|
| 425 |
|
---|
| 426 | /* CPMå²è¾¼ã¿ã¤ã³ãµã¼ãã¹ã¬ã¸ã¹ã¿CISR */
|
---|
| 427 | #define CISR (VW *)(IMMR_BASE + TADR_CPM_CISR)
|
---|
| 428 | #define CISR_BIT(device) _CISR_BIT(device)
|
---|
| 429 | #define _CISR_BIT(device) CIMR_##device
|
---|
| 430 |
|
---|
| 431 | /*
|
---|
| 432 | * CPMå²è¾¼ã¿å¶å¾¡ãããã®å®ç¾©
|
---|
| 433 | */
|
---|
| 434 | /* CPMå²è¾¼ã¿ãã¯ã¿ã¬ã¸ã¹ã¿CIVRã¬ã¸ã¹ã¿ã®IACKããã */
|
---|
| 435 | #define TA_CPM_CIVR_IACK 0x1
|
---|
| 436 |
|
---|
| 437 |
|
---|
| 438 | /*
|
---|
| 439 | * 15. ã¯ããã¯é¸æã¨é»åå¶å¾¡é¢é£ã®ã¬ã¸ã¹ã¿å®ç¾©
|
---|
| 440 | */
|
---|
| 441 |
|
---|
| 442 | /* ã·ã¹ãã ã¯ããã¯ããã³ãªã»ããå¶å¾¡ã¬ã¸ã¹ã¿ */
|
---|
| 443 | #define TADR_SCCR 0x280
|
---|
| 444 | #define SCCR (VW *)(IMMR_BASE + TADR_SCCR)
|
---|
| 445 | #define TADR_SCCRK 0x380 /* ãã¼ã¬ã¸ã¹ã¿ */
|
---|
| 446 | #define SCCRK (VW *)(IMMR_BASE + TADR_SCCRK)
|
---|
| 447 |
|
---|
| 448 | #define SCCR_RTDIV BIT7_32 /* ãªã¢ã«ã¿ã¤ã ã¯ããã¯åå¨ */
|
---|
| 449 | /* 0ï¼4ã§åå¨ã1ï¼512ã§åå¨ */
|
---|
| 450 | #define SCCR_RTSEL BIT8_32 /* ãªã¢ã«ã¿ã¤ã ã¯ããã¯é¸æ */
|
---|
| 451 | /* 0ï¼OSCMï¼æ°´æ¶ãªã·ã¬ã¼ã¿ï¼ã1ï¼EXTCLK */
|
---|
| 452 | #define SCCR_CRQEN BIT9_32 /* CPMè¦æ±ã¤ãã¼ãã« */
|
---|
| 453 | #define SCCR_PRQEN BIT10_32 /* ãã¯ã¼ããã¸ã¡ã³ãè¦æ±ã¤ãã¼ãã« */
|
---|
| 454 | #define SCCR_EBDF (BIT13_32 | BIT14_32) /* å¤é¨ãã¹åå¨ä¿æ° */
|
---|
| 455 | #define SCCR_DFBRG (BIT19_32 | BIT20_32) /* BRGCLKã®åå¨ä¿æ° */
|
---|
| 456 |
|
---|
| 457 | /* SPLL ãä½é»åãããã³ãªã»ããå¶å¾¡ã¬ã¸ã¹ã¿ */
|
---|
| 458 | #define TADR_PLPRCRK 0x384 /* ã¬ã¸ã¹ã¿ã»ãã¼ */
|
---|
| 459 | #define TADR_PLPRCR 0x284
|
---|
| 460 | #define PLPRCR_TIMIST BIT19_32 /* ã¿ã¤ãå²è¾¼ã¿ã¹ãã¼ã¿ã¹ */
|
---|
| 461 | #define PLPRCR_CSRC BIT21_32 /* ã¯ããã¯ã½ã¼ã¹ */
|
---|
| 462 | /* ä½é»åã¢ã¼ã */
|
---|
| 463 | #define PLPRCR_LPM (BIT22_32 | BIT23_32)
|
---|
| 464 | #define PLPRCR_LPM10 BIT22_32
|
---|
| 465 |
|
---|
| 466 |
|
---|
| 467 | /*
|
---|
| 468 | * 16. ã¡ã¢ãªã³ã³ããã¼ã©ã®ã¬ã¸ã¹ã¿å®ç¾©
|
---|
| 469 | */
|
---|
| 470 |
|
---|
| 471 | /* ãã¼ã¹ã¬ã¸ã¹ã¿BRx */
|
---|
| 472 | #define TADR_BR0 0x100
|
---|
| 473 | #define TADR_BR1 0x108
|
---|
| 474 | #define TADR_BR2 0x110
|
---|
| 475 | #define TADR_BR3 0x118
|
---|
| 476 | #define TADR_BR4 0x120
|
---|
| 477 | #define TADR_BR5 0x128
|
---|
| 478 | #define TADR_BR6 0x130
|
---|
| 479 | #define TADR_BR7 0x138
|
---|
| 480 |
|
---|
| 481 | /* ãªãã·ã§ã³ã¬ã¸ã¹ã¿ORx */
|
---|
| 482 | #define TADR_OR0 0x104
|
---|
| 483 | #define TADR_OR1 0x10c
|
---|
| 484 | #define TADR_OR2 0x114
|
---|
| 485 | #define TADR_OR3 0x11c
|
---|
| 486 | #define TADR_OR4 0x124
|
---|
| 487 | #define TADR_OR5 0x12c
|
---|
| 488 | #define TADR_OR6 0x134
|
---|
| 489 | #define TADR_OR7 0x13c
|
---|
| 490 |
|
---|
| 491 | #define TADR_MAMR 0x170 /* ãã·ã³Aã¢ã¼ãã»ã¬ã¸ã¹ã¿ */
|
---|
| 492 | #define TADR_MBMR 0x174 /* ãã·ã³Bã¢ã¼ãã»ã¬ã¸ã¹ã¿ */
|
---|
| 493 | #define TADR_MSTAT 0x178 /* ã¡ã¢ãªã¹ãã¼ã¿ã¹ã»ã¬ã¸ã¹ã¿MSTAT */
|
---|
| 494 |
|
---|
| 495 | #define TADR_MCR 0x168 /* ã¡ã¢ãªã»ã³ãã³ãã»ã¬ã¸ã¹ã¿MCR */
|
---|
| 496 | #define TADR_MDR 0x17c /* ã¡ã¢ãªã»ãã¼ã¿ã»ã¬ã¸ã¹ã¿MDR */
|
---|
| 497 | #define TADR_MAR 0x164 /* ã¡ã¢ãªã»ã¢ãã¬ã¹ã»ã¬ã¸ã¹ã¿MAR */
|
---|
| 498 | #define TADR_MPTPR 0x17a /* ã¡ã¢ãªå¨æã¿ã¤ãã»ããªã¹ã±ã¼ã© */
|
---|
| 499 | /* ããããããããããã¬ã¸ã¹ã¿MPTPR */
|
---|
| 500 |
|
---|
| 501 | /*
|
---|
| 502 | * 19. éä¿¡ããã»ããµCPé¢é£ã®ã¬ã¸ã¹ã¿å®ç¾©
|
---|
| 503 | */
|
---|
| 504 |
|
---|
| 505 | /* CPã³ãã³ãã¬ã¸ã¹ã¿ */
|
---|
| 506 | #define CPCR (VH *)(IMMR_BASE + 0x9c0)
|
---|
| 507 | #define CPCR_RST BIT0_16 /* ãªã»ããã»ãã©ã° */
|
---|
| 508 | #define CPCR_FLG BIT15_16 /* ã³ãã³ãã»ã»ããã©ã»ãã©ã° */
|
---|
| 509 | #define CPCR_CH_NUM_SMC1 0x9 /* SMC1ã®ãã£ãã«çªå· */
|
---|
| 510 |
|
---|
| 511 | /* CPã³ãã³ãã®ãªãã³ã¼ã */
|
---|
| 512 | #define CPCR_INIT_RX_TX_PARAMETERS 0x0
|
---|
| 513 | #define CPCR_STOP_TX 0x4
|
---|
| 514 | #define CPCR_RESTART_TX 0x6
|
---|
| 515 |
|
---|
| 516 |
|
---|
| 517 |
|
---|
| 518 | /* ãã¥ã¢ã«ã»ãã¼ãRAMã®å
|
---|
| 519 | é ã¢ãã¬ã¹ */
|
---|
| 520 | #define DUAL_PORT_RAM (IMMR_BASE + 0x2000)
|
---|
| 521 |
|
---|
| 522 |
|
---|
| 523 | /*
|
---|
| 524 | * 20. SDMAããã³IDMAã¨ãã¥ã¬ã¼ã·ã§ã³
|
---|
| 525 | * ããããSDMAï¼ã·ãªã¢ã«DMA
|
---|
| 526 | * ããããIDMAï¼ä»®æ³SDMA
|
---|
| 527 | */
|
---|
| 528 |
|
---|
| 529 | /* SDMAã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ã»ã¬ã¸ã¹ã¿ */
|
---|
| 530 | #define SDCR (VW *)(IMMR_BASE + 0x30)
|
---|
| 531 | /* RISCã³ã³ããã¼ã©ï¼CPï¼ã®èª¿åID */
|
---|
| 532 | /* SDMA ã®U ãã¹èª¿ååªå
|
---|
| 533 | 度5ï¼é常å¦ç */
|
---|
| 534 | #define SDCR_RAID_RB5 0x1
|
---|
| 535 |
|
---|
| 536 | /*
|
---|
| 537 | * 21. ã·ãªã¢ã«ã¤ã³ã¿ã¼ãã§ã¼ã¹SIé¢é£ã®ã¬ã¸ã¹ã¿å®ç¾©
|
---|
| 538 | */
|
---|
| 539 |
|
---|
| 540 | /* SIã¢ã¼ãã»ã¬ã¸ã¹ã¿ */
|
---|
| 541 | #define SIMODE (VW *)(IMMR_BASE + 0xae0)
|
---|
| 542 | #define SIMODE_SMC1 BIT16_32 /* SMC1ã®æ¥ç¶ */
|
---|
| 543 | /* ã0:NMSIã¢ã¼ã */
|
---|
| 544 | /* ã1:å¤éå¦çã¢ã¼ã */
|
---|
| 545 |
|
---|
| 546 | /* SMC1ã¯ããã¯ã½ã¼ã¹ */
|
---|
| 547 | #define SIMODE_SMC1CS (BIT17_32 | BIT18_32 | BIT19_32)
|
---|
| 548 |
|
---|
| 549 | /* ãã¼ã¬ã¼ãã»ã¸ã§ãã¬ã¼ã¿ã»ã³ã³ãã£ã®ã¥ã¬ã¼ã·ã§ã³ã»ã¬ã¸ã¹ã¿ */
|
---|
| 550 | #define BRGC1 (VW *)(IMMR_BASE + 0x9f0)
|
---|
| 551 | #define BRGC1_RST BIT14_32 /* BRGãªã»ãã */
|
---|
| 552 | #define BRGC1_EN BIT15_32 /* BRGã«ã¦ã³ãã¤ãã¼ãã« */
|
---|
| 553 | #define BRGC1_EXTC (BIT16_32 | BIT17_32) /* å¤é¨ã¯ããã¯ã½ã¼ã¹ */
|
---|
| 554 | #define BRGC1_ATB BIT18_32 /* ãªã¼ããã¼ */
|
---|
| 555 | #define BRGC1_CD 0x1ffe /* ã¯ããã¯ã»ããã¤ã */
|
---|
| 556 | #define BRGC1_DIV16 BIT31_32 /* 16åå¨ */
|
---|
| 557 |
|
---|
| 558 |
|
---|
| 559 | /*
|
---|
| 560 | * 34. ãã©ã¬ã«I/Oé¢é£ã®ã¬ã¸ã¹ã¿å®ç¾©
|
---|
| 561 | */
|
---|
| 562 |
|
---|
| 563 | /* ãã¼ãBãã³ã»ã¢ãµã¤ã³ã»ã¬ã¸ã¹ã¿ */
|
---|
| 564 | #define TADR_PBPAR 0xabc
|
---|
| 565 | #define PBPAR (VW *)(IMMR_BASE + TADR_PBPAR)
|
---|
| 566 | #define PBPAR_DD24 BIT24_32 /* PB24ãã³ï¼å°ç¨ããªãã§ã©ã«æ©è½ */
|
---|
| 567 | #define PBPAR_DD25 BIT25_32 /* PB25ãã³ï¼å°ç¨ããªãã§ã©ã«æ©è½ */
|
---|
| 568 | #define PBPAR_DD27 BIT27_32 /* PB27ãã³ï¼å°ç¨ããªãã§ã©ã«æ©è½ */
|
---|
| 569 |
|
---|
| 570 | /* ãã¼ãBãã¼ã¿ã»ãã£ã¬ã¯ã·ã§ã³ã»ã¬ã¸ã¹ã¿ */
|
---|
| 571 | #define TADR_PBDIR 0xab8
|
---|
| 572 | #define PBDIR (VW *)(IMMR_BASE + TADR_PBDIR)
|
---|
| 573 | #define PBDIR_DR24 BIT24_32 /* PB24ãã³ï¼ããªãã§ã©ã«æ©è½1 */
|
---|
| 574 | #define PBDIR_DR25 BIT25_32 /* PB25ãã³ï¼ããªãã§ã©ã«æ©è½1 */
|
---|
| 575 | #define PBDIR_DR27 BIT27_32 /* PB25ãã³ï¼ããªãã§ã©ã«æ©è½1 */
|
---|
| 576 |
|
---|
| 577 | /* ãã¼ãBãªã¼ãã³ã»ãã¬ã¤ã³ã»ã¬ã¸ã¹ã¿ */
|
---|
| 578 | #define TADR_PBODR 0xac0
|
---|
| 579 | #define PBODR (VW *)(IMMR_BASE + TADR_PBODR)
|
---|
| 580 | #define PBODR_OD24 BIT24_32 /* PB24ãã³ï¼ãªã¼ãã³ã»ãã¬ã¤ã³ã»ãã©ã¤ã */
|
---|
| 581 | #define PBODR_OD25 BIT25_32 /* PB25ãã³ï¼ãªã¼ãã³ã»ãã¬ã¤ã³ã»ãã©ã¤ã */
|
---|
| 582 | #define PBODR_OD27 BIT27_32 /* PB25ãã³ï¼ãªã¼ãã³ã»ãã¬ã¤ã³ã»ãã©ã¤ã */
|
---|
| 583 |
|
---|
| 584 | /* ãã¼ãBãã¼ã¿ã¬ã¸ã¹ã¿ */
|
---|
| 585 | #define TADR_PBDAT 0xac4
|
---|
| 586 | #define PBDAT_D27 BIT27_32
|
---|
| 587 |
|
---|
| 588 |
|
---|
| 589 | /* ã¢ã³ããã¯ã®éã«ãã¼ã¬ã¸ã¹ã¿ã«æ¸ãè¾¼ãå®æ° */
|
---|
| 590 | #define UNLOCK_KEY 0x55ccaa33
|
---|
| 591 |
|
---|
| 592 | /*
|
---|
| 593 | * å
|
---|
| 594 | é¨ã¬ã¸ã¹ã¿ä¿è·ã®ããã¯ã¨ã¢ã³ããã¯
|
---|
| 595 | *
|
---|
| 596 | *ããã·ãªã¢ã«ãã©ã¤ãã¨ã¿ã¤ããã©ã¤ãã®ä¸¡æ¹ã§ç¨ããããã
|
---|
| 597 | *ãããã®ãã¡ã¤ã«ã«å
|
---|
| 598 | ¥ãã¦ãã
|
---|
| 599 | */
|
---|
| 600 |
|
---|
| 601 | /* SCCRãã㯠*/
|
---|
| 602 | /* å¤ã¯UNLOCK_KEY以å¤ã§ããã°è¯ã */
|
---|
| 603 | #define lock_sccr() mpc860_wrw_mem(SCCRK, 0)
|
---|
| 604 |
|
---|
| 605 | /* SCCRã¢ã³ãã㯠*/
|
---|
| 606 | #define unlock_sccr() mpc860_wrw_mem(SCCRK, UNLOCK_KEY)
|
---|
| 607 |
|
---|
| 608 |
|
---|
| 609 | #endif /* _MPC860_H_ */
|
---|
| 610 | /* end of file */
|
---|