1 | /*
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2 | * TOPPERS/JSP Kernel
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3 | * Toyohashi Open Platform for Embedded Real-Time Systems/
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4 | * Just Standard Profile Kernel
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5 | *
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6 | * Copyright (C) 2000-2003 by Embedded and Real-Time Systems Laboratory
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7 | * Toyohashi Univ. of Technology, JAPAN
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8 | * Copyright (C) 2005- by Monami software, LP.
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9 | *
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10 | * ä¸è¨è使¨©è
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11 | ã¯ï¼ä»¥ä¸ã® (1)ã(4) ã®æ¡ä»¶ãï¼Free Software Foundation
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12 | * ã«ãã£ã¦å
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13 | ¬è¡¨ããã¦ãã GNU General Public License ã® Version 2 ã«è¨
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14 | * è¿°ããã¦ããæ¡ä»¶ãæºããå ´åã«éãï¼æ¬ã½ããã¦ã§ã¢ï¼æ¬ã½ããã¦ã§ã¢
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15 | * ãæ¹å¤ãããã®ãå«ãï¼ä»¥ä¸åãï¼ã使ç¨ã»è¤è£½ã»æ¹å¤ã»åé
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16 | å¸ï¼ä»¥ä¸ï¼
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17 | * å©ç¨ã¨å¼ã¶ï¼ãããã¨ãç¡åã§è¨±è«¾ããï¼
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18 | * (1) æ¬ã½ããã¦ã§ã¢ãã½ã¼ã¹ã³ã¼ãã®å½¢ã§å©ç¨ããå ´åã«ã¯ï¼ä¸è¨ã®èä½
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19 | * 権表示ï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãï¼ãã®ã¾ã¾ã®å½¢ã§ã½ã¼
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20 | * ã¹ã³ã¼ãä¸ã«å«ã¾ãã¦ãããã¨ï¼
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21 | * (2) æ¬ã½ããã¦ã§ã¢ãï¼ã©ã¤ãã©ãªå½¢å¼ãªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
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22 | * ç¨ã§ããå½¢ã§åé
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23 | å¸ããå ´åã«ã¯ï¼åé
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24 | å¸ã«ä¼´ãããã¥ã¡ã³ãï¼å©ç¨
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25 | * è
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26 | ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è使¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨
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27 | * ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
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28 | * (3) æ¬ã½ããã¦ã§ã¢ãï¼æ©å¨ã«çµã¿è¾¼ããªã©ï¼ä»ã®ã½ããã¦ã§ã¢éçºã«ä½¿
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29 | * ç¨ã§ããªãå½¢ã§åé
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30 | å¸ããå ´åã«ã¯ï¼æ¬¡ã®ããããã®æ¡ä»¶ãæºããã
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31 | * ã¨ï¼
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32 | * (a) åé
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33 | å¸ã«ä¼´ãããã¥ã¡ã³ãï¼å©ç¨è
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34 | ããã¥ã¢ã«ãªã©ï¼ã«ï¼ä¸è¨ã®è
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35 | * 使¨©è¡¨ç¤ºï¼ãã®å©ç¨æ¡ä»¶ããã³ä¸è¨ã®ç¡ä¿è¨¼è¦å®ãæ²è¼ãããã¨ï¼
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36 | * (b) åé
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37 | å¸ã®å½¢æ
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38 | ãï¼å¥ã«å®ããæ¹æ³ã«ãã£ã¦ï¼TOPPERSããã¸ã§ã¯ãã«
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39 | * å ±åãããã¨ï¼
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40 | * (4) æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´æ¥çã¾ãã¯éæ¥çã«çãããããªãæ
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41 | * 害ãããï¼ä¸è¨è使¨©è
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42 | ããã³TOPPERSããã¸ã§ã¯ããå
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43 | 責ãããã¨ï¼
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44 | *
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45 | * æ¬ã½ããã¦ã§ã¢ã¯ï¼ç¡ä¿è¨¼ã§æä¾ããã¦ãããã®ã§ããï¼ä¸è¨è使¨©è
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46 | ã
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47 | * ãã³TOPPERSããã¸ã§ã¯ãã¯ï¼æ¬ã½ããã¦ã§ã¢ã«é¢ãã¦ï¼ãã®é©ç¨å¯è½æ§ã
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48 | * å«ãã¦ï¼ãããªãä¿è¨¼ãè¡ããªãï¼ã¾ãï¼æ¬ã½ããã¦ã§ã¢ã®å©ç¨ã«ããç´
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49 | * æ¥çã¾ãã¯éæ¥çã«çãããããªãæå®³ã«é¢ãã¦ãï¼ãã®è²¬ä»»ãè² ããªãï¼
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50 | *
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51 | * @(#) $Id$
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52 | */
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53 |
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54 | #ifndef _LPC2214_H_
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55 | #define _LPC2214_H_
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56 |
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57 | #ifndef _MACRO_ONLY
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58 | #include <itron.h>
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59 | #include <sil.h>
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60 | #endif /* _MACRO_ONLY */
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61 |
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62 | #include <armv4.h>
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63 |
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64 | /*
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65 | * Device Registers
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66 | */
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67 |
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68 | /*
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69 | * PXA250 RTC
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70 | */
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71 | #define RTC_RCNR ((VP)0x40900000)
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72 | #define RTC_RTAR ((VP)0x40900004)
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73 | #define RTC_RTSR ((VP)0x40900008)
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74 | #define RTC_RTTR ((VP)0x4090000c)
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75 |
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76 | /*
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77 | * LPC2214 TIMER0/TIMER1
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78 | */
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79 | #define TIMER_T0IR ((VP)0xe0004000)
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80 | #define TIMER_T0TCR ((VP)0xe0004004)
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81 | #define TIMER_T0TC ((VP)0xe0004008)
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82 | #define TIMER_T0PR ((VP)0xe000400c)
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83 | #define TIMER_T0PC ((VP)0xe0004010)
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84 | #define TIMER_T0MCR ((VP)0xe0004014)
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85 | #define TIMER_T0MR0 ((VP)0xe0004018)
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86 | #define TIMER_T0MR1 ((VP)0xe000401c)
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87 | #define TIMER_T0MR2 ((VP)0xe0004020)
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88 | #define TIMER_T0MR3 ((VP)0xe0004024)
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89 | #define TIMER_T0CCR ((VP)0xe0004028)
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90 | #define TIMER_T0CR0 ((VP)0xe000402c)
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91 | #define TIMER_T0CR1 ((VP)0xe0004030)
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92 | #define TIMER_T0CR2 ((VP)0xe0004034)
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93 | #define TIMER_T0CR3 ((VP)0xe0004038)
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94 | #define TIMER_T0EMR ((VP)0xe000403c)
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95 |
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96 | #define TIMER_T1IR ((VP)0xe0008000)
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97 | #define TIMER_T1TCR ((VP)0xe0008004)
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98 | #define TIMER_T1TC ((VP)0xe0008008)
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99 | #define TIMER_T1PR ((VP)0xe000800c)
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100 | #define TIMER_T1PC ((VP)0xe0008010)
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101 | #define TIMER_T1MCR ((VP)0xe0008014)
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102 | #define TIMER_T1MR0 ((VP)0xe0008018)
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103 | #define TIMER_T1MR1 ((VP)0xe000801c)
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104 | #define TIMER_T1MR2 ((VP)0xe0008020)
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105 | #define TIMER_T1MR3 ((VP)0xe0008024)
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106 | #define TIMER_T1CCR ((VP)0xe0008028)
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107 | #define TIMER_T1CR0 ((VP)0xe000802c)
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108 | #define TIMER_T1CR1 ((VP)0xe0008030)
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109 | #define TIMER_T1CR2 ((VP)0xe0008034)
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110 | #define TIMER_T1CR3 ((VP)0xe0008038)
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111 | #define TIMER_T1EMR ((VP)0xe000803c)
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112 |
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113 | #define MCR_INT_MR0 (1u)
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114 | #define MCR_RST_MR0 (2u)
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115 | #define MCR_STP_MR0 (4u)
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116 |
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117 | /*
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118 | * intrrupt control
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119 | */
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120 | #define INTC_ICIP 0x40d00000
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121 | #define INTC_ICMR 0x40d00004
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122 | #define INTC_ICFP 0x40d0000c /* should not be used in the kenrel. */
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123 | #define INTC_ICPR 0x40d00010
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124 | #define INTC_ICLR ((VP)0x40d00008)
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125 | #define INTC_ICCR ((VP)0x40d00014)
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126 | #define INT_MASK_UA (1<<22)
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127 | #define INT_MASK_T0 (1<<26)
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128 |
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129 |
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130 | /*
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131 | * SCI Registers
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132 | */
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133 | #define UART_BASE (0xE0010000)
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134 | #define UART_RBR (VP)(UART_BASE+ 0)
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135 | #define UART_THR (VP)(UART_BASE+ 0)
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136 | #define UART_IER (VP)(UART_BASE+ 4)
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137 | #define UART_IIR (VP)(UART_BASE+ 8)
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138 | #define UART_FCR (VP)(UART_BASE+ 8)
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139 | #define UART_LCR (VP)(UART_BASE+ 0xc)
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140 | #define UART_MCR (VP)(UART_BASE+ 0x10)
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141 | #define UART_LSR (VP)(UART_BASE+ 0x14)
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142 | #define UART_MSR (VP)(UART_BASE+ 0x18)
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143 | #define UART_SPR (VP)(UART_BASE+ 0x1c)
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144 | #define UART_DLL (VP)(UART_BASE+ 0)
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145 | #define UART_DLH (VP)(UART_BASE+ 4)
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146 | /* #define UART_ISR (VP)(UART_BASE+ 0x20) -- LP2214 doesn't have ISR register. */
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147 |
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148 | #define GPIO_GPLR_x (VP)(0x40e00000)
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149 | #define GPIO_GPLR_y (VP)(0x40e00004)
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150 | #define GPIO_GPLR_z (VP)(0x40e00008)
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151 | #define GPIO_GPDR_x (VP)(0x40e0000c)
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152 | #define GPIO_GPDR_y (VP)(0x40e00010)
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153 | #define GPIO_GPDR_z (VP)(0x40e00014)
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154 | #define GPIO_GPSR_x (VP)(0x40e00018)
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155 | #define GPIO_GPSR_y (VP)(0x40e0001c)
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156 | #define GPIO_GPSR_z (VP)(0x40e00020)
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157 | #define GPIO_GPCR_x (VP)(0x40e00024)
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158 | #define GPIO_GPCR_y (VP)(0x40e00028)
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159 | #define GPIO_GPCR_z (VP)(0x40e0002c)
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160 | #define GPIO_GRER_x (VP)(0x40e00030)
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161 | #define GPIO_GRER_y (VP)(0x40e00034)
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162 | #define GPIO_GRER_z (VP)(0x40e00038)
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163 | #define GPIO_GFER_x (VP)(0x40e0003c)
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164 | #define GPIO_GFER_y (VP)(0x40e00040)
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165 | #define GPIO_GFER_z (VP)(0x40e00044)
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166 | #define GPIO_GEDR_x (VP)(0x40e00048)
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167 | #define GPIO_GEDR_y (VP)(0x40e0004c)
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168 | #define GPIO_GEDR_z (VP)(0x40e00050)
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169 | #define GPIO_GAFR0_x (VP)(0x40e00054)
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170 | #define GPIO_GAFR1_x (VP)(0x40e00058)
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171 | #define GPIO_GAFR0_y (VP)(0x40e0005c)
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172 | #define GPIO_GAFR1_y (VP)(0x40e00060)
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173 | #define GPIO_GAFR0_z (VP)(0x40e00064)
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174 | #define GPIO_GAFR1_z (VP)(0x40e00068)
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175 |
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176 | #define CQ_PXA250_CONFIG (VP)(0x0a000000)
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177 |
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178 | /*
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179 | * SCI Registers
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180 | */
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181 | #define CAL_BPS(bps,clk) ((clk)/(16*(bps)))
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182 |
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183 | #define UART_FCR_TC 0x01
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184 | #define UART_FCR_RC 0x02
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185 |
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186 | #define UART_INT_R 0x01
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187 | #define UART_INT_T 0x02
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188 | #define UART_INT_TI 0x04
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189 | #define UART_INT_M 0x08
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190 |
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191 | #ifndef _MACRO_ONLY
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192 | /*
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193 | * å
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194 | èµUARTç¨ ç°¡æSIOãã©ã¤ã
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195 | */
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196 |
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197 |
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198 | /*
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199 | * ã«ã¼ãã«èµ·åæç¨ã®åæå(sys_putcã使ç¨ãããã)
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200 | */
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201 | extern void uart_init(void);
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202 |
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203 | /*
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204 | * ã·ãªã¢ã«I/Oãã¼ã管çãããã¯ã®å®ç¾©
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205 | */
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206 | typedef struct sio_port_control_block SIOPCB;
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207 |
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208 | /*
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209 | * ã³ã¼ã«ããã¯ã«ã¼ãã³ã®èå¥çªå·
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210 | */
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211 | #define SIO_ERDY_SND 1u /* éä¿¡å¯è½ã³ã¼ã«ãã㯠*/
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212 | #define SIO_ERDY_RCV 2u /* åä¿¡éç¥ã³ã¼ã«ãã㯠*/
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213 |
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214 |
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215 | /*
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216 | * ãªã³ãããã®UARTããã®ãã¼ãªã³ã°åºå
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217 | */
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218 | extern void uart_putc(char c);
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219 |
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220 |
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221 |
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222 | /*
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223 | * SIOãã©ã¤ãã®åæåã«ã¼ãã³
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224 | */
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225 | extern void uart_initialize(void);
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226 |
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227 |
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228 | /*
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229 | * ãªã¼ãã³ãã¦ãããã¼ãããããï¼
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230 | */
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231 | extern BOOL uart_openflag(void);
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232 |
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233 |
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234 | /*
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235 | * ã·ãªã¢ã«I/Oãã¼ãã®ãªã¼ãã³
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236 | */
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237 | extern SIOPCB *uart_opn_por(ID siopid, VP_INT exinf);
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238 |
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239 |
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240 | /*
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241 | * ã·ãªã¢ã«I/Oãã¼ãã®ã¯ãã¼ãº
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242 | */
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243 | extern void uart_cls_por(SIOPCB *siopcb);
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244 |
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245 |
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246 | /*
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247 | * ã·ãªã¢ã«I/Oãã¼ãã¸ã®æåéä¿¡
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248 | */
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249 | extern BOOL uart_snd_chr(SIOPCB *siopcb, char c);
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250 |
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251 |
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252 | /*
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253 | * ã·ãªã¢ã«I/Oãã¼ãããã®æååä¿¡
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254 | */
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255 | extern INT uart_rcv_chr(SIOPCB *siopcb);
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256 |
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257 |
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258 | /*
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259 | * ã·ãªã¢ã«I/Oãã¼ãããã®ã³ã¼ã«ããã¯ã®è¨±å¯
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260 | */
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261 | extern void uart_ena_cbr(SIOPCB *siopcb, UINT cbrtn);
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262 |
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263 |
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264 | /*
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265 | * ã·ãªã¢ã«I/Oãã¼ãããã®ã³ã¼ã«ããã¯ã®ç¦æ¢
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266 | */
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267 | extern void uart_dis_cbr(SIOPCB *siopcb, UINT cbrtn);
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268 |
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269 |
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270 | /*
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271 | * SIOã®å²è¾¼ã¿ãµã¼ãã¹ã«ã¼ãã³
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272 | */
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273 | extern void uart_isr(void);
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274 |
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275 |
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276 | /*
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277 | * ã·ãªã¢ã«I/Oãã¼ãããã®éä¿¡å¯è½ã³ã¼ã«ããã¯
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278 | */
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279 | extern void uart_ierdy_snd(VP_INT exinf);
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280 |
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281 |
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282 | /*
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283 | * ã·ãªã¢ã«I/Oãã¼ãããã®åä¿¡éç¥ã³ã¼ã«ããã¯
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284 | */
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285 | extern void uart_ierdy_rcv(VP_INT exinf);
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286 |
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287 |
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288 | #endif /* _MACRO_ONLY */
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289 |
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290 |
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291 | #endif /* _LPC2214_H_ */
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