source: UsbWattMeter/trunk/lwip-1.4.1/ports/grsakura/if_rx62n.c@ 164

Last change on this file since 164 was 164, checked in by coas-nagasima, 6 years ago

TOPPERS/ECNLサンプルアプリ「USB充電器電力計」を追加

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1/**
2 * @file
3 * Ethernet Interface Skeleton
4 *
5 */
6
7 /*
8 * Copyright (c) 2001-2004 Swedish Institute of Computer Science.
9 * All rights reserved.
10 *
11 * Redistribution and use in source and binary forms, with or without modification,
12 * are permitted provided that the following conditions are met:
13 *
14 * 1. Redistributions of source code must retain the above copyright notice,
15 * this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright notice,
17 * this list of conditions and the following disclaimer in the documentation
18 * and/or other materials provided with the distribution.
19 * 3. The name of the author may not be used to endorse or promote products
20 * derived from this software without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
23 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
24 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
25 * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
26 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
27 * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
30 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
31 * OF SUCH DAMAGE.
32 *
33 * This file is part of the lwIP TCP/IP stack.
34 *
35 * Author: Adam Dunkels <adam@sics.se>
36 *
37 */
38
39 /*
40 * This file is a skeleton for developing Ethernet network interface
41 * drivers for lwIP. Add code to the low_level functions and do a
42 * search-and-replace for the word "ethernetif" to replace it with
43 * something that better describes your network interface.
44 */
45#ifdef _MSC_VER
46#pragma warning(disable : 4005)
47#endif
48#include "lwip/opt.h"
49#include "lwip/def.h"
50#include "lwip/mem.h"
51#include "lwip/pbuf.h"
52#include <lwip/stats.h>
53#include <lwip/snmp.h>
54#include "netif/etharp.h"
55#include "netif/ppp_oe.h"
56#ifdef _MSC_VER
57#pragma warning(default : 4005)
58#endif
59#include <t_stddef.h>
60#include <sil.h>
61#include <kernel.h>
62#include <t_syslog.h>
63#ifdef __RX
64#include <rx630_ccrx/prc_rename.h>
65#else
66#include <rx630_msvc/prc_rename.h>
67#endif
68#include "if_rx62n.h"
69#include "if_rx62nreg.h"
70#include <string.h>
71#include "ether_phy.h"
72
73 /* Define those to better describe your network interface. */
74#define IFNAME0 'e'
75#define IFNAME1 'n'
76
77extern uint8_t mac_addr[ETHARP_HWADDR_LEN];
78
79typedef struct t_rx62n_buf
80{
81 uint8_t rx_buff[NUM_IF_RX62N_RXBUF][32 * ((IF_RX62N_BUF_PAGE_SIZE + 31) / 32)];
82 uint8_t tx_buff[NUM_IF_RX62N_TXBUF][32 * ((IF_RX62N_BUF_PAGE_SIZE + 31) / 32)];
83 T_RX62N_RX_DESC rx_desc[NUM_IF_RX62N_RXBUF];
84 T_RX62N_TX_DESC tx_desc[NUM_IF_RX62N_TXBUF];
85} T_RX62N_BUF;
86
87#if defined(__RX)
88#pragma section ETH_MEMORY
89#endif
90T_RX62N_BUF rx62n_buf;
91#if defined(__RX)
92#pragma section
93#endif
94
95/**
96 * Helper struct to hold private data used to operate your ethernet interface.
97 * Keeping the ethernet address of the MAC in this struct is not necessary
98 * as it is already kept in the struct netif.
99 * But this is only an example, anyway...
100 */
101struct ethernetif
102{
103 ID sem_rev;
104 struct eth_addr *ethaddr;
105 /* Add whatever per-interface state that is needed here. */
106 T_RX62N_TX_DESC *tx_write;
107 T_RX62N_RX_DESC *rx_read;
108 PHY_STATE_T state;
109 bool_t link_pre;
110 bool_t link_now;
111 bool_t over_flow;
112};
113
114/* Forward declarations. */
115void ethernetif_input(struct netif *netif);
116
117static void rx62n_set_ecmr(struct netif *netif, PHY_MODE_T mode);
118
119/*
120 * rx62n_bus_init -- ƒ^[ƒQƒbƒgˆË‘¶•”‚̃oƒX‚̏‰Šú‰»
121 */
122
123void
124rx62n_bus_init (void)
125{
126 /* ƒC[ƒTƒlƒbƒgEƒRƒ“ƒgƒ[ƒ‰‚Ì“®ì‚ð‹–‰Â */
127 sil_wrh_mem((uint16_t *)SYSTEM_PRCR_ADDR, (uint16_t)0xA502); /* ‘ž‚Ý‹–‰Â */
128 sil_wrw_mem((uint32_t *)SYSTEM_MSTPCRB_ADDR,
129 sil_rew_mem((uint32_t *)SYSTEM_MSTPCRB_ADDR) & ~SYSTEM_MSTPCRB_MSTPB15_BIT);
130 sil_wrh_mem((uint16_t *)SYSTEM_PRCR_ADDR, (uint16_t)0xA500); /* ‘ž‚Ý‹ÖŽ~ */
131
132 /* EtherNET—LŒø */
133 /* PA3`5 RMII_MDIO, RMII_MDC, RMII_LINKSTA */
134 sil_wrb_mem((uint8_t *)PORTA_PMR_ADDR,
135 sil_reb_mem((uint8_t *)PORTA_PMR_ADDR) | (1 << 3) | (1 << 4) | (1 << 5));
136 /* PB0`7 RXD1, RXD0, REF50CK, RX-ER, TXD-EN, TXD0, TXD1, CRS */
137 sil_wrb_mem((uint8_t *)PORTB_PMR_ADDR,
138 sil_reb_mem((uint8_t *)PORTB_PMR_ADDR) | 0xFF);
139
140 /* ‘‚«ž‚݃vƒƒeƒNƒgƒŒƒWƒXƒ^‚̐ݒè PFSWEƒrƒbƒg‚ւ̏‘‚«ž‚Ý‚ð‹–‰Â */
141 sil_wrb_mem((uint8_t *)(MPC_PWPR_ADDR) , 0x00);
142 /* ‘‚«ž‚݃vƒƒeƒNƒgƒŒƒWƒXƒ^‚̐ݒè PxxFSƒŒƒWƒXƒ^‚ւ̏‘‚«ž‚Ý‚ð‹–‰Â */
143 sil_wrb_mem((uint8_t *)(MPC_PWPR_ADDR) , 0x40);
144
145 /* PA3‚ðET_MDIO‚Æ‚·‚é */
146 sil_wrb_mem((uint8_t *)MPC_PA3PFS_ADDR, 0x11);
147 /* PA4‚ðET_MDC‚Æ‚·‚é */
148 sil_wrb_mem((uint8_t *)MPC_PA4PFS_ADDR, 0x11);
149 /* PA5‚ðET_LINKSTA‚Æ‚·‚é */
150 sil_wrb_mem((uint8_t *)MPC_PA5PFS_ADDR, 0x11);
151
152 /* PB0‚ðRXD1‚Æ‚·‚é */
153 sil_wrb_mem((uint8_t *)MPC_PB0PFS_ADDR, 0x12);
154 /* PB1‚ðRXD0‚Æ‚·‚é */
155 sil_wrb_mem((uint8_t *)MPC_PB1PFS_ADDR, 0x12);
156 /* PB2‚ðREF50CK‚Æ‚·‚é */
157 sil_wrb_mem((uint8_t *)MPC_PB2PFS_ADDR, 0x12);
158 /* PB3‚ðRX-ER‚Æ‚·‚é */
159 sil_wrb_mem((uint8_t *)MPC_PB3PFS_ADDR, 0x12);
160 /* PB4‚ðTXD-EN‚Æ‚·‚é */
161 sil_wrb_mem((uint8_t *)MPC_PB4PFS_ADDR, 0x12);
162 /* PB5‚ðTXD0‚Æ‚·‚é */
163 sil_wrb_mem((uint8_t *)MPC_PB5PFS_ADDR, 0x12);
164 /* PB6‚ðTXD1‚Æ‚·‚é */
165 sil_wrb_mem((uint8_t *)MPC_PB6PFS_ADDR, 0x12);
166 /* PB7‚ðCRS‚Æ‚·‚é */
167 sil_wrb_mem((uint8_t *)MPC_PB7PFS_ADDR, 0x12);
168
169 /* ‘‚«ž‚݃vƒƒeƒNƒgƒŒƒWƒXƒ^‚ÌÝ’è ‘‚«ž‚Ý‚ð‹ÖŽ~ */
170 sil_wrb_mem((uint8_t *)(MPC_PWPR_ADDR) , 0x80);
171}
172
173/*
174 * rx62n_init_sub -- ƒlƒbƒgƒ[ƒNƒCƒ“ƒ^ƒtƒF[ƒX‚̏‰Šú‰»
175 *
176 * ’ˆÓ: NIC Š„‚荞‚Ý‹ÖŽ~ó‘ԂŌĂяo‚·‚±‚ƁB
177 */
178
179static void
180rx62n_init_sub(struct netif *netif)
181{
182 struct ethernetif *ethernetif = netif->state;
183 PHY_STATE_T state = PHY_STATE_UNINIT;
184
185 /* MAC•”ƒ\ƒtƒgƒEƒGƒAEƒŠƒZƒbƒg */
186 sil_wrw_mem(EDMAC_EDMR, sil_rew_mem(EDMAC_EDMR) | EDMAC_EDMR_SWR_BIT);
187
188 dly_tsk(1);
189
190 sil_wrw_mem(ETHERC_MAHR, ((uint32_t)mac_addr[0] << 24)
191 | ((uint32_t)mac_addr[1] << 16) | ((uint32_t)mac_addr[2] << 8)
192 | (uint32_t)mac_addr[3]);
193 sil_wrw_mem(ETHERC_MALR, ((uint32_t)mac_addr[4] << 8)
194 | (uint32_t)mac_addr[5]);
195
196 /* PHYƒŠƒZƒbƒg */
197 while ((state = phy_reset(state, 0)) != PHY_STATE_RESET);
198 ethernetif->state = state;
199
200 /* Clear all ETHERC status BFR, PSRTO, LCHNG, MPD, ICD */
201 sil_wrw_mem(ETHERC_ECSR, 0x00000037);
202
203 /* ƒŠƒ“ƒN•Ï‰»Š„‚荞‚Ý—LŒø */
204 sil_wrw_mem(ETHERC_ECSIPR, sil_rew_mem(ETHERC_ECSIPR) | ETHERC_ECSIPR_LCHNGIP);
205
206 /* Clear all ETHERC and EDMAC status bits */
207 sil_wrw_mem(EDMAC_EESR, 0x47FF0F9F);
208
209 /* ‘—ŽóMŠ„‚荞‚Ý—LŒø */
210 sil_wrw_mem(EDMAC_EESIPR, (EDMAC_EESIPR_TCIP | EDMAC_EESIPR_FRIP | EDMAC_EESIPR_RDEIP | EDMAC_EESIPR_FROFIP));
211
212 /* ŽóMƒtƒŒ[ƒ€’·ãŒÀiƒoƒbƒtƒ@ƒTƒCƒYj */
213 sil_wrw_mem(ETHERC_RFLR, IF_RX62N_BUF_PAGE_SIZE);
214
215 /* 96ƒrƒbƒgŽžŠÔi‰Šú’lj */
216 sil_wrw_mem(ETHERC_IPGR, 0x00000014);
217
218 /* Set little endian mode */
219 sil_wrw_mem(EDMAC_EDMR, sil_rew_mem(EDMAC_EDMR) | EDMAC_EDMR_DE_BIT);
220
221 /* Initialize Rx descriptor list address */
222 sil_wrw_mem(EDMAC_RDLAR, (uint32_t)rx62n_buf.rx_desc);
223 /* Initialize Tx descriptor list address */
224 sil_wrw_mem(EDMAC_TDLAR, (uint32_t)rx62n_buf.tx_desc);
225 /* Copy-back status is RFE & TFE only */
226 sil_wrw_mem(EDMAC_TRSCER, 0x00000000);
227 /* Threshold of Tx_FIFO */
228 sil_wrw_mem(EDMAC_TFTR, 0x00000000);
229 /* Transmit fifo & receive fifo is 2048 bytes */
230 sil_wrw_mem(EDMAC_FDR, 0x00000707);
231 /* RR in EDRRR is under driver control */
232 sil_wrw_mem(EDMAC_RMCR, 0x00000001);
233
234 /* PHY‚̏‰Šú‰»‚𑣂· */
235 ethernetif->link_pre = false;
236 ethernetif->link_now = true;
237}
238
239/**
240 * In this function, the hardware should be initialized.
241 * Called from ethernetif_init().
242 *
243 * @param netif the already initialized lwip network interface structure
244 * for this ethernetif
245 */
246static void
247low_level_init(struct netif *netif)
248{
249 struct ethernetif *ethernetif = netif->state;
250
251 rx62n_bus_init();
252
253 /* set MAC hardware address length */
254 netif->hwaddr_len = ETHARP_HWADDR_LEN;
255
256 /* set MAC hardware address */
257 memcpy(netif->hwaddr, mac_addr, sizeof(netif->hwaddr));
258
259 /* maximum transfer unit */
260 netif->mtu = 1500;
261
262 /* device capabilities */
263 /* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */
264 netif->flags = NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP | NETIF_FLAG_IGMP;
265
266 /* Do whatever else is needed to initialize interface. */
267 T_RX62N_TX_DESC *tdsc;
268 T_RX62N_RX_DESC *rdsc;
269 int i;
270 ER ret;
271
272 /* NIC ‚©‚ç‚ÌŠ„‚荞‚Ý‚ð‹ÖŽ~‚·‚éB*/
273 ret = dis_int(INTNO_IF_RX62N_TRX);
274 if (ret != E_OK)
275 syslog(LOG_DEBUG, "dis_int");
276
277 tdsc = (T_RX62N_TX_DESC *)rx62n_buf.tx_desc;
278 ethernetif->tx_write = tdsc;
279 for (i = 0; i < NUM_IF_RX62N_TXBUF; i++) {
280 memset(tdsc, 0, sizeof(*tdsc));
281 tdsc->tbl = 0;
282 tdsc->tba = (uint32_t)&rx62n_buf.tx_buff[i];
283 tdsc++;
284 }
285 tdsc--;
286 tdsc->tdle = 1;
287
288 rdsc = (T_RX62N_RX_DESC *)rx62n_buf.rx_desc;
289 ethernetif->rx_read = rdsc;
290 for (i = 0; i < NUM_IF_RX62N_RXBUF; i++) {
291 memset(rdsc, 0, sizeof(*rdsc));
292 rdsc->rbl = IF_RX62N_BUF_PAGE_SIZE;
293 rdsc->rba = (uint32_t)&rx62n_buf.rx_buff[i];
294 rdsc->rfl = 0;
295 rdsc->ract = 1;
296 rdsc++;
297 }
298 rdsc--;
299 rdsc->rdle = 1;
300
301 /* rx62n_init –{‘Ì‚ðŒÄ‚яo‚·B*/
302 rx62n_init_sub(netif);
303
304 if (sil_rew_mem(EDMAC_EDRRR) == 0) {
305 sil_wrw_mem(EDMAC_EDRRR, EDMAC_EDRRR_RR);
306 }
307
308 /* NIC ‚©‚ç‚ÌŠ„‚荞‚Ý‚ð‹–‰Â‚·‚éB*/
309 ret = ena_int(INTNO_IF_RX62N_TRX);
310 if (ret != E_OK)
311 syslog(LOG_DEBUG, "dis_int");
312}
313
314/*
315* rx62n_set_ecmr -- ECMRƒŒƒWƒXƒ^‚̐ݒè
316*/
317
318static void
319rx62n_set_ecmr(struct netif *netif, PHY_MODE_T mode)
320{
321 uint32_t ecmr;
322
323 ecmr = ETHERC_ECMR_RE | ETHERC_ECMR_TE/* | ETHERC_ECMR_PRM*/;
324
325 if ((mode & 0x01) != 0)
326 ecmr |= ETHERC_ECMR_DM;
327 if ((mode & 0x02) != 0)
328 ecmr |= ETHERC_ECMR_RTM;
329
330 /* “®ìƒ‚[ƒhÝ’è */
331 sil_wrw_mem(ETHERC_ECMR, ecmr);
332}
333
334/**
335 * This function should do the actual transmission of the packet. The packet is
336 * contained in the pbuf that is passed to the function. This pbuf
337 * might be chained.
338 *
339 * @param netif the lwip network interface structure for this ethernetif
340 * @param p the MAC packet to send (e.g. IP packet including MAC addresses and type)
341 * @return ERR_OK if the packet could be sent
342 * an err_t value if the packet couldn't be sent
343 *
344 * @note Returning ERR_MEM here if a DMA queue of your MAC is full can lead to
345 * strange results. You might consider waiting for space in the DMA queue
346 * to become availale since the stack doesn't retry to send a packet
347 * dropped because of memory failure (except for the TCP timers).
348 */
349
350static err_t
351low_level_output(struct netif *netif, struct pbuf *p)
352{
353 struct ethernetif *ethernetif = netif->state;
354 struct pbuf *q;
355
356 T_RX62N_TX_DESC *desc, *next;
357 uint8_t *buf = NULL, *end;
358 int32_t len, res, pos;
359 uint32_t tfp;
360
361 for (res = p->tot_len, pos = 0; res > 0; res -= len, pos += len) {
362 desc = ethernetif->tx_write;
363
364 while (desc->tact != 0) {
365 tslp_tsk(1);
366 }
367
368 buf = (uint8_t *)desc->tba;
369
370 next = desc + 1;
371 if (next == &rx62n_buf.tx_desc[NUM_IF_RX62N_TXBUF]) {
372 next = rx62n_buf.tx_desc;
373 }
374 ethernetif->tx_write = next;
375
376 len = res;
377 if (len > IF_RX62N_BUF_PAGE_SIZE) {
378 len = IF_RX62N_BUF_PAGE_SIZE;
379 tfp = 0x0;
380 }
381 else
382 tfp = 0x1;
383
384 if (pos == 0)
385 tfp |= 0x2;
386
387#if ETH_PAD_SIZE
388 pbuf_header(p, -ETH_PAD_SIZE); /* drop the padding word */
389#endif
390
391 end = &buf[len];
392 for (q = p; (q != NULL) && (buf < end); buf += q->len, q = q->next) {
393 /* Send the data from the pbuf to the interface, one pbuf at a
394 time. The size of the data in each pbuf is kept in the ->len
395 variable. */
396 memcpy(buf, (uint8_t *)q->payload, q->len);
397 }
398
399 desc->tbl = len;
400 desc->tfp = tfp;
401 desc->tact = 1;
402
403#if ETH_PAD_SIZE
404 pbuf_header(p, ETH_PAD_SIZE); /* reclaim the padding word */
405#endif
406
407 LINK_STATS_INC(link.xmit);
408 }
409
410 if (sil_rew_mem(EDMAC_EDTRR) == 0) {
411 sil_wrw_mem(EDMAC_EDTRR, EDMAC_EDTRR_TR);
412 }
413
414 return ERR_OK;
415}
416
417/**
418 * Should allocate a pbuf and transfer the bytes of the incoming
419 * packet from the interface into the pbuf.
420 *
421 * @param netif the lwip network interface structure for this ethernetif
422 * @return a pbuf filled with the received packet (including MAC header)
423 * NULL on memory error
424 */
425static struct pbuf *
426low_level_input(struct netif *netif)
427{
428 struct ethernetif *ethernetif = netif->state;
429 struct pbuf *p, *q;
430 u16_t pos, len;
431 T_RX62N_RX_DESC *desc;
432
433 desc = ethernetif->rx_read;
434
435 if (desc->ract != 0) {
436 return NULL;
437 }
438
439 /* Obtain the size of the packet and put it into the "len"
440 variable. */
441 len = desc->rfl;
442 if (len == 0) {
443 return NULL;
444 }
445
446#if ETH_PAD_SIZE
447 len += ETH_PAD_SIZE; /* allow room for Ethernet padding */
448#endif
449
450 /* We allocate a pbuf chain of pbufs from the pool. */
451 p = pbuf_alloc(PBUF_RAW, len, PBUF_POOL);
452
453 if (p != NULL) {
454
455#if ETH_PAD_SIZE
456 pbuf_header(p, -ETH_PAD_SIZE); /* drop the padding word */
457#endif
458
459 /* We iterate over the pbuf chain until we have read the entire
460 * packet into the pbuf. */
461 for (q = p, pos = 0; q != NULL; pos += q->len, q = q->next) {
462 /* Read enough bytes to fill this pbuf in the chain. The
463 * available data in the pbuf is given by the q->len
464 * variable.
465 * This does not necessarily have to be a memcpy, you can also preallocate
466 * pbufs for a DMA-enabled MAC and after receiving truncate it to the
467 * actually received size. In this case, ensure the tot_len member of the
468 * pbuf is the sum of the chained pbuf len members.
469 */
470 memcpy(q->payload, (uint8_t *)desc->rba + pos, q->len);
471 }
472
473 desc->rfp = 0;
474 desc->ract = 1;
475
476 desc++;
477 if (desc == &rx62n_buf.rx_desc[NUM_IF_RX62N_RXBUF]) {
478 desc = rx62n_buf.rx_desc;
479 }
480 ethernetif->rx_read = desc;
481
482 if (sil_rew_mem(EDMAC_EDRRR) == 0) {
483 sil_wrw_mem(EDMAC_EDRRR, EDMAC_EDRRR_RR);
484 }
485
486#if ETH_PAD_SIZE
487 pbuf_header(p, ETH_PAD_SIZE); /* reclaim the padding word */
488#endif
489
490 LINK_STATS_INC(link.recv);
491 }
492 else {
493 //drop packet();
494 LINK_STATS_INC(link.memerr);
495 LINK_STATS_INC(link.drop);
496 }
497
498 return p;
499}
500
501/*
502 * rx62n_link -- ƒŠƒ“ƒNó‘Ԃ̕ω»‚ɑ΂·‚鏈—
503 */
504bool_t
505rx62n_link(struct netif *netif)
506{
507 struct ethernetif *ethernetif;
508 PHY_MODE_T mode;
509
510 ethernetif = netif->state;
511
512 if(ethernetif->state == PHY_STATE_NEGOTIATED){
513 ethernetif->link_now = phy_is_link(0);
514 if(!ethernetif->link_now)
515 ethernetif->state = PHY_STATE_RESET;
516 return true;
517 }
518
519 /* PHY‚̏‰Šú‰» */
520 ethernetif->state = phy_initialize(ethernetif->state, 0, &mode);
521 if(ethernetif->state != PHY_STATE_NEGOTIATED){
522 return false;
523 }
524
525 /* ECMRƒŒƒWƒXƒ^‚̐ݒè */
526 rx62n_set_ecmr(netif, mode);
527 return true;
528}
529
530/**
531 * This function should be called when a packet is ready to be read
532 * from the interface. It uses the function low_level_input() that
533 * should handle the actual reception of bytes from the network
534 * interface. Then the type of the received packet is determined and
535 * the appropriate input function is called.
536 *
537 * @param netif the lwip network interface structure for this ethernetif
538 */
539void
540ethernetif_input(struct netif *netif)
541{
542 struct ethernetif *ethernetif;
543 struct eth_hdr *ethhdr;
544 struct pbuf *p;
545
546 ethernetif = netif->state;
547
548 if(ethernetif->link_pre != ethernetif->link_now){
549 if(rx62n_link(netif)){
550 bool_t cng = ethernetif->link_pre != ethernetif->link_now;
551 ethernetif->link_pre = ethernetif->link_now;
552 /* ƒŠƒ“ƒNó‘Ԃɕω»‚ ‚è */
553 if(cng){
554 if (ethernetif->link_pre) {
555 netif_set_link_up(netif);
556 }
557 else {
558 netif_set_link_down(netif);
559 }
560 }
561 }
562
563 if (ethernetif->state != PHY_STATE_NEGOTIATED)
564 sig_sem(ethernetif->sem_rev);
565
566 return;
567 }
568
569 /* move received packet into a new pbuf */
570 p = low_level_input(netif);
571 /* no packet could be read, silently ignore this */
572 if (p == NULL) return;
573 /* points to packet payload, which starts with an Ethernet header */
574 ethhdr = p->payload;
575
576 switch (htons(ethhdr->type)) {
577 /* IP or ARP packet? */
578 case ETHTYPE_IP:
579 case ETHTYPE_ARP:
580#if PPPOE_SUPPORT
581 /* PPPoE packet? */
582 case ETHTYPE_PPPOEDISC:
583 case ETHTYPE_PPPOE:
584#endif /* PPPOE_SUPPORT */
585 /* full packet send to tcpip_thread to process */
586 if (netif->input(p, netif) != ERR_OK) {
587 LWIP_DEBUGF(NETIF_DEBUG, ("ethernetif_input: IP input error\n"));
588 pbuf_free(p);
589 p = NULL;
590 }
591 break;
592
593 default:
594 pbuf_free(p);
595 p = NULL;
596 break;
597 }
598}
599
600struct netif *if_rx62n;
601
602/**
603 * Should be called at the beginning of the program to set up the
604 * network interface. It calls the function low_level_init() to do the
605 * actual setup of the hardware.
606 *
607 * This function should be passed as a parameter to netif_add().
608 *
609 * @param netif the lwip network interface structure for this ethernetif
610 * @return ERR_OK if the loopif is initialized
611 * ERR_MEM if private data couldn't be allocated
612 * any other err_t on error
613 */
614err_t
615ethernetif_init(struct netif *netif)
616{
617 struct ethernetif *ethernetif;
618
619 LWIP_ASSERT("netif != NULL", (netif != NULL));
620
621 if_rx62n = netif;
622 ethernetif = (struct ethernetif *)(((intptr_t)netif) + sizeof(struct netif));
623 if (ethernetif == NULL) {
624 LWIP_DEBUGF(NETIF_DEBUG, ("ethernetif_init: out of memory\n"));
625 return ERR_MEM;
626 }
627
628#if LWIP_NETIF_HOSTNAME
629 /* Initialize interface hostname */
630 netif->hostname = "lwip";
631#endif /* LWIP_NETIF_HOSTNAME */
632
633 /*
634 * Initialize the snmp variables and counters inside the struct netif.
635 * The last argument should be replaced with your link speed, in units
636 * of bits per second.
637 */
638 NETIF_INIT_SNMP(netif, snmp_ifType_ethernet_csmacd, LINK_SPEED_OF_YOUR_NETIF_IN_BPS);
639
640 netif->state = ethernetif;
641 netif->name[0] = IFNAME0;
642 netif->name[1] = IFNAME1;
643 /* We directly use etharp_output() here to save a function call.
644 * You can instead declare your own function an call etharp_output()
645 * from it if you have to do some checks before sending (e.g. if link
646 * is available...) */
647 netif->output = etharp_output;
648 netif->linkoutput = low_level_output;
649
650 ethernetif->ethaddr = (struct eth_addr *)&(netif->hwaddr[0]);
651
652 /* initialize the hardware */
653 low_level_init(netif);
654
655 return ERR_OK;
656}
657
658/*
659* RX62N Ethernet Controler ‘—ŽóMŠ„‚荞‚݃nƒ“ƒhƒ‰
660*/
661
662void
663if_rx62n_trx_handler(void)
664{
665 struct netif *netif;
666 struct ethernetif *ethernetif;
667 uint32_t ecsr, eesr, psr;
668
669 i_begin_int(INTNO_IF_RX62N_TRX);
670
671 netif = if_rx62n;
672 ethernetif = netif->state;
673
674 ecsr = sil_rew_mem(ETHERC_ECSR);
675
676 if (ecsr & ETHERC_ECSR_LCHNG) {
677 /* ETHERC•”Š„‚荞‚Ý—vˆöƒNƒŠƒA */
678 sil_wrw_mem(ETHERC_ECSR, ETHERC_ECSR_LCHNG);
679
680 psr = sil_rew_mem(ETHERC_PSR);
681 ethernetif->link_now = (psr & ETHERC_PSR_LMON) != 0;
682
683 /* ƒŠƒ“ƒNó‘Ԃɕω»‚ ‚è */
684 if (ethernetif->link_pre != ethernetif->link_now) {
685 /* ŽóMŠ„‚荞‚ݏˆ— */
686 isig_sem(ethernetif->sem_rev);
687 }
688 }
689
690 eesr = sil_rew_mem(EDMAC_EESR);
691
692 if (eesr & EDMAC_EESR_FR) {
693 /* DMA•”Š„‚荞‚Ý—vˆöƒNƒŠƒA */
694 sil_wrw_mem(EDMAC_EESR, EDMAC_EESR_FR);
695
696 /* ŽóMŠ„‚荞‚ݏˆ— */
697 isig_sem(ethernetif->sem_rev);
698 }
699 if (eesr & EDMAC_EESR_TC) {
700 /* DMA•”Š„‚荞‚Ý—vˆöƒNƒŠƒA */
701 sil_wrw_mem(EDMAC_EESR, EDMAC_EESR_TC);
702
703 /* ‘—MŠ„‚荞‚ݏˆ— */
704 isig_sem(ethernetif->sem_rev);
705 }
706 if (eesr & (EDMAC_EESR_FROF | EDMAC_EESR_RDE)) {
707 /* DMA•”Š„‚荞‚Ý—vˆöƒNƒŠƒA */
708 sil_wrw_mem(EDMAC_EESR, EDMAC_EESR_FROF | EDMAC_EESR_RDE);
709
710 ethernetif->over_flow = true;
711
712 /* ŽóMŠ„‚荞‚ݏˆ— */
713 isig_sem(ethernetif->sem_rev);
714 }
715
716 i_end_int(INTNO_IF_RX62N_TRX);
717}
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