source: UsbWattMeter/trunk/asp_dcre/pdic/rx600/rx630_uart.c@ 164

Last change on this file since 164 was 164, checked in by coas-nagasima, 6 years ago

TOPPERS/ECNLサンプルアプリ「USB充電器電力計」を追加

  • Property svn:eol-style set to native
  • Property svn:keywords set to Id
  • Property svn:mime-type set to text/x-csrc
File size: 12.0 KB
Line 
1/*
2 * TOPPERS/ASP Kernel
3 * Toyohashi Open Platform for Embedded Real-Time Systems/
4 * Advanced Standard Profile Kernel
5 *
6 * Copyright (C) 2008-2010 by Witz Corporation, JAPAN
7 * Copyright (C) 2013 by Mitsuhiro Matsuura
8 *
9 * ã‹L’˜ìŒ ŽÒ‚́CˆÈ‰º‚Ì(1)`(4)‚ÌðŒ‚ð–ž‚½‚·ê‡‚ÉŒÀ‚èC–{ƒ\ƒtƒgƒEƒF
10 * ƒAi–{ƒ\ƒtƒgƒEƒFƒA‚ð‰ü•Ï‚µ‚½‚à‚Ì‚ðŠÜ‚ށDˆÈ‰º“¯‚¶j‚ðŽg—pE•¡»E‰ü
11 * •ÏEÄ”z•ziˆÈ‰ºC—˜—p‚ƌĂԁj‚·‚邱‚Ƃ𖳏ž‚Å‹–‘ø‚·‚éD
12 * (1) –{ƒ\ƒtƒgƒEƒFƒA‚ðƒ\[ƒXƒR[ƒh‚ÌŒ`‚Å—˜—p‚·‚éê‡‚ɂ́Cã‹L‚Ì’˜ì
13 * Œ •\Ž¦C‚±‚Ì—˜—pðŒ‚¨‚æ‚щº‹L‚Ì–³•ÛØ‹K’肪C‚»‚Ì‚Ü‚Ü‚ÌŒ`‚Ń\[
14 * ƒXƒR[ƒh’†‚ÉŠÜ‚Ü‚ê‚Ä‚¢‚邱‚ƁD
15 * (2) –{ƒ\ƒtƒgƒEƒFƒA‚ðCƒ‰ƒCƒuƒ‰ƒŠŒ`Ž®‚ȂǁC‘¼‚̃\ƒtƒgƒEƒFƒAŠJ”­‚ÉŽg
16 * —p‚Å‚«‚éŒ`‚ōĔz•z‚·‚éê‡‚ɂ́CÄ”z•z‚É”º‚¤ƒhƒLƒ…
17ƒƒ“ƒgi—˜—p
18 * ŽÒƒ}ƒjƒ…
19ƒAƒ‹‚Ȃǁj‚ɁCã‹L‚Ì’˜ìŒ •\Ž¦C‚±‚Ì—˜—pðŒ‚¨‚æ‚щº‹L
20 * ‚Ì–³•ÛØ‹K’è‚ðŒfÚ‚·‚邱‚ƁD
21 * (3) –{ƒ\ƒtƒgƒEƒFƒA‚ðC‹@Ší‚É‘g‚ݍž‚ނȂǁC‘¼‚̃\ƒtƒgƒEƒFƒAŠJ”­‚ÉŽg
22 * —p‚Å‚«‚È‚¢Œ`‚ōĔz•z‚·‚éê‡‚ɂ́CŽŸ‚Ì‚¢‚¸‚ê‚©‚ÌðŒ‚ð–ž‚½‚·‚±
23 * ‚ƁD
24 * (a) Ä”z•z‚É”º‚¤ƒhƒLƒ…
25ƒƒ“ƒgi—˜—pŽÒƒ}ƒjƒ…
26ƒAƒ‹‚Ȃǁj‚ɁCã‹L‚Ì’˜
27 * ìŒ •\Ž¦C‚±‚Ì—˜—pðŒ‚¨‚æ‚щº‹L‚Ì–³•ÛØ‹K’è‚ðŒfÚ‚·‚邱‚ƁD
28 * (b) Ä”z•z‚ÌŒ`‘Ô‚ðC•Ê‚É’è‚ß‚é•û–@‚É‚æ‚Á‚āCTOPPERSƒvƒƒWƒFƒNƒg‚É
29 * •ñ‚·‚邱‚ƁD
30 * (4) –{ƒ\ƒtƒgƒEƒFƒA‚Ì—˜—p‚É‚æ‚è’¼Ú“I‚Ü‚½‚͊ԐړI‚ɐ¶‚¶‚é‚¢‚©‚Ȃ鑹
31 * ŠQ‚©‚ç‚àCã‹L’˜ìŒ ŽÒ‚¨‚æ‚ÑTOPPERSƒvƒƒWƒFƒNƒg‚ð–Ɛӂ·‚邱‚ƁD
32 * ‚Ü‚½C–{ƒ\ƒtƒgƒEƒFƒA‚̃†[ƒU‚Ü‚½‚̓Gƒ“ƒhƒ†[ƒU‚©‚ç‚Ì‚¢‚©‚Ȃ闝
33 * —R‚ÉŠî‚­¿‹‚©‚ç‚àCã‹L’˜ìŒ ŽÒ‚¨‚æ‚ÑTOPPERSƒvƒƒWƒFƒNƒg‚ð
34 * –Ɛӂ·‚邱‚ƁD
35 *
36 * –{ƒ\ƒtƒgƒEƒFƒA‚́C–³•ÛØ‚Å’ñ‹Ÿ‚³‚ê‚Ä‚¢‚é‚à‚Ì‚Å‚ ‚éDã‹L’˜ìŒ ŽÒ‚¨
37 * ‚æ‚ÑTOPPERSƒvƒƒWƒFƒNƒg‚́C–{ƒ\ƒtƒgƒEƒFƒA‚ÉŠÖ‚µ‚āC“Á’è‚ÌŽg—p–Ú“I
38 * ‚ɑ΂·‚é“K‡«‚àŠÜ‚߂āC‚¢‚©‚È‚é•ÛØ‚às‚í‚È‚¢D‚Ü‚½C–{ƒ\ƒtƒgƒEƒF
39 * ƒA‚Ì—˜—p‚É‚æ‚è’¼Ú“I‚Ü‚½‚͊ԐړI‚ɐ¶‚¶‚½‚¢‚©‚Ȃ鑹ŠQ‚ÉŠÖ‚µ‚Ä‚àC‚»
40 * ‚̐ӔC‚𕉂í‚È‚¢D
41 *
42 * @(#) $Id: rx630_uart.c 164 2016-03-07 11:33:50Z coas-nagasima $
43 */
44
45
46/*
47 * UART—p ŠÈˆÕSIOƒhƒ‰ƒCƒo
48 */
49
50#include <sil.h>
51#include <kernel.h>
52#include <t_syslog.h>
53#include "target_syssvc.h"
54#include "rx630_uart.h"
55
56/* ƒVƒŠƒAƒ‹ƒ‚[ƒhƒŒƒWƒXƒ^iSMR) */
57#define CKS UINT_C(0x03)
58#define STOP UINT_C(0x08)
59#define PM UINT_C(0x10)
60#define PE UINT_C(0x20)
61#define CHR UINT_C(0x40)
62#define CM UINT_C(0x80)
63#define ASYNC_7BIT UINT_C(0x00)
64#define ASYNC_8BIT UINT_C(0x40)
65
66/* ƒVƒŠƒAƒ‹ƒRƒ“ƒgƒ[ƒ‹ƒŒƒWƒXƒ^iSCR) */
67#define CKE UINT_C(0x03)
68#define TEIE UINT_C(0x04)
69#define RE UINT_C(0x10)
70#define TE UINT_C(0x20)
71#define RIE UINT_C(0x40)
72#define TIE UINT_C(0x80)
73
74/* ƒVƒŠƒAƒ‹ƒXƒe[ƒ^ƒXƒŒƒWƒXƒ^iSSRj */
75#define TEND UINT_C(0x04)
76#define PER UINT_C(0x08)
77#define FER UINT_C(0x10)
78#define ORER UINT_C(0x20)
79
80/* ƒVƒŠƒAƒ‹Šg’£ƒ‚[ƒhƒŒƒWƒXƒ^iSEMR) */
81#define ACS0 UINT_C(0x01)
82#define ABCS UINT_C(0x10)
83
84#define SCI_SCR_FLG_ENABLE (RE | TE)
85#define SCI_SMR_FLG_ENABLE (STOP | PM | PE | CHR | CM)
86
87/*
88 * ƒVƒŠƒAƒ‹I/Oƒ|[ƒg‰Šú‰»ƒuƒƒbƒN‚Ì’è‹`
89 */
90typedef struct sio_port_initialization_block {
91 volatile uint8_t *ctlreg; /* ƒVƒŠƒAƒ‹ƒRƒ“ƒgƒ[ƒ‹ƒŒƒWƒXƒ^iSCR) */
92 volatile uint8_t *modereg; /* ƒVƒŠƒAƒ‹ƒ‚[ƒhƒŒƒWƒXƒ^iSMR) */
93 volatile uint8_t *extmodereg; /* ƒVƒŠƒAƒ‹Šg’£ƒ‚[ƒhƒŒƒWƒXƒ^iSEMR) */
94 volatile uint8_t *statusreg; /* ƒVƒŠƒAƒ‹ƒXƒe[ƒ^ƒXƒŒƒWƒXƒ^iSSRj */
95 volatile uint8_t *tdreg; /* ƒgƒ‰ƒ“ƒXƒ~ƒbƒgƒf[ƒ^ƒŒƒWƒXƒ^iTDR)*/
96 volatile uint8_t *rdreg; /* ƒŒƒV[ƒuƒf[ƒ^ƒŒƒWƒXƒ^iRDR) */
97 volatile uint8_t *bitratereg; /* ƒrƒbƒgƒŒ[ƒgƒŒƒWƒXƒ^iBRR) */
98 volatile uint32_t *mstpcrreg; /* ƒ‚ƒWƒ…
99[ƒ‹ƒXƒgƒbƒvƒRƒ“ƒgƒ[ƒ‹ƒŒƒWƒXƒ^iMSTPCRj */
100 volatile uint8_t *ssrreg; /* ƒXƒe[ƒ^ƒXƒŒƒWƒXƒ^ */
101 volatile uint8_t *rxiirreg; /* RXI—pŠ„ž‚Ý—v‹ƒŒƒWƒXƒ^ */
102 uint8_t tx_intno; /* ‘—Miƒf[ƒ^ƒGƒ“ƒvƒeƒBjŠ„‚荞‚ݔԍ† */
103 uint8_t rx_intno; /* ŽóMiƒf[ƒ^ƒtƒ‹jŠ„‚荞‚ݔԍ† */
104 uint8_t te_intno; /* ‘—MiI—¹jŠ„‚荞‚ݔԍ† */
105 uint8_t sci_no; /* SCI‚̔ԍ†(SCI0`SCI6) */
106 uint32_t mstpcr_offset; /* MSTPCR‚̑Ήž‚·‚éƒrƒbƒgƒIƒtƒZƒbƒg */
107} SIOPINIB;
108
109/*
110 * ƒVƒŠƒAƒ‹I/Oƒ|[ƒgŠÇ—ƒuƒƒbƒN‚Ì’è‹`
111 */
112struct sio_port_control_block {
113 const SIOPINIB *p_siopinib; /* ƒVƒŠƒAƒ‹I/Oƒ|[ƒg‰Šú‰»ƒuƒƒbƒN */
114 intptr_t exinf; /* Šg’£î•ñ */
115 bool_t openflag; /* ƒI[ƒvƒ“Ï‚݃tƒ‰ƒO */
116 bool_t sendflag; /* ‘—MŠ„ž‚݃Cƒl[ƒuƒ‹ƒtƒ‰ƒO */
117 bool_t getready; /* •¶Žš‚ðŽóM‚µ‚½ó‘Ô */
118 bool_t putready; /* •¶Žš‚𑗐M‚Å‚«‚éó‘Ô */
119 bool_t is_initialized; /* ƒfƒoƒCƒX‰Šú‰»Ï‚݃tƒ‰ƒO */
120};
121
122/*
123 * ƒVƒŠƒAƒ‹I/Oƒ|[ƒgŠÇ—ƒuƒƒbƒN‚̃GƒŠƒA
124 */
125static SIOPCB siopcb_table[TNUM_SIOP];
126
127/* ƒŒƒWƒXƒ^ƒe[ƒuƒ‹ */
128static const SIOPINIB siopinib_table[TNUM_SIOP] =
129{
130 {
131 (volatile uint8_t *)SCI0_SCR_ADDR,
132 (volatile uint8_t *)SCI0_SMR_ADDR,
133 (volatile uint8_t *)SCI0_SEMR_ADDR,
134 (volatile uint8_t *)SCI0_SSR_ADDR,
135 (volatile uint8_t *)SCI0_TDR_ADDR,
136 (volatile uint8_t *)SCI0_RDR_ADDR,
137 (volatile uint8_t *)SCI0_BRR_ADDR,
138 (volatile uint32_t *)SYSTEM_MSTPCRB_ADDR,
139 (volatile uint8_t *)SCI0_SSR_ADDR,
140 (volatile uint8_t *)ICU_IR215_ADDR,
141 INT_SCI0_TXI,
142 INT_SCI0_RXI,
143 INT_SCI0_TEI,
144 0,
145 SYSTEM_MSTPCRB_MSTPB31_BIT,
146 } , /* UART0 */
147#if TNUM_SIOP > 1
148 {
149 (volatile uint8_t *)SCI2_SCR_ADDR,
150 (volatile uint8_t *)SCI2_SMR_ADDR,
151 (volatile uint8_t *)SCI2_SEMR_ADDR,
152 (volatile uint8_t *)SCI2_SSR_ADDR,
153 (volatile uint8_t *)SCI2_TDR_ADDR,
154 (volatile uint8_t *)SCI2_RDR_ADDR,
155 (volatile uint8_t *)SCI2_BRR_ADDR,
156 (volatile uint32_t *)SYSTEM_MSTPCRB_ADDR,
157 (volatile uint8_t *)SCI2_SSR_ADDR,
158 (volatile uint8_t *)ICU_IR223_ADDR,
159 INT_SCI2_TXI,
160 INT_SCI2_RXI,
161 INT_SCI2_TEI,
162 2,
163 SYSTEM_MSTPCRB_MSTPB29_BIT,
164 } , /* UART2 */
165#endif
166};
167
168/*
169 * ƒVƒŠƒAƒ‹I/Oƒ|[ƒgID‚©‚çŠÇ—ƒuƒƒbƒN‚ðŽæ‚èo‚·‚½‚߂̃}ƒNƒ
170 */
171#define INDEX_SIOP(siopid) ((uint_t)((siopid) - 1))
172#define get_siopcb(siopid) (&(siopcb_table[INDEX_SIOP(siopid)]))
173#define get_siopinib(siopid) (&(siopinib_table[INDEX_SIOP(siopid)]))
174
175
176/*
177 * SIOƒhƒ‰ƒCƒo‚̃VƒŠƒAƒ‹ƒ‚[ƒhƒŒƒWƒXƒ^(SMR)
178 */
179static void
180rx630_uart_setmode(const SIOPINIB *p_siopinib, uint8_t bitrate, uint8_t clksrc)
181{
182 volatile uint8_t i;
183
184 /*
185 * SCIƒhƒ‰ƒCƒo‚̏‰Šú‰»ƒ‹[ƒ`ƒ“
186 */
187
188 /*
189 * Š„‚荞‚Ý—v‹æƒŒƒWƒXƒ^‚̐ݒè(ISELRi)
190 *
191 * ƒŠƒZƒbƒg’l‚Æ“¯‚¶’l‚ðÝ’è‚·‚邱‚ƂɂȂ邽‚ß,
192 * ˆ—‚͏ȗª‚·‚é.
193 */
194
195 /*
196 * ƒ‚ƒWƒ…
197[ƒ‹ƒXƒgƒbƒv‹@”\‚̐ݒè
198 */
199 sil_wrh_mem((uint16_t *)SYSTEM_PRCR_ADDR, (uint16_t)0xA502); /* ‘ž‚Ý‹–‰Â */
200 sil_wrw_mem((uint32_t *)p_siopinib->mstpcrreg,
201 sil_rew_mem((uint32_t *)p_siopinib->mstpcrreg) & ~p_siopinib->mstpcr_offset);
202 sil_wrh_mem((uint16_t *)SYSTEM_PRCR_ADDR, (uint16_t)0xA500); /* ‘ž‚Ý‹ÖŽ~ */
203
204 /* ‘—ŽóM‹ÖŽ~, SCKn’[Žq‚Í“üo—̓|[ƒg‚Æ‚µ‚ÄŽg—p */
205 sil_wrb_mem((uint8_t *)p_siopinib->ctlreg, 0x00U);
206
207 /* ƒNƒƒbƒN‘I‘ðƒrƒbƒg(SMR.CKS[1:0]ƒrƒbƒg‚ðÝ’è) */
208 sil_wrb_mem((uint8_t *)p_siopinib->modereg,
209 sil_reb_mem((uint8_t *)p_siopinib->modereg) | clksrc);
210
211 /* SMR‚É‘—M^ ŽóMƒtƒH[ƒ}ƒbƒg‚ðÝ’è) */
212 sil_wrb_mem((uint8_t *)p_siopinib->modereg,
213 sil_reb_mem((uint8_t *)p_siopinib->modereg) & (~SCI_SMR_FLG_ENABLE));
214
215 /* ƒrƒbƒgƒŒ[ƒg‚ðÝ’è */
216 sil_wrb_mem((uint8_t *)p_siopinib->bitratereg, bitrate);
217
218 /* ƒrƒbƒgŠúŠÔ(Šî–{ƒNƒƒbƒN16ƒTƒCƒNƒ‹‚ÌŠúŠÔ‚ª1ƒrƒbƒgŠúŠÔ‚Æ‚È‚é) */
219 for(i = 0; i < 16; i++) { }
220
221 /* ‘—ŽóM‹–‰Â */
222 sil_wrb_mem((uint8_t *)p_siopinib->ctlreg,
223 (sil_reb_mem((uint8_t *)p_siopinib->ctlreg) | SCI_SCR_FLG_ENABLE));
224}
225
226
227/*
228 * SIOƒhƒ‰ƒCƒo‚̏‰Šú‰»ƒ‹[ƒ`ƒ“
229 */
230void
231rx630_uart_initialize(void)
232{
233 SIOPCB *p_siopcb;
234 uint_t i;
235
236 /*
237 * ƒVƒŠƒAƒ‹I/Oƒ|[ƒgŠÇ—ƒuƒƒbƒN‚̏‰Šú‰»
238 */
239 for (p_siopcb = siopcb_table, i = 0; i < TNUM_SIOP; p_siopcb++, i++){
240 p_siopcb->p_siopinib = &(siopinib_table[i]);
241 p_siopcb->openflag = false;
242 p_siopcb->sendflag = false;
243 }
244}
245
246/*
247 * ƒJ[ƒlƒ‹‹N“®Žž‚̃oƒi[o—Í—p‚̏‰Šú‰»
248 */
249void
250rx630_uart_init(ID siopid, uint8_t bitrate, uint8_t clksrc)
251{
252 SIOPCB *p_siopcb = get_siopcb(siopid);
253 const SIOPINIB *p_siopinib = get_siopinib(siopid);
254 /* ‚±‚ÌŽž“_‚ł́Ap_siopcb->p_siopinib‚͏‰Šú‰»‚³‚ê‚Ä‚¢‚È‚¢ */
255
256 /* “ñd‰Šú‰»‚Ì–hŽ~ */
257 p_siopcb->is_initialized = true;
258
259 /* ƒn[ƒhƒEƒFƒA‚̏‰Šú‰»ˆ—‚Æ‘—M‹–‰Â */
260 rx630_uart_setmode(p_siopinib , bitrate, clksrc);
261 sil_wrb_mem((uint8_t *)p_siopinib->ctlreg,
262 (uint8_t)(sil_reb_mem((uint8_t *)p_siopinib->ctlreg) | TE));
263}
264
265/*
266 * ƒVƒŠƒAƒ‹I/Oƒ|[ƒg‚ւ̃|[ƒŠƒ“ƒO‚ł̏o—Í
267 */
268void
269rx630_uart_pol_putc(char c, ID siopid)
270{
271 const SIOPINIB *p_siopinib;
272
273 p_siopinib = get_siopinib(siopid);
274
275 /*
276 * ‘—MƒŒƒWƒXƒ^‚ª‹ó‚É‚È‚é‚Ü‚Å‘Ò‚Â
277 */
278 while((sil_reb_mem((uint8_t *)p_siopinib->ssrreg) & SCI_SSR_TEND_BIT) == 0U);
279
280 sil_wrb_mem((uint8_t *)p_siopinib->tdreg, (uint8_t)c);
281}
282
283/*
284 * ƒVƒŠƒAƒ‹I/Oƒ|[ƒg‚̃I[ƒvƒ“
285 */
286SIOPCB *
287rx630_uart_opn_por
288 (ID siopid, intptr_t exinf, uint8_t bitrate, uint8_t clksrc)
289{
290 SIOPCB *p_siopcb;
291 const SIOPINIB *p_siopinib;
292
293 p_siopcb = get_siopcb(siopid);
294 p_siopinib = p_siopcb->p_siopinib;
295
296 /*
297 * ƒn[ƒhƒEƒFƒA‚̏‰Šú‰»
298 *
299 * Šù‚ɏ‰Šú‰»‚µ‚Ä‚¢‚éê‡‚Í, “ñd‚ɏ‰Šú‰»‚µ‚È‚¢.
300 */
301 if(!(p_siopcb->is_initialized)){
302 rx630_uart_setmode(p_siopinib, bitrate, clksrc);
303 p_siopcb->is_initialized = true;
304 }
305
306 p_siopcb->exinf = exinf;
307 p_siopcb->getready = p_siopcb->putready = false;
308 p_siopcb->openflag = true;
309
310 return (p_siopcb);
311}
312
313/*
314 * ƒVƒŠƒAƒ‹I/Oƒ|[ƒg‚̃Nƒ[ƒY
315 */
316void
317rx630_uart_cls_por(SIOPCB *p_siopcb)
318{
319 /*
320 * UART’âŽ~
321 */
322 sil_wrh_mem((uint16_t *)p_siopcb->p_siopinib->ctlreg, 0x00U);
323 p_siopcb->openflag = false;
324 p_siopcb->is_initialized = false;
325}
326
327/*
328 * ƒVƒŠƒAƒ‹I/Oƒ|[ƒg‚Ö‚Ì•¶Žš‘—M
329 */
330bool_t
331rx630_uart_snd_chr(SIOPCB *p_siopcb, char c)
332{
333 bool_t ercd = false;
334
335 if((sil_reb_mem(
336 (uint8_t *)p_siopcb->p_siopinib->ssrreg) & SCI_SSR_TEND_BIT) != 0){
337 sil_wrb_mem((uint8_t *)p_siopcb->p_siopinib->tdreg, (uint8_t)c);
338 ercd = true;
339 }
340
341 return ercd;
342}
343
344/*
345 * ƒVƒŠƒAƒ‹I/Oƒ|[ƒg‚©‚ç‚Ì•¶ŽšŽóM
346 */
347int_t
348rx630_uart_rcv_chr(SIOPCB *p_siopcb)
349{
350 int_t c = -1;
351
352 /*
353 * ŽóMƒtƒ‰ƒO‚ªON‚Ì‚Æ‚«‚Ì‚ÝŽóMƒoƒbƒtƒ@‚©‚當Žš‚ðŽæ“¾‚·‚é.
354 * ‚±‚ê‚Í, ƒ|[ƒŠƒ“ƒOŽóM‚ɑΉž‚·‚邽‚ß‚Å‚ ‚é.
355 * ‚µ‚©‚µ, RX600ƒVƒŠ[ƒY‚Å‚ÍŽóMƒtƒ‰ƒO‚ª‚È‚¢‚±‚Æ, ƒVƒXƒeƒ€ƒT[ƒrƒX
356 * ‚Å‚ÍŽóMŠ„ž‚Ý‚Ì’†‚©‚炵‚©ƒf[ƒ^‚ðŽóM‚µ‚É—ˆ‚È‚¢‚±‚Æ‚©‚ç, í‚É
357 * ŽóMƒoƒbƒtƒ@‚©‚當Žš‚ðŽæ“¾‚·‚é.
358 */
359 c = (int)(sil_reb_mem((uint8_t *)p_siopcb->p_siopinib->rdreg));
360
361 return c;
362}
363
364/*
365 * ƒVƒŠƒAƒ‹I/Oƒ|[ƒg‚©‚ç‚̃R[ƒ‹ƒoƒbƒN‚Ì‹–‰Â
366 */
367void
368rx630_uart_ena_cbr(SIOPCB *p_siopcb, uint_t cbrtn)
369{
370 switch (cbrtn) {
371 case SIO_RDY_SND:
372 sil_wrb_mem((uint8_t *)p_siopcb->p_siopinib->ctlreg,
373 (sil_reb_mem((uint8_t *)p_siopcb->p_siopinib->ctlreg) | SCI_SCR_TEIE_BIT));
374 break;
375 case SIO_RDY_RCV:
376 sil_wrb_mem((uint8_t *)p_siopcb->p_siopinib->ctlreg,
377 (sil_reb_mem((uint8_t *)p_siopcb->p_siopinib->ctlreg) | SCI_SCR_RIE_BIT));
378 break;
379 default:
380 assert(1);
381 break;
382 }
383}
384
385/*
386 * ƒVƒŠƒAƒ‹I/Oƒ|[ƒg‚©‚ç‚̃R[ƒ‹ƒoƒbƒN‚Ì‹ÖŽ~
387 */
388void
389rx630_uart_dis_cbr(SIOPCB *p_siopcb, uint_t cbrtn)
390{
391 switch (cbrtn) {
392 case SIO_RDY_SND:
393 sil_wrb_mem((uint8_t *)p_siopcb->p_siopinib->ctlreg,
394 (sil_reb_mem((uint8_t *)p_siopcb->p_siopinib->ctlreg) & (~SCI_SCR_TEIE_BIT)));
395 break;
396 case SIO_RDY_RCV:
397 sil_wrb_mem((uint8_t *)p_siopcb->p_siopinib->ctlreg,
398 (sil_reb_mem((uint8_t *)p_siopcb->p_siopinib->ctlreg) & (~SCI_SCR_RIE_BIT)));
399 break;
400 default:
401 assert(1);
402 break;
403 }
404}
405
406/*
407 * SIO‚ÌŠ„ž‚݃T[ƒrƒXƒ‹[ƒ`ƒ“
408 */
409void
410rx630_uart_tx_isr(ID siopid)
411{
412 SIOPCB *p_siopcb = get_siopcb(siopid);
413
414 if((sil_reb_mem(
415 (void *)p_siopcb->p_siopinib->ssrreg) & SCI_SSR_TEND_BIT) != 0U){
416 /*
417 * ‘—M‰Â”\ƒR[ƒ‹ƒoƒbƒNƒ‹[ƒ`ƒ“‚ðŒÄ‚яo‚·D
418 */
419 rx630_uart_irdy_snd(p_siopcb->exinf);
420 }
421}
422
423void
424rx630_uart_rx_isr(ID siopid)
425{
426 SIOPCB *p_siopcb = get_siopcb(siopid);
427
428 /*
429 * ŽóMƒtƒ‰ƒO‚ªON‚Ì‚Æ‚«‚Ì‚ÝŽóM’Ê’mƒR[ƒ‹ƒoƒbƒNƒ‹[ƒ`ƒ“‚ðŒÄ‚яo‚·.
430 * ‚µ‚©‚µ, RX600ƒVƒŠ[ƒY‚Å‚ÍŽóMƒtƒ‰ƒO‚ª‚È‚¢‚½‚ß, í‚ÉŽóM’Ê’m
431 * ƒR[ƒ‹ƒoƒbƒNƒ‹[ƒ`ƒ“‚ðŒÄ‚яo‚·.
432 * ‚±‚±‚Å‚ÍŽóMŠ„ž‚Ý‚Ì”­¶‚ðM‚¶‚é.
433 */
434 /*
435 * ŽóM’Ê’mƒR[ƒ‹ƒoƒbƒNƒ‹[ƒ`ƒ“‚ðŒÄ‚яo‚·D
436 */
437 rx630_uart_irdy_rcv(p_siopcb->exinf);
438}
439
440
441/*
442 * ƒ|[ƒg”ԍ†‚©‚çŠÇ—ƒuƒƒbƒN‚̐擪”Ô’n‚Ö‚Ì•ÏŠ·
443 */
444SIOPCB *
445rx630_uart_get_siopcb(ID siopid) {
446 SIOPCB *p_siopcb = get_siopcb(siopid);
447 return(p_siopcb);
448}
449
450/*
451 * ŠÇ—ƒuƒƒbƒN‚̐擪”Ô’n‚©‚çŽóMŠ„ž‚ݔԍ†‚Ö‚Ì•ÏŠ·
452 */
453INTNO
454rx630_uart_intno_rx(SIOPCB *p_siopcb) {
455 INTNO intno = p_siopcb->p_siopinib->rx_intno;
456 return(intno);
457}
458
459/*
460 * ŠÇ—ƒuƒƒbƒN‚̐擪”Ô’n‚©‚ç‘—MŠ„ž‚ݔԍ†‚Ö‚Ì•ÏŠ·
461 */
462INTNO
463rx630_uart_intno_tx(SIOPCB *p_siopcb) {
464 INTNO intno = p_siopcb->p_siopinib->te_intno;
465 return(intno);
466}
Note: See TracBrowser for help on using the repository browser.