[270] | 1 | /* mbed Microcontroller Library
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| 2 | * Copyright (c) 2006-2012 ARM Limited
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| 3 | *
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| 4 | * Permission is hereby granted, free of charge, to any person obtaining a copy
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| 5 | * of this software and associated documentation files (the "Software"), to deal
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| 6 | * in the Software without restriction, including without limitation the rights
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| 7 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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| 8 | * copies of the Software, and to permit persons to whom the Software is
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| 9 | * furnished to do so, subject to the following conditions:
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| 10 | *
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| 11 | * The above copyright notice and this permission notice shall be included in
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| 12 | * all copies or substantial portions of the Software.
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| 13 | *
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| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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| 17 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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| 18 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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| 19 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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| 20 | * SOFTWARE.
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| 21 | */
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| 22 |
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| 23 | /* Introduction
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| 24 | * ------------
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| 25 | * SD and MMC cards support a number of interfaces, but common to them all
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| 26 | * is one based on SPI. This is the one I'm implmenting because it means
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| 27 | * it is much more portable even though not so performant, and we already
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| 28 | * have the mbed SPI Interface!
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| 29 | *
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| 30 | * The main reference I'm using is Chapter 7, "SPI Mode" of:
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| 31 | * http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
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| 32 | *
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| 33 | * SPI Startup
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| 34 | * -----------
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| 35 | * The SD card powers up in SD mode. The SPI interface mode is selected by
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| 36 | * asserting CS low and sending the reset command (CMD0). The card will
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| 37 | * respond with a (R1) response.
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| 38 | *
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| 39 | * CMD8 is optionally sent to determine the voltage range supported, and
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| 40 | * indirectly determine whether it is a version 1.x SD/non-SD card or
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| 41 | * version 2.x. I'll just ignore this for now.
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| 42 | *
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| 43 | * ACMD41 is repeatedly issued to initialise the card, until "in idle"
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| 44 | * (bit 0) of the R1 response goes to '0', indicating it is initialised.
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| 45 | *
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| 46 | * You should also indicate whether the host supports High Capicity cards,
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| 47 | * and check whether the card is high capacity - i'll also ignore this
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| 48 | *
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| 49 | * SPI Protocol
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| 50 | * ------------
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| 51 | * The SD SPI protocol is based on transactions made up of 8-bit words, with
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| 52 | * the host starting every bus transaction by asserting the CS signal low. The
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| 53 | * card always responds to commands, data blocks and errors.
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| 54 | *
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| 55 | * The protocol supports a CRC, but by default it is off (except for the
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| 56 | * first reset CMD0, where the CRC can just be pre-calculated, and CMD8)
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| 57 | * I'll leave the CRC off I think!
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| 58 | *
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| 59 | * Standard capacity cards have variable data block sizes, whereas High
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| 60 | * Capacity cards fix the size of data block to 512 bytes. I'll therefore
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| 61 | * just always use the Standard Capacity cards with a block size of 512 bytes.
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| 62 | * This is set with CMD16.
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| 63 | *
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| 64 | * You can read and write single blocks (CMD17, CMD25) or multiple blocks
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| 65 | * (CMD18, CMD25). For simplicity, I'll just use single block accesses. When
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| 66 | * the card gets a read command, it responds with a response token, and then
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| 67 | * a data token or an error.
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| 68 | *
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| 69 | * SPI Command Format
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| 70 | * ------------------
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| 71 | * Commands are 6-bytes long, containing the command, 32-bit argument, and CRC.
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| 72 | *
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| 73 | * +---------------+------------+------------+-----------+----------+--------------+
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| 74 | * | 01 | cmd[5:0] | arg[31:24] | arg[23:16] | arg[15:8] | arg[7:0] | crc[6:0] | 1 |
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| 75 | * +---------------+------------+------------+-----------+----------+--------------+
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| 76 | *
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| 77 | * As I'm not using CRC, I can fix that byte to what is needed for CMD0 (0x95)
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| 78 | *
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| 79 | * All Application Specific commands shall be preceded with APP_CMD (CMD55).
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| 80 | *
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| 81 | * SPI Response Format
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| 82 | * -------------------
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| 83 | * The main response format (R1) is a status byte (normally zero). Key flags:
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| 84 | * idle - 1 if the card is in an idle state/initialising
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| 85 | * cmd - 1 if an illegal command code was detected
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| 86 | *
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| 87 | * +-------------------------------------------------+
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| 88 | * R1 | 0 | arg | addr | seq | crc | cmd | erase | idle |
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| 89 | * +-------------------------------------------------+
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| 90 | *
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| 91 | * R1b is the same, except it is followed by a busy signal (zeros) until
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| 92 | * the first non-zero byte when it is ready again.
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| 93 | *
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| 94 | * Data Response Token
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| 95 | * -------------------
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| 96 | * Every data block written to the card is acknowledged by a byte
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| 97 | * response token
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| 98 | *
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| 99 | * +----------------------+
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| 100 | * | xxx | 0 | status | 1 |
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| 101 | * +----------------------+
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| 102 | * 010 - OK!
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| 103 | * 101 - CRC Error
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| 104 | * 110 - Write Error
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| 105 | *
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| 106 | * Single Block Read and Write
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| 107 | * ---------------------------
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| 108 | *
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| 109 | * Block transfers have a byte header, followed by the data, followed
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| 110 | * by a 16-bit CRC. In our case, the data will always be 512 bytes.
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| 111 | *
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| 112 | * +------+---------+---------+- - - -+---------+-----------+----------+
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| 113 | * | 0xFE | data[0] | data[1] | | data[n] | crc[15:8] | crc[7:0] |
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| 114 | * +------+---------+---------+- - - -+---------+-----------+----------+
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| 115 | */
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| 116 | #include "sdfs.h"
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[435] | 117 | #include "diskio.h"
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[270] | 118 | //#include "mbed_debug.h"
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[429] | 119 | #include "mbed_wait_api.h"
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[270] | 120 |
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[435] | 121 | void sdfs_debug(const char *fmt, ...);
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| 122 | #define debug(...) sdfs_debug(__VA_ARGS__)
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| 123 | #define debug_if(cond, ...) if (cond) { sdfs_debug(__VA_ARGS__); }
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[270] | 124 |
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| 125 | static int sdfs_initialise_card_v1(sdfs_t *obj);
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| 126 | static int sdfs_initialise_card_v2(sdfs_t *obj);
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| 127 | static int sdfs__cmd(sdfs_t *obj, int cmd, int arg);
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| 128 | static int sdfs__cmd8(sdfs_t *obj);
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| 129 | static int sdfs__cmd58(sdfs_t *obj);
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| 130 | static uint64_t sdfs__sd_sectors(sdfs_t *obj);
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| 131 | static int sdfs__write(sdfs_t *obj, const uint8_t*buffer, uint32_t length);
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| 132 | static int sdfs__read(sdfs_t *obj, uint8_t *buffer, uint32_t length);
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| 133 |
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| 134 | #define SD_COMMAND_TIMEOUT 5000
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| 135 |
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| 136 | #define SD_DBG 0
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| 137 |
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[435] | 138 | void sdfs_init(sdfs_t *obj, PinName mosi, PinName miso, PinName sclk, PinName cs, const char* name)
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[270] | 139 | {
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| 140 | obj->name = name;
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| 141 | spi_init(&obj->_spi, mosi, miso, sclk, NC);
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| 142 | gpio_init_out(&obj->_cs, cs);
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| 143 | gpio_write(&obj->_cs, 1);
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| 144 |
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| 145 | // Set default to 100kHz for initialisation and 1MHz for data transfer
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| 146 | obj->_init_sck = 100000;
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| 147 | obj->_transfer_sck = 1000000;
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[435] | 148 | obj->_is_initialized = STA_NOINIT;
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[270] | 149 | }
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| 150 |
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| 151 | #define R1_IDLE_STATE (1 << 0)
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| 152 | #define R1_ERASE_RESET (1 << 1)
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| 153 | #define R1_ILLEGAL_COMMAND (1 << 2)
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| 154 | #define R1_COM_CRC_ERROR (1 << 3)
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| 155 | #define R1_ERASE_SEQUENCE_ERROR (1 << 4)
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| 156 | #define R1_ADDRESS_ERROR (1 << 5)
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| 157 | #define R1_PARAMETER_ERROR (1 << 6)
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| 158 |
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| 159 | int sdfs_initialise_card(sdfs_t *obj)
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| 160 | {
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| 161 | spi_format(&obj->_spi, 8, 0, 0);
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| 162 | // Set to 100kHz for initialisation, and clock card with cs = 1
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| 163 | spi_frequency(&obj->_spi, obj->_init_sck);
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| 164 | gpio_write(&obj->_cs, 1);
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| 165 | for (int i = 0; i < 16; i++) {
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| 166 | spi_master_write(&obj->_spi, 0xFF);
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| 167 | }
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| 168 |
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| 169 | // send CMD0, should return with all zeros except IDLE STATE set (bit 0)
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| 170 | if (sdfs__cmd(obj, 0, 0) != R1_IDLE_STATE) {
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| 171 | debug("No disk, or could not put SD card in to SPI idle state\n");
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[435] | 172 | return CT_FAIL;
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[270] | 173 | }
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| 174 |
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| 175 | // send CMD8 to determine whther it is ver 2.x
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| 176 | int r = sdfs__cmd8(obj);
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| 177 | if (r == R1_IDLE_STATE) {
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| 178 | return sdfs_initialise_card_v2(obj);
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| 179 | }
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| 180 | else if (r == (R1_IDLE_STATE | R1_ILLEGAL_COMMAND)) {
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| 181 | return sdfs_initialise_card_v1(obj);
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| 182 | }
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| 183 | else {
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| 184 | debug("Not in idle state after sending CMD8 (not an SD card?)\n");
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[435] | 185 | return CT_FAIL;
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[270] | 186 | }
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| 187 | }
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| 188 |
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| 189 | static int sdfs_initialise_card_v1(sdfs_t *obj)
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| 190 | {
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[435] | 191 | sdfs__cmd(obj, 55, 0);
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| 192 | if (sdfs__cmd(obj, 41, 0) <= 1) {
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| 193 | obj->cdv = 512;
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| 194 | debug_if(SD_DBG, "\n\rInit: SEDCARD_V1\n\r");
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| 195 | for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
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| 196 | sdfs__cmd(obj, 55, 0);
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| 197 | if (sdfs__cmd(obj, 41, 0) == 0) {
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| 198 | break;
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| 199 | }
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[270] | 200 | }
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[435] | 201 | return CT_SD1;
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[270] | 202 | }
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[435] | 203 | else {
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| 204 | for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
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| 205 | if (sdfs__cmd(obj, 1, 0) == 0)
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| 206 | break;
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| 207 | }
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| 208 | return CT_MMC;
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| 209 | }
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| 210 | //if (!Timer1 || sdfs__cmd(obj, 16, 512) != 0) /* Set block length: 512 */
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| 211 | // ty = 0;
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[270] | 212 |
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| 213 | debug("Timeout waiting for v1.x card\n");
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[435] | 214 | return CT_FAIL;
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[270] | 215 | }
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| 216 |
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| 217 | static int sdfs_initialise_card_v2(sdfs_t *obj)
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| 218 | {
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[435] | 219 | int n;
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| 220 | uint8_t ocr[4];
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| 221 |
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| 222 | /* Get 32 bit return value of R7 resp */
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| 223 | for (n = 0; n < 4; n++) ocr[n] = spi_master_write(&obj->_spi, 0xFF);
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[270] | 224 | for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
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| 225 | sdfs__cmd(obj, 55, 0);
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| 226 | if (sdfs__cmd(obj, 41, 0x40000000) == 0) {
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[435] | 227 | if (sdfs__cmd58(obj) == 0) {
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| 228 | for (n = 0; n < 4; n++) ocr[n] = spi_master_write(&obj->_spi, 0xFF);
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| 229 | debug_if(SD_DBG, "\n\rInit: SDCARD_V2\n\r");
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| 230 | obj->cdv = 1;
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| 231 | return (ocr[0] & 0x40) ? CT_SD2 | CT_BLOCK : CT_SD2;
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| 232 | }
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[270] | 233 | }
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[435] | 234 | wait_ms(50);
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[270] | 235 | }
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| 236 |
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| 237 | debug("Timeout waiting for v2.x card\n");
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[435] | 238 | return CT_FAIL;
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[270] | 239 | }
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| 240 |
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| 241 | int sdfs_initialize(sdfs_t *obj)
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| 242 | {
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[435] | 243 | obj->_is_initialized |= STA_NOINIT;
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| 244 |
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| 245 | obj->_card_type = sdfs_initialise_card(obj);
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| 246 | if (obj->_card_type == 0) {
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[270] | 247 | debug("Fail to initialize card\n");
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| 248 | return 1;
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| 249 | }
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[435] | 250 | debug_if(SD_DBG, "init card = %x\n", obj->_is_initialized);
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| 251 |
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[270] | 252 | obj->_sectors = sdfs__sd_sectors(obj);
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| 253 |
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[435] | 254 | if (sdfs__cmdx(obj, 10, 0) != 0 /* READ_CID */
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| 255 | || sdfs__read(obj, obj->_cid, 16) != 0) {
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| 256 | obj->_card_type = CT_FAIL;
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| 257 | debug("Fail to read cid\n");
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| 258 | return 1;
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| 259 | }
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| 260 |
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[270] | 261 | // Set block length to 512 (CMD16)
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| 262 | if (sdfs__cmd(obj, 16, 512) != 0) {
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[435] | 263 | obj->_card_type = CT_FAIL;
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[270] | 264 | debug("Set 512-byte block timed out\n");
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| 265 | return 1;
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| 266 | }
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| 267 |
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[435] | 268 | obj->_is_initialized &= ~STA_NOINIT;
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| 269 |
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[270] | 270 | // Set SCK for data transfer
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| 271 | spi_frequency(&obj->_spi, obj->_transfer_sck);
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| 272 | return 0;
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| 273 | }
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| 274 |
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| 275 | int sdfs_write(sdfs_t *obj, const uint8_t *buffer, uint32_t block_number, uint32_t count)
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| 276 | {
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[435] | 277 | if (obj->_is_initialized & (STA_NOINIT | STA_PROTECT)) {
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[270] | 278 | return -1;
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| 279 | }
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| 280 |
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| 281 | for (uint32_t b = block_number; b < block_number + count; b++) {
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| 282 | // set write address for single block (CMD24)
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| 283 | if (sdfs__cmd(obj, 24, b * obj->cdv) != 0) {
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| 284 | return 1;
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| 285 | }
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| 286 |
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| 287 | // send the data block
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| 288 | sdfs__write(obj, buffer, 512);
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| 289 | buffer += 512;
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| 290 | }
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| 291 |
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| 292 | return 0;
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| 293 | }
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| 294 |
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| 295 | int sdfs_read(sdfs_t *obj, uint8_t *buffer, uint32_t block_number, uint32_t count)
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| 296 | {
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[435] | 297 | if (obj->_is_initialized & STA_NOINIT) {
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[270] | 298 | return -1;
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| 299 | }
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| 300 |
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| 301 | for (uint32_t b = block_number; b < block_number + count; b++) {
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| 302 | // set read address for single block (CMD17)
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| 303 | if (sdfs__cmd(obj, 17, b * obj->cdv) != 0) {
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| 304 | return 1;
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| 305 | }
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| 306 |
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| 307 | // receive the data
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| 308 | sdfs__read(obj, buffer, 512);
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| 309 | buffer += 512;
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| 310 | }
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| 311 |
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| 312 | return 0;
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| 313 | }
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| 314 |
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| 315 | int sdfs_status(sdfs_t *obj)
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| 316 | {
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| 317 | // FATFileSystem::disk_status() returns 0 when initialized
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[435] | 318 | if ((obj->_is_initialized & STA_NOINIT) == 0) {
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[270] | 319 | return 0;
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| 320 | }
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| 321 | else {
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| 322 | return 1;
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| 323 | }
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| 324 | }
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[435] | 325 |
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[270] | 326 | uint64_t sdfs_sectors(sdfs_t *obj) { return obj->_sectors; }
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| 327 |
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| 328 |
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| 329 | // PRIVATE FUNCTIONS
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| 330 | static int sdfs__cmd(sdfs_t *obj, int cmd, int arg)
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| 331 | {
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| 332 | gpio_write(&obj->_cs, 0);
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| 333 |
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| 334 | // send a command
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| 335 | spi_master_write(&obj->_spi, 0x40 | cmd);
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| 336 | spi_master_write(&obj->_spi, arg >> 24);
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| 337 | spi_master_write(&obj->_spi, arg >> 16);
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| 338 | spi_master_write(&obj->_spi, arg >> 8);
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| 339 | spi_master_write(&obj->_spi, arg >> 0);
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| 340 | spi_master_write(&obj->_spi, 0x95);
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| 341 |
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| 342 | // wait for the repsonse (response[7] == 0)
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| 343 | for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
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| 344 | int response = spi_master_write(&obj->_spi, 0xFF);
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| 345 | if (!(response & 0x80)) {
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| 346 | gpio_write(&obj->_cs, 1);
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| 347 | spi_master_write(&obj->_spi, 0xFF);
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| 348 | return response;
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| 349 | }
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| 350 | }
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| 351 | gpio_write(&obj->_cs, 1);
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| 352 | spi_master_write(&obj->_spi, 0xFF);
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| 353 | return -1; // timeout
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| 354 | }
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| 355 |
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| 356 | int sdfs__cmdx(sdfs_t *obj, int cmd, int arg)
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| 357 | {
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| 358 | gpio_write(&obj->_cs, 0);
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| 359 |
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| 360 | // send a command
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| 361 | spi_master_write(&obj->_spi, 0x40 | cmd);
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| 362 | spi_master_write(&obj->_spi, arg >> 24);
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| 363 | spi_master_write(&obj->_spi, arg >> 16);
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| 364 | spi_master_write(&obj->_spi, arg >> 8);
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| 365 | spi_master_write(&obj->_spi, arg >> 0);
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| 366 | spi_master_write(&obj->_spi, 0x95);
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| 367 |
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| 368 | // wait for the repsonse (response[7] == 0)
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| 369 | for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
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| 370 | int response = spi_master_write(&obj->_spi, 0xFF);
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| 371 | if (!(response & 0x80)) {
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| 372 | return response;
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| 373 | }
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| 374 | }
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| 375 | gpio_write(&obj->_cs, 1);
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| 376 | spi_master_write(&obj->_spi, 0xFF);
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| 377 | return -1; // timeout
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| 378 | }
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| 379 |
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| 380 | static int sdfs__cmd58(sdfs_t *obj)
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| 381 | {
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| 382 | gpio_write(&obj->_cs, 0);
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| 383 | int arg = 0;
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| 384 |
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| 385 | // send a command
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| 386 | spi_master_write(&obj->_spi, 0x40 | 58);
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| 387 | spi_master_write(&obj->_spi, arg >> 24);
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| 388 | spi_master_write(&obj->_spi, arg >> 16);
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| 389 | spi_master_write(&obj->_spi, arg >> 8);
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| 390 | spi_master_write(&obj->_spi, arg >> 0);
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| 391 | spi_master_write(&obj->_spi, 0x95);
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| 392 |
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| 393 | // wait for the repsonse (response[7] == 0)
|
---|
| 394 | for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
|
---|
| 395 | int response = spi_master_write(&obj->_spi, 0xFF);
|
---|
| 396 | if (!(response & 0x80)) {
|
---|
| 397 | int ocr = spi_master_write(&obj->_spi, 0xFF) << 24;
|
---|
| 398 | ocr |= spi_master_write(&obj->_spi, 0xFF) << 16;
|
---|
| 399 | ocr |= spi_master_write(&obj->_spi, 0xFF) << 8;
|
---|
| 400 | ocr |= spi_master_write(&obj->_spi, 0xFF) << 0;
|
---|
| 401 | gpio_write(&obj->_cs, 1);
|
---|
| 402 | spi_master_write(&obj->_spi, 0xFF);
|
---|
| 403 | return response;
|
---|
| 404 | }
|
---|
| 405 | }
|
---|
| 406 | gpio_write(&obj->_cs, 1);
|
---|
| 407 | spi_master_write(&obj->_spi, 0xFF);
|
---|
| 408 | return -1; // timeout
|
---|
| 409 | }
|
---|
| 410 |
|
---|
| 411 | static int sdfs__cmd8(sdfs_t *obj)
|
---|
| 412 | {
|
---|
| 413 | gpio_write(&obj->_cs, 0);
|
---|
| 414 |
|
---|
| 415 | // send a command
|
---|
| 416 | spi_master_write(&obj->_spi, 0x40 | 8); // CMD8
|
---|
| 417 | spi_master_write(&obj->_spi, 0x00); // reserved
|
---|
| 418 | spi_master_write(&obj->_spi, 0x00); // reserved
|
---|
| 419 | spi_master_write(&obj->_spi, 0x01); // 3.3v
|
---|
| 420 | spi_master_write(&obj->_spi, 0xAA); // check pattern
|
---|
| 421 | spi_master_write(&obj->_spi, 0x87); // crc
|
---|
| 422 |
|
---|
| 423 | // wait for the repsonse (response[7] == 0)
|
---|
| 424 | for (int i = 0; i < SD_COMMAND_TIMEOUT * 1000; i++) {
|
---|
| 425 | char response[5];
|
---|
| 426 | response[0] = spi_master_write(&obj->_spi, 0xFF);
|
---|
| 427 | if (!(response[0] & 0x80)) {
|
---|
| 428 | for (int j = 1; j < 5; j++) {
|
---|
| 429 | response[i] = spi_master_write(&obj->_spi, 0xFF);
|
---|
| 430 | }
|
---|
| 431 | gpio_write(&obj->_cs, 1);
|
---|
| 432 | spi_master_write(&obj->_spi, 0xFF);
|
---|
| 433 | return response[0];
|
---|
| 434 | }
|
---|
| 435 | }
|
---|
| 436 | gpio_write(&obj->_cs, 1);
|
---|
| 437 | spi_master_write(&obj->_spi, 0xFF);
|
---|
| 438 | return -1; // timeout
|
---|
| 439 | }
|
---|
| 440 |
|
---|
| 441 | static int sdfs__read(sdfs_t *obj, uint8_t *buffer, uint32_t length)
|
---|
| 442 | {
|
---|
| 443 | gpio_write(&obj->_cs, 0);
|
---|
| 444 |
|
---|
| 445 | // read until start byte (0xFF)
|
---|
| 446 | while (spi_master_write(&obj->_spi, 0xFF) != 0xFE);
|
---|
| 447 |
|
---|
| 448 | // read data
|
---|
| 449 | for (int i = 0; i < length; i++) {
|
---|
| 450 | buffer[i] = spi_master_write(&obj->_spi, 0xFF);
|
---|
| 451 | }
|
---|
| 452 | spi_master_write(&obj->_spi, 0xFF); // checksum
|
---|
| 453 | spi_master_write(&obj->_spi, 0xFF);
|
---|
| 454 |
|
---|
| 455 | gpio_write(&obj->_cs, 1);
|
---|
| 456 | spi_master_write(&obj->_spi, 0xFF);
|
---|
| 457 | return 0;
|
---|
| 458 | }
|
---|
| 459 |
|
---|
| 460 | static int sdfs__write(sdfs_t *obj, const uint8_t*buffer, uint32_t length)
|
---|
| 461 | {
|
---|
| 462 | gpio_write(&obj->_cs, 0);
|
---|
| 463 |
|
---|
| 464 | // indicate start of block
|
---|
| 465 | spi_master_write(&obj->_spi, 0xFE);
|
---|
| 466 |
|
---|
| 467 | // write the data
|
---|
| 468 | for (int i = 0; i < length; i++) {
|
---|
| 469 | spi_master_write(&obj->_spi, buffer[i]);
|
---|
| 470 | }
|
---|
| 471 |
|
---|
| 472 | // write the checksum
|
---|
| 473 | spi_master_write(&obj->_spi, 0xFF);
|
---|
| 474 | spi_master_write(&obj->_spi, 0xFF);
|
---|
| 475 |
|
---|
| 476 | // check the response token
|
---|
| 477 | if ((spi_master_write(&obj->_spi, 0xFF) & 0x1F) != 0x05) {
|
---|
| 478 | gpio_write(&obj->_cs, 1);
|
---|
| 479 | spi_master_write(&obj->_spi, 0xFF);
|
---|
| 480 | return 1;
|
---|
| 481 | }
|
---|
| 482 |
|
---|
| 483 | // wait for write to finish
|
---|
| 484 | while (spi_master_write(&obj->_spi, 0xFF) == 0);
|
---|
| 485 |
|
---|
| 486 | gpio_write(&obj->_cs, 1);
|
---|
| 487 | spi_master_write(&obj->_spi, 0xFF);
|
---|
| 488 | return 0;
|
---|
| 489 | }
|
---|
| 490 |
|
---|
| 491 | static uint32_t sdfs_ext_bits(sdfs_t *obj, unsigned char *data, int msb, int lsb)
|
---|
| 492 | {
|
---|
| 493 | uint32_t bits = 0;
|
---|
| 494 | uint32_t size = 1 + msb - lsb;
|
---|
| 495 | for (uint32_t i = 0; i < size; i++) {
|
---|
| 496 | uint32_t position = lsb + i;
|
---|
| 497 | uint32_t byte = 15 - (position >> 3);
|
---|
| 498 | uint32_t bit = position & 0x7;
|
---|
| 499 | uint32_t value = (data[byte] >> bit) & 1;
|
---|
| 500 | bits |= value << i;
|
---|
| 501 | }
|
---|
| 502 | return bits;
|
---|
| 503 | }
|
---|
| 504 |
|
---|
| 505 | static uint64_t sdfs__sd_sectors(sdfs_t *obj)
|
---|
| 506 | {
|
---|
| 507 | uint32_t c_size, c_size_mult, read_bl_len;
|
---|
[435] | 508 | uint32_t mult, blocknr;
|
---|
[270] | 509 | uint32_t hc_c_size;
|
---|
| 510 | uint64_t blocks;
|
---|
| 511 |
|
---|
| 512 | // CMD9, Response R2 (R1 byte + 16-byte block read)
|
---|
| 513 | if (sdfs__cmdx(obj, 9, 0) != 0) {
|
---|
| 514 | debug("Didn't get a response from the disk\n");
|
---|
| 515 | return 0;
|
---|
| 516 | }
|
---|
| 517 |
|
---|
[435] | 518 | if (sdfs__read(obj, obj->_csd, 16) != 0) {
|
---|
[270] | 519 | debug("Couldn't read csd response from disk\n");
|
---|
| 520 | return 0;
|
---|
| 521 | }
|
---|
| 522 |
|
---|
| 523 | // csd_structure : csd[127:126]
|
---|
| 524 | // c_size : csd[73:62]
|
---|
| 525 | // c_size_mult : csd[49:47]
|
---|
| 526 | // read_bl_len : csd[83:80] - the *maximum* read block length
|
---|
| 527 |
|
---|
[435] | 528 | int csd_structure = sdfs_ext_bits(obj, obj->_csd, 127, 126);
|
---|
[270] | 529 |
|
---|
| 530 | switch (csd_structure) {
|
---|
| 531 | case 0:
|
---|
| 532 | obj->cdv = 512;
|
---|
[435] | 533 | c_size = sdfs_ext_bits(obj, obj->_csd, 73, 62);
|
---|
| 534 | c_size_mult = sdfs_ext_bits(obj, obj->_csd, 49, 47);
|
---|
| 535 | read_bl_len = sdfs_ext_bits(obj, obj->_csd, 83, 80);
|
---|
[270] | 536 |
|
---|
[435] | 537 | obj->_block_len = 1 << read_bl_len;
|
---|
[270] | 538 | mult = 1 << (c_size_mult + 2);
|
---|
| 539 | blocknr = (c_size + 1) * mult;
|
---|
[435] | 540 | obj->_capacity = blocknr * obj->_block_len;
|
---|
| 541 | blocks = obj->_capacity / 512;
|
---|
| 542 | debug_if(SD_DBG, "\n\rSDCard\n\rc_size: %d \n\rcapacity: %ld \n\rsectors: %lld\n\r", c_size, obj->_capacity, blocks);
|
---|
[270] | 543 | break;
|
---|
| 544 |
|
---|
| 545 | case 1:
|
---|
| 546 | obj->cdv = 1;
|
---|
[435] | 547 | hc_c_size = sdfs_ext_bits(obj, obj->_csd, 63, 48);
|
---|
[270] | 548 | blocks = (hc_c_size + 1) * 1024;
|
---|
| 549 | debug_if(SD_DBG, "\n\rSDHC Card \n\rhc_c_size: %d\n\rcapacity: %lld \n\rsectors: %lld\n\r", hc_c_size, blocks * 512, blocks);
|
---|
| 550 | break;
|
---|
| 551 |
|
---|
| 552 | default:
|
---|
| 553 | debug("CSD struct unsupported\r\n");
|
---|
| 554 | return 0;
|
---|
| 555 | };
|
---|
| 556 | return blocks;
|
---|
| 557 | }
|
---|
[435] | 558 |
|
---|
| 559 | static
|
---|
| 560 | int wait_ready(sdfs_t *obj, uint32_t wt)
|
---|
| 561 | {
|
---|
| 562 | /* Wait until card goes ready or timeout */
|
---|
| 563 | for (int i = 0; i < wt; i++) {
|
---|
| 564 | if (spi_master_write(&obj->_spi, 0xFF) == 0xFF)
|
---|
| 565 | /* Card goes ready */
|
---|
| 566 | return 1;
|
---|
| 567 | }
|
---|
| 568 |
|
---|
| 569 | /* Timeout occured */
|
---|
| 570 | return 0;
|
---|
| 571 | }
|
---|
| 572 |
|
---|
| 573 | static
|
---|
| 574 | void deselect(sdfs_t *obj)
|
---|
| 575 | {
|
---|
| 576 | /* Set CS# high */
|
---|
| 577 | gpio_write(&obj->_cs, 0);
|
---|
| 578 |
|
---|
| 579 | /* Dummy clock (force DO hi-z for multiple slave SPI) */
|
---|
| 580 | spi_master_write(&obj->_spi, 0xFF);
|
---|
| 581 | }
|
---|
| 582 |
|
---|
| 583 | static
|
---|
| 584 | int select(sdfs_t *obj)
|
---|
| 585 | {
|
---|
| 586 | /* Set CS# low */
|
---|
| 587 | gpio_write(&obj->_cs, 1);
|
---|
| 588 |
|
---|
| 589 | /* Dummy clock (force DO enabled) */
|
---|
| 590 | spi_master_write(&obj->_spi, 0xFF);
|
---|
| 591 |
|
---|
| 592 | /* Wait for card ready */
|
---|
| 593 | if (wait_ready(obj, 500))
|
---|
| 594 | return 0;
|
---|
| 595 |
|
---|
| 596 | deselect(obj);
|
---|
| 597 |
|
---|
| 598 | /* Failed to select the card due to timeout */
|
---|
| 599 | return -1;
|
---|
| 600 | }
|
---|
| 601 |
|
---|
| 602 | int sdfs_sync(sdfs_t *obj)
|
---|
| 603 | {
|
---|
| 604 | int ret = select(obj);
|
---|
| 605 | deselect(obj);
|
---|
| 606 | return ret;
|
---|
| 607 | }
|
---|
| 608 |
|
---|
| 609 | int sdfs_trim(sdfs_t *obj, uint32_t st, uint32_t ed)
|
---|
| 610 | {
|
---|
| 611 | int res = -1;
|
---|
| 612 |
|
---|
| 613 | for(;;) {
|
---|
| 614 | /* Check if the card is SDC */
|
---|
| 615 | if (!(obj->_card_type & CT_SDC))
|
---|
| 616 | break;
|
---|
| 617 | /* Check if sector erase can be applied to the card */
|
---|
| 618 | if (!(obj->_csd[0] >> 6) && !(obj->_csd[10] & 0x40))
|
---|
| 619 | break;
|
---|
| 620 | /* Load sector block */
|
---|
| 621 | if (!(obj->_card_type & CT_BLOCK)) {
|
---|
| 622 | st *= 512; ed *= 512;
|
---|
| 623 | }
|
---|
| 624 | /* Erase sector block */
|
---|
| 625 | if ((sdfs__cmd(obj, 32, st) == 0)
|
---|
| 626 | && (sdfs__cmd(obj, 33, ed) == 0)
|
---|
| 627 | && (sdfs__cmd(obj, 38, 0) == 0)
|
---|
| 628 | && wait_ready(obj, 30000))
|
---|
| 629 | res = 0;
|
---|
| 630 | }
|
---|
| 631 |
|
---|
| 632 | return res;
|
---|
| 633 | }
|
---|
| 634 |
|
---|
| 635 | int sdfs_get_ocr(sdfs_t *obj, uint8_t buff[4])
|
---|
| 636 | {
|
---|
| 637 | int res = -1, n;
|
---|
| 638 |
|
---|
| 639 | /* READ_OCR */
|
---|
| 640 | if (sdfs__cmd58(obj) == 0) {
|
---|
| 641 | for (n = 4; n; n--) {
|
---|
| 642 | *buff++ = spi_master_write(&obj->_spi, 0xFF);
|
---|
| 643 | }
|
---|
| 644 | res = 0;
|
---|
| 645 | }
|
---|
| 646 |
|
---|
| 647 | deselect(obj);
|
---|
| 648 |
|
---|
| 649 | return res;
|
---|
| 650 | }
|
---|
| 651 |
|
---|
| 652 | int sdfs_get_sdstat(sdfs_t *obj, uint8_t buff[64])
|
---|
| 653 | {
|
---|
| 654 | int res = -1;
|
---|
| 655 |
|
---|
| 656 | sdfs__cmd(obj, 55, 0);
|
---|
| 657 |
|
---|
| 658 | /* SD_STATUS */
|
---|
| 659 | if (sdfs__cmd(obj, 13, 0) == 0) {
|
---|
| 660 | spi_master_write(&obj->_spi, 0xFF);
|
---|
| 661 | if (sdfs__read(obj, buff, 64) == 0)
|
---|
| 662 | return 0;
|
---|
| 663 | }
|
---|
| 664 |
|
---|
| 665 | deselect(obj);
|
---|
| 666 |
|
---|
| 667 | return res;
|
---|
| 668 | }
|
---|