1 | /*******************************************************************************
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2 | * DISCLAIMER
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3 | * This software is supplied by Renesas Electronics Corporation and is only
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4 | * intended for use with Renesas products. No other uses are authorized. This
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5 | * software is owned by Renesas Electronics Corporation and is protected under
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6 | * all applicable laws, including copyright laws.
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7 | * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
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8 | * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
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9 | * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
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10 | * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
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11 | * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
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12 | * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
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13 | * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
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14 | * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
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15 | * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
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16 | * Renesas reserves the right, without notice, to make changes to this software
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17 | * and to discontinue the availability of this software. By using this software,
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18 | * you agree to the additional terms and conditions found by accessing the
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19 | * following link:
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20 | * http://www.renesas.com/disclaimer*
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21 | * Copyright (C) 2013-2014 Renesas Electronics Corporation. All rights reserved.
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22 | *******************************************************************************/
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23 | /*******************************************************************************
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24 | * File Name : l2c_iodefine.h
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25 | * $Rev: $
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26 | * $Date:: $
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27 | * Description : Definition of I/O Register (V1.00a)
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28 | ******************************************************************************/
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29 | #ifndef L2C_IODEFINE_H
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30 | #define L2C_IODEFINE_H
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31 | /* ->SEC M1.10.1 : Not magic number */
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32 |
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33 | struct st_l2c
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34 | { /* L2C */
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35 | volatile uint32_t REG0_CACHE_ID; /* REG0_CACHE_ID */
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36 | volatile uint32_t REG0_CACHE_TYPE; /* REG0_CACHE_TYPE */
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37 | volatile uint8_t dummy8[248]; /* */
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38 | volatile uint32_t REG1_CONTROL; /* REG1_CONTROL */
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39 | volatile uint32_t REG1_AUX_CONTROL; /* REG1_AUX_CONTROL */
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40 | volatile uint32_t REG1_TAG_RAM_CONTROL; /* REG1_TAG_RAM_CONTROL */
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41 | volatile uint32_t REG1_DATA_RAM_CONTROL; /* REG1_DATA_RAM_CONTROL */
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42 | volatile uint8_t dummy9[240]; /* */
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43 | volatile uint32_t REG2_EV_COUNTER_CTRL; /* REG2_EV_COUNTER_CTRL */
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44 | volatile uint32_t REG2_EV_COUNTER1_CFG; /* REG2_EV_COUNTER1_CFG */
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45 | volatile uint32_t REG2_EV_COUNTER0_CFG; /* REG2_EV_COUNTER0_CFG */
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46 | volatile uint32_t REG2_EV_COUNTER1; /* REG2_EV_COUNTER1 */
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47 | volatile uint32_t REG2_EV_COUNTER0; /* REG2_EV_COUNTER0 */
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48 | volatile uint32_t REG2_INT_MASK; /* REG2_INT_MASK */
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49 | volatile uint32_t REG2_INT_MASK_STATUS; /* REG2_INT_MASK_STATUS */
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50 | volatile uint32_t REG2_INT_RAW_STATUS; /* REG2_INT_RAW_STATUS */
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51 | volatile uint32_t REG2_INT_CLEAR; /* REG2_INT_CLEAR */
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52 | volatile uint8_t dummy10[1292]; /* */
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53 | volatile uint32_t REG7_CACHE_SYNC; /* REG7_CACHE_SYNC */
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54 | volatile uint8_t dummy11[60]; /* */
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55 | volatile uint32_t REG7_INV_PA; /* REG7_INV_PA */
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56 | volatile uint8_t dummy12[8]; /* */
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57 | volatile uint32_t REG7_INV_WAY; /* REG7_INV_WAY */
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58 | volatile uint8_t dummy13[48]; /* */
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59 | volatile uint32_t REG7_CLEAN_PA; /* REG7_CLEAN_PA */
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60 | volatile uint8_t dummy14[4]; /* */
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61 | volatile uint32_t REG7_CLEAN_INDEX; /* REG7_CLEAN_INDEX */
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62 | volatile uint32_t REG7_CLEAN_WAY; /* REG7_CLEAN_WAY */
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63 | volatile uint8_t dummy15[48]; /* */
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64 | volatile uint32_t REG7_CLEAN_INV_PA; /* REG7_CLEAN_INV_PA */
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65 | volatile uint8_t dummy16[4]; /* */
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66 | volatile uint32_t REG7_CLEAN_INV_INDEX; /* REG7_CLEAN_INV_INDEX */
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67 | volatile uint32_t REG7_CLEAN_INV_WAY; /* REG7_CLEAN_INV_WAY */
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68 | volatile uint8_t dummy17[256]; /* */
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69 | /* start of struct st_l2c_from_reg9_d_lockdown0 */
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70 | volatile uint32_t REG9_D_LOCKDOWN0; /* REG9_D_LOCKDOWN0 */
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71 | volatile uint32_t REG9_I_LOCKDOWN0; /* REG9_I_LOCKDOWN0 */
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72 | /* end of struct st_l2c_from_reg9_d_lockdown0 */
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73 | /* start of struct st_l2c_from_reg9_d_lockdown0 */
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74 | volatile uint32_t REG9_D_LOCKDOWN1; /* REG9_D_LOCKDOWN1 */
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75 | volatile uint32_t REG9_I_LOCKDOWN1; /* REG9_I_LOCKDOWN1 */
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76 | /* end of struct st_l2c_from_reg9_d_lockdown0 */
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77 | /* start of struct st_l2c_from_reg9_d_lockdown0 */
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78 | volatile uint32_t REG9_D_LOCKDOWN2; /* REG9_D_LOCKDOWN2 */
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79 | volatile uint32_t REG9_I_LOCKDOWN2; /* REG9_I_LOCKDOWN2 */
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80 | /* end of struct st_l2c_from_reg9_d_lockdown0 */
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81 | /* start of struct st_l2c_from_reg9_d_lockdown0 */
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82 | volatile uint32_t REG9_D_LOCKDOWN3; /* REG9_D_LOCKDOWN3 */
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83 | volatile uint32_t REG9_I_LOCKDOWN3; /* REG9_I_LOCKDOWN3 */
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84 | /* end of struct st_l2c_from_reg9_d_lockdown0 */
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85 | /* start of struct st_l2c_from_reg9_d_lockdown0 */
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86 | volatile uint32_t REG9_D_LOCKDOWN4; /* REG9_D_LOCKDOWN4 */
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87 | volatile uint32_t REG9_I_LOCKDOWN4; /* REG9_I_LOCKDOWN4 */
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88 | /* end of struct st_l2c_from_reg9_d_lockdown0 */
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89 | /* start of struct st_l2c_from_reg9_d_lockdown0 */
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90 | volatile uint32_t REG9_D_LOCKDOWN5; /* REG9_D_LOCKDOWN5 */
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91 | volatile uint32_t REG9_I_LOCKDOWN5; /* REG9_I_LOCKDOWN5 */
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92 | /* end of struct st_l2c_from_reg9_d_lockdown0 */
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93 | /* start of struct st_l2c_from_reg9_d_lockdown0 */
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94 | volatile uint32_t REG9_D_LOCKDOWN6; /* REG9_D_LOCKDOWN6 */
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95 | volatile uint32_t REG9_I_LOCKDOWN6; /* REG9_I_LOCKDOWN6 */
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96 | /* end of struct st_l2c_from_reg9_d_lockdown0 */
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97 | /* start of struct st_l2c_from_reg9_d_lockdown0 */
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98 | volatile uint32_t REG9_D_LOCKDOWN7; /* REG9_D_LOCKDOWN7 */
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99 | volatile uint32_t REG9_I_LOCKDOWN7; /* REG9_I_LOCKDOWN7 */
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100 | /* end of struct st_l2c_from_reg9_d_lockdown0 */
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101 | volatile uint8_t dummy18[16]; /* */
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102 | volatile uint32_t REG9_LOCK_LINE_EN; /* REG9_LOCK_LINE_EN */
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103 | volatile uint32_t REG9_UNLOCK_WAY; /* REG9_UNLOCK_WAY */
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104 | volatile uint8_t dummy19[680]; /* */
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105 | volatile uint32_t REG12_ADDR_FILTERING_START; /* REG12_ADDR_FILTERING_START */
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106 | volatile uint32_t REG12_ADDR_FILTERING_END; /* REG12_ADDR_FILTERING_END */
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107 | volatile uint8_t dummy20[824]; /* */
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108 | volatile uint32_t REG15_DEBUG_CTRL; /* REG15_DEBUG_CTRL */
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109 | volatile uint8_t dummy21[28]; /* */
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110 | volatile uint32_t REG15_PREFETCH_CTRL; /* REG15_PREFETCH_CTRL */
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111 | volatile uint8_t dummy22[28]; /* */
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112 | volatile uint32_t REG15_POWER_CTRL; /* REG15_POWER_CTRL */
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113 | };
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114 |
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115 |
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116 | struct st_l2c_from_reg9_d_lockdown0
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117 | {
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118 | volatile uint32_t REG9_D_LOCKDOWN0; /* REG9_D_LOCKDOWN0 */
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119 | volatile uint32_t REG9_I_LOCKDOWN0; /* REG9_I_LOCKDOWN0 */
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120 | };
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121 |
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122 |
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123 | #define L2C (*(struct st_l2c *)0x3FFFF000uL) /* L2C */
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124 |
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125 |
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126 | /* Start of channnel array defines of L2C */
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127 |
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128 | /* Channnel array defines of L2C_FROM_REG9_D_LOCKDOWN0_ARRAY */
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129 | /*(Sample) value = L2C_FROM_REG9_D_LOCKDOWN0_ARRAY[ channel ]->REG9_D_LOCKDOWN0; */
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130 | #define L2C_FROM_REG9_D_LOCKDOWN0_ARRAY_COUNT 8
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131 | #define L2C_FROM_REG9_D_LOCKDOWN0_ARRAY_ADDRESS_LIST \
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132 | { /* ->MISRA 11.3 */ /* ->SEC R2.7.1 */ \
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133 | &L2C_FROM_REG9_D_LOCKDOWN0, &L2C_FROM_REG9_D_LOCKDOWN1, &L2C_FROM_REG9_D_LOCKDOWN2, &L2C_FROM_REG9_D_LOCKDOWN3, &L2C_FROM_REG9_D_LOCKDOWN4, &L2C_FROM_REG9_D_LOCKDOWN5, &L2C_FROM_REG9_D_LOCKDOWN6, &L2C_FROM_REG9_D_LOCKDOWN7 \
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134 | } /* <-MISRA 11.3 */ /* <-SEC R2.7.1 */ /* { } is for MISRA 19.4 */
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135 | #define L2C_FROM_REG9_D_LOCKDOWN0 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN0) /* L2C_FROM_REG9_D_LOCKDOWN0 */
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136 | #define L2C_FROM_REG9_D_LOCKDOWN1 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN1) /* L2C_FROM_REG9_D_LOCKDOWN1 */
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137 | #define L2C_FROM_REG9_D_LOCKDOWN2 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN2) /* L2C_FROM_REG9_D_LOCKDOWN2 */
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138 | #define L2C_FROM_REG9_D_LOCKDOWN3 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN3) /* L2C_FROM_REG9_D_LOCKDOWN3 */
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139 | #define L2C_FROM_REG9_D_LOCKDOWN4 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN4) /* L2C_FROM_REG9_D_LOCKDOWN4 */
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140 | #define L2C_FROM_REG9_D_LOCKDOWN5 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN5) /* L2C_FROM_REG9_D_LOCKDOWN5 */
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141 | #define L2C_FROM_REG9_D_LOCKDOWN6 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN6) /* L2C_FROM_REG9_D_LOCKDOWN6 */
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142 | #define L2C_FROM_REG9_D_LOCKDOWN7 (*(struct st_l2c_from_reg9_d_lockdown0 *)&L2C.REG9_D_LOCKDOWN7) /* L2C_FROM_REG9_D_LOCKDOWN7 */
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143 |
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144 | /* End of channnel array defines of L2C */
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145 |
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146 |
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147 | #define L2CREG0_CACHE_ID L2C.REG0_CACHE_ID
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148 | #define L2CREG0_CACHE_TYPE L2C.REG0_CACHE_TYPE
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149 | #define L2CREG1_CONTROL L2C.REG1_CONTROL
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150 | #define L2CREG1_AUX_CONTROL L2C.REG1_AUX_CONTROL
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151 | #define L2CREG1_TAG_RAM_CONTROL L2C.REG1_TAG_RAM_CONTROL
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152 | #define L2CREG1_DATA_RAM_CONTROL L2C.REG1_DATA_RAM_CONTROL
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153 | #define L2CREG2_EV_COUNTER_CTRL L2C.REG2_EV_COUNTER_CTRL
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154 | #define L2CREG2_EV_COUNTER1_CFG L2C.REG2_EV_COUNTER1_CFG
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155 | #define L2CREG2_EV_COUNTER0_CFG L2C.REG2_EV_COUNTER0_CFG
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156 | #define L2CREG2_EV_COUNTER1 L2C.REG2_EV_COUNTER1
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157 | #define L2CREG2_EV_COUNTER0 L2C.REG2_EV_COUNTER0
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158 | #define L2CREG2_INT_MASK L2C.REG2_INT_MASK
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159 | #define L2CREG2_INT_MASK_STATUS L2C.REG2_INT_MASK_STATUS
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160 | #define L2CREG2_INT_RAW_STATUS L2C.REG2_INT_RAW_STATUS
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161 | #define L2CREG2_INT_CLEAR L2C.REG2_INT_CLEAR
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162 | #define L2CREG7_CACHE_SYNC L2C.REG7_CACHE_SYNC
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163 | #define L2CREG7_INV_PA L2C.REG7_INV_PA
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164 | #define L2CREG7_INV_WAY L2C.REG7_INV_WAY
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165 | #define L2CREG7_CLEAN_PA L2C.REG7_CLEAN_PA
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166 | #define L2CREG7_CLEAN_INDEX L2C.REG7_CLEAN_INDEX
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167 | #define L2CREG7_CLEAN_WAY L2C.REG7_CLEAN_WAY
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168 | #define L2CREG7_CLEAN_INV_PA L2C.REG7_CLEAN_INV_PA
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169 | #define L2CREG7_CLEAN_INV_INDEX L2C.REG7_CLEAN_INV_INDEX
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170 | #define L2CREG7_CLEAN_INV_WAY L2C.REG7_CLEAN_INV_WAY
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171 | #define L2CREG9_D_LOCKDOWN0 L2C.REG9_D_LOCKDOWN0
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172 | #define L2CREG9_I_LOCKDOWN0 L2C.REG9_I_LOCKDOWN0
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173 | #define L2CREG9_D_LOCKDOWN1 L2C.REG9_D_LOCKDOWN1
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174 | #define L2CREG9_I_LOCKDOWN1 L2C.REG9_I_LOCKDOWN1
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175 | #define L2CREG9_D_LOCKDOWN2 L2C.REG9_D_LOCKDOWN2
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176 | #define L2CREG9_I_LOCKDOWN2 L2C.REG9_I_LOCKDOWN2
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177 | #define L2CREG9_D_LOCKDOWN3 L2C.REG9_D_LOCKDOWN3
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178 | #define L2CREG9_I_LOCKDOWN3 L2C.REG9_I_LOCKDOWN3
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179 | #define L2CREG9_D_LOCKDOWN4 L2C.REG9_D_LOCKDOWN4
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180 | #define L2CREG9_I_LOCKDOWN4 L2C.REG9_I_LOCKDOWN4
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181 | #define L2CREG9_D_LOCKDOWN5 L2C.REG9_D_LOCKDOWN5
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182 | #define L2CREG9_I_LOCKDOWN5 L2C.REG9_I_LOCKDOWN5
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183 | #define L2CREG9_D_LOCKDOWN6 L2C.REG9_D_LOCKDOWN6
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184 | #define L2CREG9_I_LOCKDOWN6 L2C.REG9_I_LOCKDOWN6
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185 | #define L2CREG9_D_LOCKDOWN7 L2C.REG9_D_LOCKDOWN7
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186 | #define L2CREG9_I_LOCKDOWN7 L2C.REG9_I_LOCKDOWN7
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187 | #define L2CREG9_LOCK_LINE_EN L2C.REG9_LOCK_LINE_EN
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188 | #define L2CREG9_UNLOCK_WAY L2C.REG9_UNLOCK_WAY
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189 | #define L2CREG12_ADDR_FILTERING_START L2C.REG12_ADDR_FILTERING_START
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190 | #define L2CREG12_ADDR_FILTERING_END L2C.REG12_ADDR_FILTERING_END
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191 | #define L2CREG15_DEBUG_CTRL L2C.REG15_DEBUG_CTRL
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192 | #define L2CREG15_PREFETCH_CTRL L2C.REG15_PREFETCH_CTRL
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193 | #define L2CREG15_POWER_CTRL L2C.REG15_POWER_CTRL
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194 | /* <-SEC M1.10.1 */
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195 | #endif
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