| 1 | /*******************************************************************************
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| 2 | * DISCLAIMER
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| 3 | * This software is supplied by Renesas Electronics Corporation and is only
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| 4 | * intended for use with Renesas products. No other uses are authorized. This
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| 5 | * software is owned by Renesas Electronics Corporation and is protected under
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| 6 | * all applicable laws, including copyright laws.
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| 7 | * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
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| 8 | * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
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| 9 | * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
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| 10 | * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
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| 11 | * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
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| 12 | * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
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| 13 | * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
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| 14 | * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
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| 15 | * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
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| 16 | * Renesas reserves the right, without notice, to make changes to this software
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| 17 | * and to discontinue the availability of this software. By using this software,
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| 18 | * you agree to the additional terms and conditions found by accessing the
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| 19 | * following link:
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| 20 | * http://www.renesas.com/disclaimer
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| 21 | *
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| 22 | * Copyright (C) 2016 Renesas Electronics Corporation. All rights reserved.
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| 23 | *******************************************************************************/
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| 24 | /******************************************************************************
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| 25 | * File Name : spibsc.h
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| 26 | * $Rev: 12 $
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| 27 | * $Date:: 2016-05-19 17:26:37 +0900#$
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| 28 | * Description :
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| 29 | ******************************************************************************/
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| 30 | #ifndef _SPIBSC_H_
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| 31 | #define _SPIBSC_H_
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| 32 |
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| 33 | /******************************************************************************
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| 34 | Includes <System Includes> , "Project Includes"
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| 35 | ******************************************************************************/
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| 36 | #include "iodefine.h"
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| 37 |
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| 38 | /******************************************************************************
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| 39 | Macro definitions
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| 40 | ******************************************************************************/
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| 41 | #define SPIBSC_CMNCR_MD_EXTRD (0u)
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| 42 | #define SPIBSC_CMNCR_MD_SPI (1u)
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| 43 |
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| 44 | #define SPIBSC_OUTPUT_LOW (0u)
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| 45 | #define SPIBSC_OUTPUT_HIGH (1u)
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| 46 | #define SPIBSC_OUTPUT_LAST (2u)
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| 47 | #define SPIBSC_OUTPUT_HiZ (3u)
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| 48 |
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| 49 | #define SPIBSC_CMNCR_CPHAT_EVEN (0u)
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| 50 | #define SPIBSC_CMNCR_CPHAT_ODD (1u)
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| 51 |
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| 52 | #define SPIBSC_CMNCR_CPHAR_ODD (0u)
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| 53 | #define SPIBSC_CMNCR_CPHAR_EVEN (1u)
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| 54 |
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| 55 | #define SPIBSC_CMNCR_SSLP_LOW (0u)
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| 56 | #define SPIBSC_CMNCR_SSLP_HIGH (1u)
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| 57 |
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| 58 | #define SPIBSC_CMNCR_CPOL_LOW (0u)
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| 59 | #define SPIBSC_CMNCR_CPOL_HIGH (1u)
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| 60 |
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| 61 | #define SPIBSC_CMNCR_BSZ_SINGLE (0u)
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| 62 | #define SPIBSC_CMNCR_BSZ_DUAL (1u)
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| 63 |
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| 64 | #define SPIBSC_DELAY_1SPBCLK (0u)
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| 65 | #define SPIBSC_DELAY_2SPBCLK (1u)
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| 66 | #define SPIBSC_DELAY_3SPBCLK (2u)
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| 67 | #define SPIBSC_DELAY_4SPBCLK (3u)
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| 68 | #define SPIBSC_DELAY_5SPBCLK (4u)
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| 69 | #define SPIBSC_DELAY_6SPBCLK (5u)
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| 70 | #define SPIBSC_DELAY_7SPBCLK (6u)
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| 71 | #define SPIBSC_DELAY_8SPBCLK (7u)
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| 72 |
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| 73 |
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| 74 | #define SPIBSC_BURST_1 (0x00u)
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| 75 | #define SPIBSC_BURST_2 (0x01u)
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| 76 | #define SPIBSC_BURST_3 (0x02u)
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| 77 | #define SPIBSC_BURST_4 (0x03u)
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| 78 | #define SPIBSC_BURST_5 (0x04u)
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| 79 | #define SPIBSC_BURST_6 (0x05u)
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| 80 | #define SPIBSC_BURST_7 (0x06u)
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| 81 | #define SPIBSC_BURST_8 (0x07u)
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| 82 | #define SPIBSC_BURST_9 (0x08u)
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| 83 | #define SPIBSC_BURST_10 (0x09u)
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| 84 | #define SPIBSC_BURST_11 (0x0au)
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| 85 | #define SPIBSC_BURST_12 (0x0bu)
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| 86 | #define SPIBSC_BURST_13 (0x0cu)
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| 87 | #define SPIBSC_BURST_14 (0x0du)
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| 88 | #define SPIBSC_BURST_15 (0x0eu)
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| 89 | #define SPIBSC_BURST_16 (0x0fu)
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| 90 |
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| 91 | #define SPIBSC_BURST_DISABLE (0u)
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| 92 | #define SPIBSC_BURST_ENABLE (1u)
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| 93 |
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| 94 | #define SPIBSC_DRCR_RCF_EXE (1u)
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| 95 |
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| 96 | #define SPIBSC_SSL_NEGATE (0u)
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| 97 | #define SPIBSC_TRANS_END (1u)
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| 98 |
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| 99 | #define SPIBSC_1BIT (0u)
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| 100 | #define SPIBSC_2BIT (1u)
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| 101 | #define SPIBSC_4BIT (2u)
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| 102 |
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| 103 | #define SPIBSC_OUTPUT_DISABLE (0u)
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| 104 | #define SPIBSC_OUTPUT_ENABLE (1u)
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| 105 | #define SPIBSC_OUTPUT_ADDR_24 (0x07u)
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| 106 | #define SPIBSC_OUTPUT_ADDR_32 (0x0fu)
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| 107 | #define SPIBSC_OUTPUT_OPD_3 (0x08u)
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| 108 | #define SPIBSC_OUTPUT_OPD_32 (0x0cu)
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| 109 | #define SPIBSC_OUTPUT_OPD_321 (0x0eu)
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| 110 | #define SPIBSC_OUTPUT_OPD_3210 (0x0fu)
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| 111 |
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| 112 | #define SPIBSC_OUTPUT_SPID_8 (0x08u)
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| 113 | #define SPIBSC_OUTPUT_SPID_16 (0x0cu)
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| 114 | #define SPIBSC_OUTPUT_SPID_32 (0x0fu)
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| 115 |
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| 116 | #define SPIBSC_SPISSL_NEGATE (0u)
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| 117 | #define SPIBSC_SPISSL_KEEP (1u)
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| 118 |
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| 119 | #define SPIBSC_SPIDATA_DISABLE (0u)
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| 120 | #define SPIBSC_SPIDATA_ENABLE (1u)
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| 121 |
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| 122 | #define SPIBSC_SPI_DISABLE (0u)
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| 123 | #define SPIBSC_SPI_ENABLE (1u)
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| 124 |
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| 125 |
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| 126 | /* Use for setting of the DME bit of "data read enable register"(DRENR) */
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| 127 | #define SPIBSC_DUMMY_CYC_DISABLE (0u)
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| 128 | #define SPIBSC_DUMMY_CYC_ENABLE (1u)
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| 129 |
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| 130 | /* Use for setting of the DMCYC [2:0] bit of "data read dummy cycle register"(DRDMCR) */
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| 131 | #define SPIBSC_DUMMY_1CYC (0u)
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| 132 | #define SPIBSC_DUMMY_2CYC (1u)
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| 133 | #define SPIBSC_DUMMY_3CYC (2u)
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| 134 | #define SPIBSC_DUMMY_4CYC (3u)
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| 135 | #define SPIBSC_DUMMY_5CYC (4u)
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| 136 | #define SPIBSC_DUMMY_6CYC (5u)
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| 137 | #define SPIBSC_DUMMY_7CYC (6u)
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| 138 | #define SPIBSC_DUMMY_8CYC (7u)
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| 139 |
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| 140 | /* Use for setting of "data read DDR enable register"(DRDRENR) */
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| 141 | #define SPIBSC_SDR_TRANS (0u)
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| 142 | #define SPIBSC_DDR_TRANS (1u)
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| 143 |
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| 144 | /* Use for setting the CKDLY regsiter */
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| 145 | #define SPIBSC_CKDLY_DEFAULT (0x0000A504uL) /* Initial value */
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| 146 | #define SPIBSC_CKDLY_TUNING (0x0000A50AuL) /* Shorten the data input setup time and extend the data hold time */
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| 147 |
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| 148 | /* Use for setting the SPODLY regsiter */
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| 149 | #define SPIBSC_SPODLY_DEFAULT (0xA5000000uL) /* Initial value */
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| 150 | #define SPIBSC_SPODLY_TUNING (0xA5001111uL) /* Delay the data output delay/hold/buffer-on/buffer-off time */
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| 151 |
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| 152 | #endif /* _SPIBSC_H_ */
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| 153 |
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| 154 | /* End of File */
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