1 | /* mbed Microcontroller Library
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2 | * Copyright (c) 2006-2013 ARM Limited
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3 | *
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4 | * Licensed under the Apache License, Version 2.0 (the "License");
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5 | * you may not use this file except in compliance with the License.
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6 | * You may obtain a copy of the License at
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7 | *
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8 | * http://www.apache.org/licenses/LICENSE-2.0
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9 | *
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10 | * Unless required by applicable law or agreed to in writing, software
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11 | * distributed under the License is distributed on an "AS IS" BASIS,
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12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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13 | * See the License for the specific language governing permissions and
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14 | * limitations under the License.
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15 | */
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16 | #ifndef MBED_SPI_API_H
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17 | #define MBED_SPI_API_H
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18 |
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19 | #include "device.h"
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20 | #include "dma_api.h"
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21 | #include "buffer.h"
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22 |
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23 | #if DEVICE_SPI
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24 |
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25 | #define SPI_EVENT_ERROR (1 << 1)
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26 | #define SPI_EVENT_COMPLETE (1 << 2)
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27 | #define SPI_EVENT_RX_OVERFLOW (1 << 3)
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28 | #define SPI_EVENT_ALL (SPI_EVENT_ERROR | SPI_EVENT_COMPLETE | SPI_EVENT_RX_OVERFLOW)
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29 |
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30 | #define SPI_EVENT_INTERNAL_TRANSFER_COMPLETE (1 << 30) // internal flag to report an event occurred
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31 |
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32 | #define SPI_FILL_WORD (0xFFFF)
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33 |
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34 | #if DEVICE_SPI_ASYNCH
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35 | /** Asynch spi hal structure
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36 | */
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37 | typedef struct {
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38 | struct spi_s spi; /**< Target specific spi structure */
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39 | struct buffer_s tx_buff; /**< Tx buffer */
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40 | struct buffer_s rx_buff; /**< Rx buffer */
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41 | } spi_t;
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42 |
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43 | #else
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44 | /** Non-asynch spi hal structure
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45 | */
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46 | typedef struct spi_s spi_t;
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47 |
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48 | #endif
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49 |
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50 | #ifdef __cplusplus
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51 | extern "C" {
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52 | #endif
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53 |
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54 | /**
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55 | * \defgroup GeneralSPI SPI Configuration Functions
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56 | * @{
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57 | */
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58 |
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59 | /** Initialize the SPI peripheral
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60 | *
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61 | * Configures the pins used by SPI, sets a default format and frequency, and enables the peripheral
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62 | * @param[out] obj The SPI object to initialize
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63 | * @param[in] mosi The pin to use for MOSI
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64 | * @param[in] miso The pin to use for MISO
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65 | * @param[in] sclk The pin to use for SCLK
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66 | * @param[in] ssel The pin to use for SSEL
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67 | */
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68 | void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel);
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69 |
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70 | /** Release a SPI object
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71 | *
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72 | * TODO: spi_free is currently unimplemented
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73 | * This will require reference counting at the C++ level to be safe
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74 | *
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75 | * Return the pins owned by the SPI object to their reset state
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76 | * Disable the SPI peripheral
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77 | * Disable the SPI clock
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78 | * @param[in] obj The SPI object to deinitialize
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79 | */
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80 | void spi_free(spi_t *obj);
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81 |
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82 | /** Configure the SPI format
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83 | *
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84 | * Set the number of bits per frame, configure clock polarity and phase, shift order and master/slave mode
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85 | * @param[in,out] obj The SPI object to configure
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86 | * @param[in] bits The number of bits per frame
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87 | * @param[in] mode The SPI mode (clock polarity, phase, and shift direction)
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88 | * @param[in] slave Zero for master mode or non-zero for slave mode
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89 | */
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90 | void spi_format(spi_t *obj, int bits, int mode, int slave);
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91 |
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92 | /** Set the SPI baud rate
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93 | *
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94 | * Actual frequency may differ from the desired frequency due to available dividers and bus clock
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95 | * Configures the SPI peripheral's baud rate
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96 | * @param[in,out] obj The SPI object to configure
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97 | * @param[in] hz The baud rate in Hz
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98 | */
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99 | void spi_frequency(spi_t *obj, int hz);
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100 |
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101 | /**@}*/
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102 | /**
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103 | * \defgroup SynchSPI Synchronous SPI Hardware Abstraction Layer
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104 | * @{
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105 | */
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106 |
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107 | /** Write a byte out in master mode and receive a value
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108 | *
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109 | * @param[in] obj The SPI peripheral to use for sending
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110 | * @param[in] value The value to send
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111 | * @return Returns the value received during send
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112 | */
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113 | int spi_master_write(spi_t *obj, int value);
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114 |
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115 | /** Check if a value is available to read
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116 | *
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117 | * @param[in] obj The SPI peripheral to check
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118 | * @return non-zero if a value is available
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119 | */
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120 | int spi_slave_receive(spi_t *obj);
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121 |
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122 | /** Get a received value out of the SPI receive buffer in slave mode
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123 | *
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124 | * Blocks until a value is available
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125 | * @param[in] obj The SPI peripheral to read
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126 | * @return The value received
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127 | */
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128 | int spi_slave_read(spi_t *obj);
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129 |
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130 | /** Write a value to the SPI peripheral in slave mode
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131 | *
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132 | * Blocks until the SPI peripheral can be written to
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133 | * @param[in] obj The SPI peripheral to write
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134 | * @param[in] value The value to write
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135 | */
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136 | void spi_slave_write(spi_t *obj, int value);
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137 |
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138 | /** Checks if the specified SPI peripheral is in use
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139 | *
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140 | * @param[in] obj The SPI peripheral to check
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141 | * @return non-zero if the peripheral is currently transmitting
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142 | */
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143 | int spi_busy(spi_t *obj);
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144 |
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145 | /** Get the module number
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146 | *
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147 | * @param[in] obj The SPI peripheral to check
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148 | * @return The module number
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149 | */
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150 | uint8_t spi_get_module(spi_t *obj);
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151 |
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152 | /**@}*/
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153 |
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154 | #if DEVICE_SPI_ASYNCH
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155 | /**
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156 | * \defgroup AsynchSPI Asynchronous SPI Hardware Abstraction Layer
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157 | * @{
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158 | */
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159 |
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160 | /** Begin the SPI transfer. Buffer pointers and lengths are specified in tx_buff and rx_buff
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161 | *
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162 | * @param[in] obj The SPI object which holds the transfer information
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163 | * @param[in] tx The buffer to send
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164 | * @param[in] tx_length The number of words to transmit
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165 | * @param[in] rx The buffer to receive
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166 | * @param[in] rx_length The number of words to receive
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167 | * @param[in] bit_width The bit width of buffer words
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168 | * @param[in] event The logical OR of events to be registered
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169 | * @param[in] handler SPI interrupt handler
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170 | * @param[in] hint A suggestion for how to use DMA with this transfer
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171 | */
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172 | void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint);
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173 |
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174 | /** The asynchronous IRQ handler
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175 | *
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176 | * Reads the received values out of the RX FIFO, writes values into the TX FIFO and checks for transfer termination
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177 | * conditions, such as buffer overflows or transfer complete.
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178 | * @param[in] obj The SPI object which holds the transfer information
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179 | * @return event flags if a transfer termination condition was met or 0 otherwise.
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180 | */
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181 | uint32_t spi_irq_handler_asynch(spi_t *obj);
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182 |
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183 | /** Attempts to determine if the SPI peripheral is already in use.
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184 | *
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185 | * If a temporary DMA channel has been allocated, peripheral is in use.
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186 | * If a permanent DMA channel has been allocated, check if the DMA channel is in use. If not, proceed as though no DMA
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187 | * channel were allocated.
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188 | * If no DMA channel is allocated, check whether tx and rx buffers have been assigned. For each assigned buffer, check
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189 | * if the corresponding buffer position is less than the buffer length. If buffers do not indicate activity, check if
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190 | * there are any bytes in the FIFOs.
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191 | * @param[in] obj The SPI object to check for activity
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192 | * @return non-zero if the SPI port is active or zero if it is not.
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193 | */
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194 | uint8_t spi_active(spi_t *obj);
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195 |
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196 | /** Abort an SPI transfer
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197 | *
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198 | * @param obj The SPI peripheral to stop
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199 | */
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200 | void spi_abort_asynch(spi_t *obj);
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201 |
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202 |
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203 | #endif
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204 |
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205 | /**@}*/
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206 |
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207 | #ifdef __cplusplus
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208 | }
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209 | #endif // __cplusplus
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210 |
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211 | #endif // SPI_DEVICE
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212 |
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213 | #endif // MBED_SPI_API_H
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